PPC: e500mc: add missing IVORs to bitmap
[qemu.git] / hw / pcie_port.c
1 /*
2 * pcie_port.c
3 *
4 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include "pcie_port.h"
22
23 void pcie_port_init_reg(PCIDevice *d)
24 {
25 /* Unlike pci bridge,
26 66MHz and fast back to back don't apply to pci express port. */
27 pci_set_word(d->config + PCI_STATUS, 0);
28 pci_set_word(d->config + PCI_SEC_STATUS, 0);
29
30 /* Unlike conventional pci bridge, some bits are hardwared to 0. */
31 pci_set_word(d->wmask + PCI_BRIDGE_CONTROL,
32 PCI_BRIDGE_CTL_PARITY |
33 PCI_BRIDGE_CTL_ISA |
34 PCI_BRIDGE_CTL_VGA |
35 PCI_BRIDGE_CTL_SERR |
36 PCI_BRIDGE_CTL_BUS_RESET);
37
38 /* 7.5.3.5 Prefetchable Memory Base Limit
39 * The Prefetchable Memory Base and Prefetchable Memory Limit registers
40 * must indicate that 64-bit addresses are supported, as defined in
41 * PCI-to-PCI Bridge Architecture Specification, Revision 1.2.
42 */
43 pci_word_test_and_set_mask(d->config + PCI_PREF_MEMORY_BASE,
44 PCI_PREF_RANGE_TYPE_64);
45 pci_word_test_and_set_mask(d->config + PCI_PREF_MEMORY_LIMIT,
46 PCI_PREF_RANGE_TYPE_64);
47 }
48
49 /**************************************************************************
50 * (chassis number, pcie physical slot number) -> pcie slot conversion
51 */
52 struct PCIEChassis {
53 uint8_t number;
54
55 QLIST_HEAD(, PCIESlot) slots;
56 QLIST_ENTRY(PCIEChassis) next;
57 };
58
59 static QLIST_HEAD(, PCIEChassis) chassis = QLIST_HEAD_INITIALIZER(chassis);
60
61 static struct PCIEChassis *pcie_chassis_find(uint8_t chassis_number)
62 {
63 struct PCIEChassis *c;
64 QLIST_FOREACH(c, &chassis, next) {
65 if (c->number == chassis_number) {
66 break;
67 }
68 }
69 return c;
70 }
71
72 void pcie_chassis_create(uint8_t chassis_number)
73 {
74 struct PCIEChassis *c;
75 c = pcie_chassis_find(chassis_number);
76 if (c) {
77 return;
78 }
79 c = g_malloc0(sizeof(*c));
80 c->number = chassis_number;
81 QLIST_INIT(&c->slots);
82 QLIST_INSERT_HEAD(&chassis, c, next);
83 }
84
85 static PCIESlot *pcie_chassis_find_slot_with_chassis(struct PCIEChassis *c,
86 uint8_t slot)
87 {
88 PCIESlot *s;
89 QLIST_FOREACH(s, &c->slots, next) {
90 if (s->slot == slot) {
91 break;
92 }
93 }
94 return s;
95 }
96
97 PCIESlot *pcie_chassis_find_slot(uint8_t chassis_number, uint16_t slot)
98 {
99 struct PCIEChassis *c;
100 c = pcie_chassis_find(chassis_number);
101 if (!c) {
102 return NULL;
103 }
104 return pcie_chassis_find_slot_with_chassis(c, slot);
105 }
106
107 int pcie_chassis_add_slot(struct PCIESlot *slot)
108 {
109 struct PCIEChassis *c;
110 c = pcie_chassis_find(slot->chassis);
111 if (!c) {
112 return -ENODEV;
113 }
114 if (pcie_chassis_find_slot_with_chassis(c, slot->slot)) {
115 return -EBUSY;
116 }
117 QLIST_INSERT_HEAD(&c->slots, slot, next);
118 return 0;
119 }
120
121 void pcie_chassis_del_slot(PCIESlot *s)
122 {
123 QLIST_REMOVE(s, next);
124 }