PPC: e500: msync is 440 only, e500 has real sync
[qemu.git] / hw / pl110.c
1 /*
2 * Arm PrimeCell PL110 Color LCD Controller
3 *
4 * Copyright (c) 2005-2009 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GNU LGPL
8 */
9
10 #include "sysbus.h"
11 #include "console.h"
12 #include "framebuffer.h"
13
14 #define PL110_CR_EN 0x001
15 #define PL110_CR_BGR 0x100
16 #define PL110_CR_BEBO 0x200
17 #define PL110_CR_BEPO 0x400
18 #define PL110_CR_PWR 0x800
19
20 enum pl110_bppmode
21 {
22 BPP_1,
23 BPP_2,
24 BPP_4,
25 BPP_8,
26 BPP_16,
27 BPP_32,
28 BPP_16_565, /* PL111 only */
29 BPP_12 /* PL111 only */
30 };
31
32
33 /* The Versatile/PB uses a slightly modified PL110 controller. */
34 enum pl110_version
35 {
36 PL110,
37 PL110_VERSATILE,
38 PL111
39 };
40
41 typedef struct {
42 SysBusDevice busdev;
43 MemoryRegion iomem;
44 DisplayState *ds;
45
46 int version;
47 uint32_t timing[4];
48 uint32_t cr;
49 uint32_t upbase;
50 uint32_t lpbase;
51 uint32_t int_status;
52 uint32_t int_mask;
53 int cols;
54 int rows;
55 enum pl110_bppmode bpp;
56 int invalidate;
57 uint32_t mux_ctrl;
58 uint32_t pallette[256];
59 uint32_t raw_pallette[128];
60 qemu_irq irq;
61 } pl110_state;
62
63 static int vmstate_pl110_post_load(void *opaque, int version_id);
64
65 static const VMStateDescription vmstate_pl110 = {
66 .name = "pl110",
67 .version_id = 2,
68 .minimum_version_id = 1,
69 .post_load = vmstate_pl110_post_load,
70 .fields = (VMStateField[]) {
71 VMSTATE_INT32(version, pl110_state),
72 VMSTATE_UINT32_ARRAY(timing, pl110_state, 4),
73 VMSTATE_UINT32(cr, pl110_state),
74 VMSTATE_UINT32(upbase, pl110_state),
75 VMSTATE_UINT32(lpbase, pl110_state),
76 VMSTATE_UINT32(int_status, pl110_state),
77 VMSTATE_UINT32(int_mask, pl110_state),
78 VMSTATE_INT32(cols, pl110_state),
79 VMSTATE_INT32(rows, pl110_state),
80 VMSTATE_UINT32(bpp, pl110_state),
81 VMSTATE_INT32(invalidate, pl110_state),
82 VMSTATE_UINT32_ARRAY(pallette, pl110_state, 256),
83 VMSTATE_UINT32_ARRAY(raw_pallette, pl110_state, 128),
84 VMSTATE_UINT32_V(mux_ctrl, pl110_state, 2),
85 VMSTATE_END_OF_LIST()
86 }
87 };
88
89 static const unsigned char pl110_id[] =
90 { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
91
92 /* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
93 has a different ID. However Linux only looks for the normal ID. */
94 #if 0
95 static const unsigned char pl110_versatile_id[] =
96 { 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
97 #else
98 #define pl110_versatile_id pl110_id
99 #endif
100
101 static const unsigned char pl111_id[] = {
102 0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1
103 };
104
105 /* Indexed by pl110_version */
106 static const unsigned char *idregs[] = {
107 pl110_id,
108 pl110_versatile_id,
109 pl111_id
110 };
111
112 #include "pixel_ops.h"
113
114 #define BITS 8
115 #include "pl110_template.h"
116 #define BITS 15
117 #include "pl110_template.h"
118 #define BITS 16
119 #include "pl110_template.h"
120 #define BITS 24
121 #include "pl110_template.h"
122 #define BITS 32
123 #include "pl110_template.h"
124
125 static int pl110_enabled(pl110_state *s)
126 {
127 return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR);
128 }
129
130 static void pl110_update_display(void *opaque)
131 {
132 pl110_state *s = (pl110_state *)opaque;
133 drawfn* fntable;
134 drawfn fn;
135 int dest_width;
136 int src_width;
137 int bpp_offset;
138 int first;
139 int last;
140
141 if (!pl110_enabled(s))
142 return;
143
144 switch (ds_get_bits_per_pixel(s->ds)) {
145 case 0:
146 return;
147 case 8:
148 fntable = pl110_draw_fn_8;
149 dest_width = 1;
150 break;
151 case 15:
152 fntable = pl110_draw_fn_15;
153 dest_width = 2;
154 break;
155 case 16:
156 fntable = pl110_draw_fn_16;
157 dest_width = 2;
158 break;
159 case 24:
160 fntable = pl110_draw_fn_24;
161 dest_width = 3;
162 break;
163 case 32:
164 fntable = pl110_draw_fn_32;
165 dest_width = 4;
166 break;
167 default:
168 fprintf(stderr, "pl110: Bad color depth\n");
169 exit(1);
170 }
171 if (s->cr & PL110_CR_BGR)
172 bpp_offset = 0;
173 else
174 bpp_offset = 24;
175
176 if ((s->version != PL111) && (s->bpp == BPP_16)) {
177 /* The PL110's native 16 bit mode is 5551; however
178 * most boards with a PL110 implement an external
179 * mux which allows bits to be reshuffled to give
180 * 565 format. The mux is typically controlled by
181 * an external system register.
182 * This is controlled by a GPIO input pin
183 * so boards can wire it up to their register.
184 *
185 * The PL111 straightforwardly implements both
186 * 5551 and 565 under control of the bpp field
187 * in the LCDControl register.
188 */
189 switch (s->mux_ctrl) {
190 case 3: /* 565 BGR */
191 bpp_offset = (BPP_16_565 - BPP_16);
192 break;
193 case 1: /* 5551 */
194 break;
195 case 0: /* 888; also if we have loaded vmstate from an old version */
196 case 2: /* 565 RGB */
197 default:
198 /* treat as 565 but honour BGR bit */
199 bpp_offset += (BPP_16_565 - BPP_16);
200 break;
201 }
202 }
203
204 if (s->cr & PL110_CR_BEBO)
205 fn = fntable[s->bpp + 8 + bpp_offset];
206 else if (s->cr & PL110_CR_BEPO)
207 fn = fntable[s->bpp + 16 + bpp_offset];
208 else
209 fn = fntable[s->bpp + bpp_offset];
210
211 src_width = s->cols;
212 switch (s->bpp) {
213 case BPP_1:
214 src_width >>= 3;
215 break;
216 case BPP_2:
217 src_width >>= 2;
218 break;
219 case BPP_4:
220 src_width >>= 1;
221 break;
222 case BPP_8:
223 break;
224 case BPP_16:
225 case BPP_16_565:
226 case BPP_12:
227 src_width <<= 1;
228 break;
229 case BPP_32:
230 src_width <<= 2;
231 break;
232 }
233 dest_width *= s->cols;
234 first = 0;
235 framebuffer_update_display(s->ds, sysbus_address_space(&s->busdev),
236 s->upbase, s->cols, s->rows,
237 src_width, dest_width, 0,
238 s->invalidate,
239 fn, s->pallette,
240 &first, &last);
241 if (first >= 0) {
242 dpy_update(s->ds, 0, first, s->cols, last - first + 1);
243 }
244 s->invalidate = 0;
245 }
246
247 static void pl110_invalidate_display(void * opaque)
248 {
249 pl110_state *s = (pl110_state *)opaque;
250 s->invalidate = 1;
251 if (pl110_enabled(s)) {
252 qemu_console_resize(s->ds, s->cols, s->rows);
253 }
254 }
255
256 static void pl110_update_pallette(pl110_state *s, int n)
257 {
258 int i;
259 uint32_t raw;
260 unsigned int r, g, b;
261
262 raw = s->raw_pallette[n];
263 n <<= 1;
264 for (i = 0; i < 2; i++) {
265 r = (raw & 0x1f) << 3;
266 raw >>= 5;
267 g = (raw & 0x1f) << 3;
268 raw >>= 5;
269 b = (raw & 0x1f) << 3;
270 /* The I bit is ignored. */
271 raw >>= 6;
272 switch (ds_get_bits_per_pixel(s->ds)) {
273 case 8:
274 s->pallette[n] = rgb_to_pixel8(r, g, b);
275 break;
276 case 15:
277 s->pallette[n] = rgb_to_pixel15(r, g, b);
278 break;
279 case 16:
280 s->pallette[n] = rgb_to_pixel16(r, g, b);
281 break;
282 case 24:
283 case 32:
284 s->pallette[n] = rgb_to_pixel32(r, g, b);
285 break;
286 }
287 n++;
288 }
289 }
290
291 static void pl110_resize(pl110_state *s, int width, int height)
292 {
293 if (width != s->cols || height != s->rows) {
294 if (pl110_enabled(s)) {
295 qemu_console_resize(s->ds, width, height);
296 }
297 }
298 s->cols = width;
299 s->rows = height;
300 }
301
302 /* Update interrupts. */
303 static void pl110_update(pl110_state *s)
304 {
305 /* TODO: Implement interrupts. */
306 }
307
308 static uint64_t pl110_read(void *opaque, target_phys_addr_t offset,
309 unsigned size)
310 {
311 pl110_state *s = (pl110_state *)opaque;
312
313 if (offset >= 0xfe0 && offset < 0x1000) {
314 return idregs[s->version][(offset - 0xfe0) >> 2];
315 }
316 if (offset >= 0x200 && offset < 0x400) {
317 return s->raw_pallette[(offset - 0x200) >> 2];
318 }
319 switch (offset >> 2) {
320 case 0: /* LCDTiming0 */
321 return s->timing[0];
322 case 1: /* LCDTiming1 */
323 return s->timing[1];
324 case 2: /* LCDTiming2 */
325 return s->timing[2];
326 case 3: /* LCDTiming3 */
327 return s->timing[3];
328 case 4: /* LCDUPBASE */
329 return s->upbase;
330 case 5: /* LCDLPBASE */
331 return s->lpbase;
332 case 6: /* LCDIMSC */
333 if (s->version != PL110) {
334 return s->cr;
335 }
336 return s->int_mask;
337 case 7: /* LCDControl */
338 if (s->version != PL110) {
339 return s->int_mask;
340 }
341 return s->cr;
342 case 8: /* LCDRIS */
343 return s->int_status;
344 case 9: /* LCDMIS */
345 return s->int_status & s->int_mask;
346 case 11: /* LCDUPCURR */
347 /* TODO: Implement vertical refresh. */
348 return s->upbase;
349 case 12: /* LCDLPCURR */
350 return s->lpbase;
351 default:
352 hw_error("pl110_read: Bad offset %x\n", (int)offset);
353 return 0;
354 }
355 }
356
357 static void pl110_write(void *opaque, target_phys_addr_t offset,
358 uint64_t val, unsigned size)
359 {
360 pl110_state *s = (pl110_state *)opaque;
361 int n;
362
363 /* For simplicity invalidate the display whenever a control register
364 is written to. */
365 s->invalidate = 1;
366 if (offset >= 0x200 && offset < 0x400) {
367 /* Pallette. */
368 n = (offset - 0x200) >> 2;
369 s->raw_pallette[(offset - 0x200) >> 2] = val;
370 pl110_update_pallette(s, n);
371 return;
372 }
373 switch (offset >> 2) {
374 case 0: /* LCDTiming0 */
375 s->timing[0] = val;
376 n = ((val & 0xfc) + 4) * 4;
377 pl110_resize(s, n, s->rows);
378 break;
379 case 1: /* LCDTiming1 */
380 s->timing[1] = val;
381 n = (val & 0x3ff) + 1;
382 pl110_resize(s, s->cols, n);
383 break;
384 case 2: /* LCDTiming2 */
385 s->timing[2] = val;
386 break;
387 case 3: /* LCDTiming3 */
388 s->timing[3] = val;
389 break;
390 case 4: /* LCDUPBASE */
391 s->upbase = val;
392 break;
393 case 5: /* LCDLPBASE */
394 s->lpbase = val;
395 break;
396 case 6: /* LCDIMSC */
397 if (s->version != PL110) {
398 goto control;
399 }
400 imsc:
401 s->int_mask = val;
402 pl110_update(s);
403 break;
404 case 7: /* LCDControl */
405 if (s->version != PL110) {
406 goto imsc;
407 }
408 control:
409 s->cr = val;
410 s->bpp = (val >> 1) & 7;
411 if (pl110_enabled(s)) {
412 qemu_console_resize(s->ds, s->cols, s->rows);
413 }
414 break;
415 case 10: /* LCDICR */
416 s->int_status &= ~val;
417 pl110_update(s);
418 break;
419 default:
420 hw_error("pl110_write: Bad offset %x\n", (int)offset);
421 }
422 }
423
424 static const MemoryRegionOps pl110_ops = {
425 .read = pl110_read,
426 .write = pl110_write,
427 .endianness = DEVICE_NATIVE_ENDIAN,
428 };
429
430 static void pl110_mux_ctrl_set(void *opaque, int line, int level)
431 {
432 pl110_state *s = (pl110_state *)opaque;
433 s->mux_ctrl = level;
434 }
435
436 static int vmstate_pl110_post_load(void *opaque, int version_id)
437 {
438 pl110_state *s = opaque;
439 /* Make sure we redraw, and at the right size */
440 pl110_invalidate_display(s);
441 return 0;
442 }
443
444 static int pl110_init(SysBusDevice *dev)
445 {
446 pl110_state *s = FROM_SYSBUS(pl110_state, dev);
447
448 memory_region_init_io(&s->iomem, &pl110_ops, s, "pl110", 0x1000);
449 sysbus_init_mmio(dev, &s->iomem);
450 sysbus_init_irq(dev, &s->irq);
451 qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1);
452 s->ds = graphic_console_init(pl110_update_display,
453 pl110_invalidate_display,
454 NULL, NULL, s);
455 return 0;
456 }
457
458 static int pl110_versatile_init(SysBusDevice *dev)
459 {
460 pl110_state *s = FROM_SYSBUS(pl110_state, dev);
461 s->version = PL110_VERSATILE;
462 return pl110_init(dev);
463 }
464
465 static int pl111_init(SysBusDevice *dev)
466 {
467 pl110_state *s = FROM_SYSBUS(pl110_state, dev);
468 s->version = PL111;
469 return pl110_init(dev);
470 }
471
472 static void pl110_class_init(ObjectClass *klass, void *data)
473 {
474 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
475
476 k->init = pl110_init;
477 }
478
479 static DeviceInfo pl110_info = {
480 .name = "pl110",
481 .size = sizeof(pl110_state),
482 .vmsd = &vmstate_pl110,
483 .no_user = 1,
484 .class_init = pl110_class_init,
485 };
486
487 static void pl110_versatile_class_init(ObjectClass *klass, void *data)
488 {
489 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
490
491 k->init = pl110_versatile_init;
492 }
493
494 static DeviceInfo pl110_versatile_info = {
495 .name = "pl110_versatile",
496 .size = sizeof(pl110_state),
497 .vmsd = &vmstate_pl110,
498 .no_user = 1,
499 .class_init = pl110_versatile_class_init,
500 };
501
502 static void pl111_class_init(ObjectClass *klass, void *data)
503 {
504 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
505
506 k->init = pl111_init;
507 }
508
509 static DeviceInfo pl111_info = {
510 .name = "pl111",
511 .size = sizeof(pl110_state),
512 .vmsd = &vmstate_pl110,
513 .no_user = 1,
514 .class_init = pl111_class_init,
515 };
516
517 static void pl110_register_devices(void)
518 {
519 sysbus_register_withprop(&pl110_info);
520 sysbus_register_withprop(&pl110_versatile_info);
521 sysbus_register_withprop(&pl111_info);
522 }
523
524 device_init(pl110_register_devices)