hw/arm/raspi: fix CPRMAN base address
[qemu.git] / hw / ppc / e500plat.c
1 /*
2 * Generic device-tree-driven paravirt PPC e500 platform
3 *
4 * Copyright 2012 Freescale Semiconductor, Inc.
5 *
6 * This is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12 #include "qemu/osdep.h"
13 #include "qemu/units.h"
14 #include "e500.h"
15 #include "hw/net/fsl_etsec/etsec.h"
16 #include "sysemu/device_tree.h"
17 #include "sysemu/kvm.h"
18 #include "hw/sysbus.h"
19 #include "hw/pci/pci.h"
20 #include "hw/ppc/openpic.h"
21 #include "kvm_ppc.h"
22
23 static void e500plat_fixup_devtree(void *fdt)
24 {
25 const char model[] = "QEMU ppce500";
26 const char compatible[] = "fsl,qemu-e500";
27
28 qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model));
29 qemu_fdt_setprop(fdt, "/", "compatible", compatible,
30 sizeof(compatible));
31 }
32
33 static void e500plat_init(MachineState *machine)
34 {
35 PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(machine);
36 /* Older KVM versions don't support EPR which breaks guests when we announce
37 MPIC variants that support EPR. Revert to an older one for those */
38 if (kvm_enabled() && !kvmppc_has_cap_epr()) {
39 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
40 }
41
42 ppce500_init(machine);
43 }
44
45 static void e500plat_machine_device_plug_cb(HotplugHandler *hotplug_dev,
46 DeviceState *dev, Error **errp)
47 {
48 PPCE500MachineState *pms = PPCE500_MACHINE(hotplug_dev);
49
50 if (pms->pbus_dev) {
51 if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) {
52 platform_bus_link_device(pms->pbus_dev, SYS_BUS_DEVICE(dev));
53 }
54 }
55 }
56
57 static
58 HotplugHandler *e500plat_machine_get_hotpug_handler(MachineState *machine,
59 DeviceState *dev)
60 {
61 if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) {
62 return HOTPLUG_HANDLER(machine);
63 }
64
65 return NULL;
66 }
67
68 #define TYPE_E500PLAT_MACHINE MACHINE_TYPE_NAME("ppce500")
69
70 static void e500plat_machine_class_init(ObjectClass *oc, void *data)
71 {
72 PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);
73 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
74 MachineClass *mc = MACHINE_CLASS(oc);
75
76 assert(!mc->get_hotplug_handler);
77 mc->get_hotplug_handler = e500plat_machine_get_hotpug_handler;
78 hc->plug = e500plat_machine_device_plug_cb;
79
80 pmc->pci_first_slot = 0x1;
81 pmc->pci_nr_slots = PCI_SLOT_MAX - 1;
82 pmc->fixup_devtree = e500plat_fixup_devtree;
83 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_42;
84 pmc->has_mpc8xxx_gpio = true;
85 pmc->has_platform_bus = true;
86 pmc->platform_bus_base = 0xf00000000ULL;
87 pmc->platform_bus_size = 128 * MiB;
88 pmc->platform_bus_first_irq = 5;
89 pmc->platform_bus_num_irqs = 10;
90 pmc->ccsrbar_base = 0xFE0000000ULL;
91 pmc->pci_pio_base = 0xFE1000000ULL;
92 pmc->pci_mmio_base = 0xC00000000ULL;
93 pmc->pci_mmio_bus_base = 0xE0000000ULL;
94 pmc->spin_base = 0xFEF000000ULL;
95
96 mc->desc = "generic paravirt e500 platform";
97 mc->init = e500plat_init;
98 mc->max_cpus = 32;
99 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
100 mc->default_ram_id = "mpc8544ds.ram";
101 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ETSEC_COMMON);
102 }
103
104 static const TypeInfo e500plat_info = {
105 .name = TYPE_E500PLAT_MACHINE,
106 .parent = TYPE_PPCE500_MACHINE,
107 .class_init = e500plat_machine_class_init,
108 .interfaces = (InterfaceInfo[]) {
109 { TYPE_HOTPLUG_HANDLER },
110 { }
111 }
112 };
113
114 static void e500plat_register_types(void)
115 {
116 type_register_static(&e500plat_info);
117 }
118 type_init(e500plat_register_types)