cpu: Move halted and interrupt_request fields to CPUState
[qemu.git] / hw / ppc / spapr.c
1 /*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 *
26 */
27 #include "sysemu/sysemu.h"
28 #include "hw/hw.h"
29 #include "elf.h"
30 #include "net/net.h"
31 #include "sysemu/blockdev.h"
32 #include "sysemu/cpus.h"
33 #include "sysemu/kvm.h"
34 #include "kvm_ppc.h"
35
36 #include "hw/boards.h"
37 #include "hw/ppc.h"
38 #include "hw/loader.h"
39
40 #include "hw/spapr.h"
41 #include "hw/spapr_vio.h"
42 #include "hw/spapr_pci.h"
43 #include "hw/xics.h"
44 #include "hw/pci/msi.h"
45
46 #include "sysemu/kvm.h"
47 #include "kvm_ppc.h"
48 #include "hw/pci/pci.h"
49
50 #include "exec/address-spaces.h"
51 #include "hw/usb.h"
52 #include "qemu/config-file.h"
53
54 #include <libfdt.h>
55
56 /* SLOF memory layout:
57 *
58 * SLOF raw image loaded at 0, copies its romfs right below the flat
59 * device-tree, then position SLOF itself 31M below that
60 *
61 * So we set FW_OVERHEAD to 40MB which should account for all of that
62 * and more
63 *
64 * We load our kernel at 4M, leaving space for SLOF initial image
65 */
66 #define FDT_MAX_SIZE 0x10000
67 #define RTAS_MAX_SIZE 0x10000
68 #define FW_MAX_SIZE 0x400000
69 #define FW_FILE_NAME "slof.bin"
70 #define FW_OVERHEAD 0x2800000
71 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
72
73 #define MIN_RMA_SLOF 128UL
74
75 #define TIMEBASE_FREQ 512000000ULL
76
77 #define MAX_CPUS 256
78 #define XICS_IRQS 1024
79
80 #define PHANDLE_XICP 0x00001111
81
82 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
83
84 sPAPREnvironment *spapr;
85
86 int spapr_allocate_irq(int hint, bool lsi)
87 {
88 int irq;
89
90 if (hint) {
91 irq = hint;
92 /* FIXME: we should probably check for collisions somehow */
93 } else {
94 irq = spapr->next_irq++;
95 }
96
97 /* Configure irq type */
98 if (!xics_get_qirq(spapr->icp, irq)) {
99 return 0;
100 }
101
102 xics_set_irq_type(spapr->icp, irq, lsi);
103
104 return irq;
105 }
106
107 /* Allocate block of consequtive IRQs, returns a number of the first */
108 int spapr_allocate_irq_block(int num, bool lsi)
109 {
110 int first = -1;
111 int i;
112
113 for (i = 0; i < num; ++i) {
114 int irq;
115
116 irq = spapr_allocate_irq(0, lsi);
117 if (!irq) {
118 return -1;
119 }
120
121 if (0 == i) {
122 first = irq;
123 }
124
125 /* If the above doesn't create a consecutive block then that's
126 * an internal bug */
127 assert(irq == (first + i));
128 }
129
130 return first;
131 }
132
133 static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr)
134 {
135 int ret = 0, offset;
136 CPUPPCState *env;
137 CPUState *cpu;
138 char cpu_model[32];
139 int smt = kvmppc_smt_threads();
140 uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
141
142 assert(spapr->cpu_model);
143
144 for (env = first_cpu; env != NULL; env = env->next_cpu) {
145 cpu = CPU(ppc_env_get_cpu(env));
146 uint32_t associativity[] = {cpu_to_be32(0x5),
147 cpu_to_be32(0x0),
148 cpu_to_be32(0x0),
149 cpu_to_be32(0x0),
150 cpu_to_be32(cpu->numa_node),
151 cpu_to_be32(cpu->cpu_index)};
152
153 if ((cpu->cpu_index % smt) != 0) {
154 continue;
155 }
156
157 snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model,
158 cpu->cpu_index);
159
160 offset = fdt_path_offset(fdt, cpu_model);
161 if (offset < 0) {
162 return offset;
163 }
164
165 if (nb_numa_nodes > 1) {
166 ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
167 sizeof(associativity));
168 if (ret < 0) {
169 return ret;
170 }
171 }
172
173 ret = fdt_setprop(fdt, offset, "ibm,pft-size",
174 pft_size_prop, sizeof(pft_size_prop));
175 if (ret < 0) {
176 return ret;
177 }
178 }
179 return ret;
180 }
181
182
183 static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
184 size_t maxsize)
185 {
186 size_t maxcells = maxsize / sizeof(uint32_t);
187 int i, j, count;
188 uint32_t *p = prop;
189
190 for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) {
191 struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
192
193 if (!sps->page_shift) {
194 break;
195 }
196 for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) {
197 if (sps->enc[count].page_shift == 0) {
198 break;
199 }
200 }
201 if ((p - prop) >= (maxcells - 3 - count * 2)) {
202 break;
203 }
204 *(p++) = cpu_to_be32(sps->page_shift);
205 *(p++) = cpu_to_be32(sps->slb_enc);
206 *(p++) = cpu_to_be32(count);
207 for (j = 0; j < count; j++) {
208 *(p++) = cpu_to_be32(sps->enc[j].page_shift);
209 *(p++) = cpu_to_be32(sps->enc[j].pte_enc);
210 }
211 }
212
213 return (p - prop) * sizeof(uint32_t);
214 }
215
216 #define _FDT(exp) \
217 do { \
218 int ret = (exp); \
219 if (ret < 0) { \
220 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
221 #exp, fdt_strerror(ret)); \
222 exit(1); \
223 } \
224 } while (0)
225
226
227 static void *spapr_create_fdt_skel(const char *cpu_model,
228 hwaddr initrd_base,
229 hwaddr initrd_size,
230 hwaddr kernel_size,
231 const char *boot_device,
232 const char *kernel_cmdline,
233 uint32_t epow_irq)
234 {
235 void *fdt;
236 CPUPPCState *env;
237 uint32_t start_prop = cpu_to_be32(initrd_base);
238 uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
239 char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
240 "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
241 char qemu_hypertas_prop[] = "hcall-memop1";
242 uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
243 uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
244 char *modelname;
245 int i, smt = kvmppc_smt_threads();
246 unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
247
248 fdt = g_malloc0(FDT_MAX_SIZE);
249 _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
250
251 if (kernel_size) {
252 _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size)));
253 }
254 if (initrd_size) {
255 _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size)));
256 }
257 _FDT((fdt_finish_reservemap(fdt)));
258
259 /* Root node */
260 _FDT((fdt_begin_node(fdt, "")));
261 _FDT((fdt_property_string(fdt, "device_type", "chrp")));
262 _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
263 _FDT((fdt_property_string(fdt, "compatible", "qemu,pseries")));
264
265 _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
266 _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
267
268 /* /chosen */
269 _FDT((fdt_begin_node(fdt, "chosen")));
270
271 /* Set Form1_affinity */
272 _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5))));
273
274 _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
275 _FDT((fdt_property(fdt, "linux,initrd-start",
276 &start_prop, sizeof(start_prop))));
277 _FDT((fdt_property(fdt, "linux,initrd-end",
278 &end_prop, sizeof(end_prop))));
279 if (kernel_size) {
280 uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
281 cpu_to_be64(kernel_size) };
282
283 _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop))));
284 }
285 if (boot_device) {
286 _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
287 }
288 _FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width)));
289 _FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height)));
290 _FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth)));
291
292 _FDT((fdt_end_node(fdt)));
293
294 /* cpus */
295 _FDT((fdt_begin_node(fdt, "cpus")));
296
297 _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
298 _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
299
300 modelname = g_strdup(cpu_model);
301
302 for (i = 0; i < strlen(modelname); i++) {
303 modelname[i] = toupper(modelname[i]);
304 }
305
306 /* This is needed during FDT finalization */
307 spapr->cpu_model = g_strdup(modelname);
308
309 for (env = first_cpu; env != NULL; env = env->next_cpu) {
310 CPUState *cpu = CPU(ppc_env_get_cpu(env));
311 int index = cpu->cpu_index;
312 uint32_t servers_prop[smp_threads];
313 uint32_t gservers_prop[smp_threads * 2];
314 char *nodename;
315 uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
316 0xffffffff, 0xffffffff};
317 uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
318 uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
319 uint32_t page_sizes_prop[64];
320 size_t page_sizes_prop_size;
321
322 if ((index % smt) != 0) {
323 continue;
324 }
325
326 nodename = g_strdup_printf("%s@%x", modelname, index);
327
328 _FDT((fdt_begin_node(fdt, nodename)));
329
330 g_free(nodename);
331
332 _FDT((fdt_property_cell(fdt, "reg", index)));
333 _FDT((fdt_property_string(fdt, "device_type", "cpu")));
334
335 _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
336 _FDT((fdt_property_cell(fdt, "dcache-block-size",
337 env->dcache_line_size)));
338 _FDT((fdt_property_cell(fdt, "icache-block-size",
339 env->icache_line_size)));
340 _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
341 _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
342 _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
343 _FDT((fdt_property_string(fdt, "status", "okay")));
344 _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
345
346 /* Build interrupt servers and gservers properties */
347 for (i = 0; i < smp_threads; i++) {
348 servers_prop[i] = cpu_to_be32(index + i);
349 /* Hack, direct the group queues back to cpu 0 */
350 gservers_prop[i*2] = cpu_to_be32(index + i);
351 gservers_prop[i*2 + 1] = 0;
352 }
353 _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
354 servers_prop, sizeof(servers_prop))));
355 _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
356 gservers_prop, sizeof(gservers_prop))));
357
358 if (env->mmu_model & POWERPC_MMU_1TSEG) {
359 _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
360 segs, sizeof(segs))));
361 }
362
363 /* Advertise VMX/VSX (vector extensions) if available
364 * 0 / no property == no vector extensions
365 * 1 == VMX / Altivec available
366 * 2 == VSX available */
367 if (env->insns_flags & PPC_ALTIVEC) {
368 uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
369
370 _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
371 }
372
373 /* Advertise DFP (Decimal Floating Point) if available
374 * 0 / no property == no DFP
375 * 1 == DFP available */
376 if (env->insns_flags2 & PPC2_DFP) {
377 _FDT((fdt_property_cell(fdt, "ibm,dfp", 1)));
378 }
379
380 page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop,
381 sizeof(page_sizes_prop));
382 if (page_sizes_prop_size) {
383 _FDT((fdt_property(fdt, "ibm,segment-page-sizes",
384 page_sizes_prop, page_sizes_prop_size)));
385 }
386
387 _FDT((fdt_end_node(fdt)));
388 }
389
390 g_free(modelname);
391
392 _FDT((fdt_end_node(fdt)));
393
394 /* RTAS */
395 _FDT((fdt_begin_node(fdt, "rtas")));
396
397 _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
398 sizeof(hypertas_prop))));
399 _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
400 sizeof(qemu_hypertas_prop))));
401
402 _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
403 refpoints, sizeof(refpoints))));
404
405 _FDT((fdt_property_cell(fdt, "rtas-error-log-max", RTAS_ERROR_LOG_MAX)));
406
407 _FDT((fdt_end_node(fdt)));
408
409 /* interrupt controller */
410 _FDT((fdt_begin_node(fdt, "interrupt-controller")));
411
412 _FDT((fdt_property_string(fdt, "device_type",
413 "PowerPC-External-Interrupt-Presentation")));
414 _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
415 _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
416 _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
417 interrupt_server_ranges_prop,
418 sizeof(interrupt_server_ranges_prop))));
419 _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
420 _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
421 _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
422
423 _FDT((fdt_end_node(fdt)));
424
425 /* vdevice */
426 _FDT((fdt_begin_node(fdt, "vdevice")));
427
428 _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
429 _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
430 _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
431 _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
432 _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
433 _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
434
435 _FDT((fdt_end_node(fdt)));
436
437 /* event-sources */
438 spapr_events_fdt_skel(fdt, epow_irq);
439
440 _FDT((fdt_end_node(fdt))); /* close root node */
441 _FDT((fdt_finish(fdt)));
442
443 return fdt;
444 }
445
446 static int spapr_populate_memory(sPAPREnvironment *spapr, void *fdt)
447 {
448 uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
449 cpu_to_be32(0x0), cpu_to_be32(0x0),
450 cpu_to_be32(0x0)};
451 char mem_name[32];
452 hwaddr node0_size, mem_start;
453 uint64_t mem_reg_property[2];
454 int i, off;
455
456 /* memory node(s) */
457 node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size;
458 if (spapr->rma_size > node0_size) {
459 spapr->rma_size = node0_size;
460 }
461
462 /* RMA */
463 mem_reg_property[0] = 0;
464 mem_reg_property[1] = cpu_to_be64(spapr->rma_size);
465 off = fdt_add_subnode(fdt, 0, "memory@0");
466 _FDT(off);
467 _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
468 _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
469 sizeof(mem_reg_property))));
470 _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
471 sizeof(associativity))));
472
473 /* RAM: Node 0 */
474 if (node0_size > spapr->rma_size) {
475 mem_reg_property[0] = cpu_to_be64(spapr->rma_size);
476 mem_reg_property[1] = cpu_to_be64(node0_size - spapr->rma_size);
477
478 sprintf(mem_name, "memory@" TARGET_FMT_lx, spapr->rma_size);
479 off = fdt_add_subnode(fdt, 0, mem_name);
480 _FDT(off);
481 _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
482 _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
483 sizeof(mem_reg_property))));
484 _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
485 sizeof(associativity))));
486 }
487
488 /* RAM: Node 1 and beyond */
489 mem_start = node0_size;
490 for (i = 1; i < nb_numa_nodes; i++) {
491 mem_reg_property[0] = cpu_to_be64(mem_start);
492 mem_reg_property[1] = cpu_to_be64(node_mem[i]);
493 associativity[3] = associativity[4] = cpu_to_be32(i);
494 sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
495 off = fdt_add_subnode(fdt, 0, mem_name);
496 _FDT(off);
497 _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
498 _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
499 sizeof(mem_reg_property))));
500 _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
501 sizeof(associativity))));
502 mem_start += node_mem[i];
503 }
504
505 return 0;
506 }
507
508 static void spapr_finalize_fdt(sPAPREnvironment *spapr,
509 hwaddr fdt_addr,
510 hwaddr rtas_addr,
511 hwaddr rtas_size)
512 {
513 int ret;
514 void *fdt;
515 sPAPRPHBState *phb;
516
517 fdt = g_malloc(FDT_MAX_SIZE);
518
519 /* open out the base tree into a temp buffer for the final tweaks */
520 _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
521
522 ret = spapr_populate_memory(spapr, fdt);
523 if (ret < 0) {
524 fprintf(stderr, "couldn't setup memory nodes in fdt\n");
525 exit(1);
526 }
527
528 ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
529 if (ret < 0) {
530 fprintf(stderr, "couldn't setup vio devices in fdt\n");
531 exit(1);
532 }
533
534 QLIST_FOREACH(phb, &spapr->phbs, list) {
535 ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
536 }
537
538 if (ret < 0) {
539 fprintf(stderr, "couldn't setup PCI devices in fdt\n");
540 exit(1);
541 }
542
543 /* RTAS */
544 ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
545 if (ret < 0) {
546 fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
547 }
548
549 /* Advertise NUMA via ibm,associativity */
550 ret = spapr_fixup_cpu_dt(fdt, spapr);
551 if (ret < 0) {
552 fprintf(stderr, "Couldn't finalize CPU device tree properties\n");
553 }
554
555 if (!spapr->has_graphics) {
556 spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
557 }
558
559 _FDT((fdt_pack(fdt)));
560
561 if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
562 hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
563 fdt_totalsize(fdt), FDT_MAX_SIZE);
564 exit(1);
565 }
566
567 cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
568
569 g_free(fdt);
570 }
571
572 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
573 {
574 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
575 }
576
577 static void emulate_spapr_hypercall(PowerPCCPU *cpu)
578 {
579 CPUPPCState *env = &cpu->env;
580
581 if (msr_pr) {
582 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
583 env->gpr[3] = H_PRIVILEGE;
584 } else {
585 env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
586 }
587 }
588
589 static void spapr_reset_htab(sPAPREnvironment *spapr)
590 {
591 long shift;
592
593 /* allocate hash page table. For now we always make this 16mb,
594 * later we should probably make it scale to the size of guest
595 * RAM */
596
597 shift = kvmppc_reset_htab(spapr->htab_shift);
598
599 if (shift > 0) {
600 /* Kernel handles htab, we don't need to allocate one */
601 spapr->htab_shift = shift;
602 } else {
603 if (!spapr->htab) {
604 /* Allocate an htab if we don't yet have one */
605 spapr->htab = qemu_memalign(HTAB_SIZE(spapr), HTAB_SIZE(spapr));
606 }
607
608 /* And clear it */
609 memset(spapr->htab, 0, HTAB_SIZE(spapr));
610 }
611
612 /* Update the RMA size if necessary */
613 if (spapr->vrma_adjust) {
614 spapr->rma_size = kvmppc_rma_size(ram_size, spapr->htab_shift);
615 }
616 }
617
618 static void ppc_spapr_reset(void)
619 {
620 CPUState *first_cpu_cpu;
621
622 /* Reset the hash table & recalc the RMA */
623 spapr_reset_htab(spapr);
624
625 qemu_devices_reset();
626
627 /* Load the fdt */
628 spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
629 spapr->rtas_size);
630
631 /* Set up the entry state */
632 first_cpu_cpu = CPU(first_cpu);
633 first_cpu->gpr[3] = spapr->fdt_addr;
634 first_cpu->gpr[5] = 0;
635 first_cpu_cpu->halted = 0;
636 first_cpu->nip = spapr->entry_point;
637
638 }
639
640 static void spapr_cpu_reset(void *opaque)
641 {
642 PowerPCCPU *cpu = opaque;
643 CPUState *cs = CPU(cpu);
644 CPUPPCState *env = &cpu->env;
645
646 cpu_reset(cs);
647
648 /* All CPUs start halted. CPU0 is unhalted from the machine level
649 * reset code and the rest are explicitly started up by the guest
650 * using an RTAS call */
651 cs->halted = 1;
652
653 env->spr[SPR_HIOR] = 0;
654
655 env->external_htab = spapr->htab;
656 env->htab_base = -1;
657 env->htab_mask = HTAB_SIZE(spapr) - 1;
658 env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
659 (spapr->htab_shift - 18);
660 }
661
662 static void spapr_create_nvram(sPAPREnvironment *spapr)
663 {
664 QemuOpts *machine_opts;
665 DeviceState *dev;
666
667 dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
668
669 machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
670 if (machine_opts) {
671 const char *drivename;
672
673 drivename = qemu_opt_get(machine_opts, "nvram");
674 if (drivename) {
675 BlockDriverState *bs;
676
677 bs = bdrv_find(drivename);
678 if (!bs) {
679 fprintf(stderr, "No such block device \"%s\" for nvram\n",
680 drivename);
681 exit(1);
682 }
683 qdev_prop_set_drive_nofail(dev, "drive", bs);
684 }
685 }
686
687 qdev_init_nofail(dev);
688
689 spapr->nvram = (struct sPAPRNVRAM *)dev;
690 }
691
692 /* Returns whether we want to use VGA or not */
693 static int spapr_vga_init(PCIBus *pci_bus)
694 {
695 switch (vga_interface_type) {
696 case VGA_NONE:
697 case VGA_STD:
698 return pci_vga_init(pci_bus) != NULL;
699 default:
700 fprintf(stderr, "This vga model is not supported,"
701 "currently it only supports -vga std\n");
702 exit(0);
703 break;
704 }
705 }
706
707 /* pSeries LPAR / sPAPR hardware init */
708 static void ppc_spapr_init(QEMUMachineInitArgs *args)
709 {
710 ram_addr_t ram_size = args->ram_size;
711 const char *cpu_model = args->cpu_model;
712 const char *kernel_filename = args->kernel_filename;
713 const char *kernel_cmdline = args->kernel_cmdline;
714 const char *initrd_filename = args->initrd_filename;
715 const char *boot_device = args->boot_device;
716 PowerPCCPU *cpu;
717 CPUPPCState *env;
718 PCIHostState *phb;
719 int i;
720 MemoryRegion *sysmem = get_system_memory();
721 MemoryRegion *ram = g_new(MemoryRegion, 1);
722 hwaddr rma_alloc_size;
723 uint32_t initrd_base = 0;
724 long kernel_size = 0, initrd_size = 0;
725 long load_limit, rtas_limit, fw_size;
726 char *filename;
727
728 msi_supported = true;
729
730 spapr = g_malloc0(sizeof(*spapr));
731 QLIST_INIT(&spapr->phbs);
732
733 cpu_ppc_hypercall = emulate_spapr_hypercall;
734
735 /* Allocate RMA if necessary */
736 rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
737
738 if (rma_alloc_size == -1) {
739 hw_error("qemu: Unable to create RMA\n");
740 exit(1);
741 }
742
743 if (rma_alloc_size && (rma_alloc_size < ram_size)) {
744 spapr->rma_size = rma_alloc_size;
745 } else {
746 spapr->rma_size = ram_size;
747
748 /* With KVM, we don't actually know whether KVM supports an
749 * unbounded RMA (PR KVM) or is limited by the hash table size
750 * (HV KVM using VRMA), so we always assume the latter
751 *
752 * In that case, we also limit the initial allocations for RTAS
753 * etc... to 256M since we have no way to know what the VRMA size
754 * is going to be as it depends on the size of the hash table
755 * isn't determined yet.
756 */
757 if (kvm_enabled()) {
758 spapr->vrma_adjust = 1;
759 spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
760 }
761 }
762
763 /* We place the device tree and RTAS just below either the top of the RMA,
764 * or just below 2GB, whichever is lowere, so that it can be
765 * processed with 32-bit real mode code if necessary */
766 rtas_limit = MIN(spapr->rma_size, 0x80000000);
767 spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE;
768 spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE;
769 load_limit = spapr->fdt_addr - FW_OVERHEAD;
770
771 /* We aim for a hash table of size 1/128 the size of RAM. The
772 * normal rule of thumb is 1/64 the size of RAM, but that's much
773 * more than needed for the Linux guests we support. */
774 spapr->htab_shift = 18; /* Minimum architected size */
775 while (spapr->htab_shift <= 46) {
776 if ((1ULL << (spapr->htab_shift + 7)) >= ram_size) {
777 break;
778 }
779 spapr->htab_shift++;
780 }
781
782 /* init CPUs */
783 if (cpu_model == NULL) {
784 cpu_model = kvm_enabled() ? "host" : "POWER7";
785 }
786 for (i = 0; i < smp_cpus; i++) {
787 cpu = cpu_ppc_init(cpu_model);
788 if (cpu == NULL) {
789 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
790 exit(1);
791 }
792 env = &cpu->env;
793
794 /* Set time-base frequency to 512 MHz */
795 cpu_ppc_tb_init(env, TIMEBASE_FREQ);
796
797 /* PAPR always has exception vectors in RAM not ROM */
798 env->hreset_excp_prefix = 0;
799
800 /* Tell KVM that we're in PAPR mode */
801 if (kvm_enabled()) {
802 kvmppc_set_papr(cpu);
803 }
804
805 qemu_register_reset(spapr_cpu_reset, cpu);
806 }
807
808 /* allocate RAM */
809 spapr->ram_limit = ram_size;
810 if (spapr->ram_limit > rma_alloc_size) {
811 ram_addr_t nonrma_base = rma_alloc_size;
812 ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
813
814 memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
815 vmstate_register_ram_global(ram);
816 memory_region_add_subregion(sysmem, nonrma_base, ram);
817 }
818
819 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
820 spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
821 rtas_limit - spapr->rtas_addr);
822 if (spapr->rtas_size < 0) {
823 hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
824 exit(1);
825 }
826 if (spapr->rtas_size > RTAS_MAX_SIZE) {
827 hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
828 spapr->rtas_size, RTAS_MAX_SIZE);
829 exit(1);
830 }
831 g_free(filename);
832
833
834 /* Set up Interrupt Controller */
835 spapr->icp = xics_system_init(XICS_IRQS);
836 spapr->next_irq = XICS_IRQ_BASE;
837
838 /* Set up EPOW events infrastructure */
839 spapr_events_init(spapr);
840
841 /* Set up IOMMU */
842 spapr_iommu_init();
843
844 /* Set up VIO bus */
845 spapr->vio_bus = spapr_vio_bus_init();
846
847 for (i = 0; i < MAX_SERIAL_PORTS; i++) {
848 if (serial_hds[i]) {
849 spapr_vty_create(spapr->vio_bus, serial_hds[i]);
850 }
851 }
852
853 /* We always have at least the nvram device on VIO */
854 spapr_create_nvram(spapr);
855
856 /* Set up PCI */
857 spapr_pci_rtas_init();
858
859 phb = spapr_create_phb(spapr, 0, "pci");
860
861 for (i = 0; i < nb_nics; i++) {
862 NICInfo *nd = &nd_table[i];
863
864 if (!nd->model) {
865 nd->model = g_strdup("ibmveth");
866 }
867
868 if (strcmp(nd->model, "ibmveth") == 0) {
869 spapr_vlan_create(spapr->vio_bus, nd);
870 } else {
871 pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
872 }
873 }
874
875 for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
876 spapr_vscsi_create(spapr->vio_bus);
877 }
878
879 /* Graphics */
880 if (spapr_vga_init(phb->bus)) {
881 spapr->has_graphics = true;
882 }
883
884 if (usb_enabled(spapr->has_graphics)) {
885 pci_create_simple(phb->bus, -1, "pci-ohci");
886 if (spapr->has_graphics) {
887 usbdevice_create("keyboard");
888 usbdevice_create("mouse");
889 }
890 }
891
892 if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
893 fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
894 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
895 exit(1);
896 }
897
898 if (kernel_filename) {
899 uint64_t lowaddr = 0;
900
901 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
902 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
903 if (kernel_size < 0) {
904 kernel_size = load_image_targphys(kernel_filename,
905 KERNEL_LOAD_ADDR,
906 load_limit - KERNEL_LOAD_ADDR);
907 }
908 if (kernel_size < 0) {
909 fprintf(stderr, "qemu: could not load kernel '%s'\n",
910 kernel_filename);
911 exit(1);
912 }
913
914 /* load initrd */
915 if (initrd_filename) {
916 /* Try to locate the initrd in the gap between the kernel
917 * and the firmware. Add a bit of space just in case
918 */
919 initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff;
920 initrd_size = load_image_targphys(initrd_filename, initrd_base,
921 load_limit - initrd_base);
922 if (initrd_size < 0) {
923 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
924 initrd_filename);
925 exit(1);
926 }
927 } else {
928 initrd_base = 0;
929 initrd_size = 0;
930 }
931 }
932
933 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
934 fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
935 if (fw_size < 0) {
936 hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
937 exit(1);
938 }
939 g_free(filename);
940
941 spapr->entry_point = 0x100;
942
943 /* Prepare the device tree */
944 spapr->fdt_skel = spapr_create_fdt_skel(cpu_model,
945 initrd_base, initrd_size,
946 kernel_size,
947 boot_device, kernel_cmdline,
948 spapr->epow_irq);
949 assert(spapr->fdt_skel != NULL);
950 }
951
952 static QEMUMachine spapr_machine = {
953 .name = "pseries",
954 .desc = "pSeries Logical Partition (PAPR compliant)",
955 .init = ppc_spapr_init,
956 .reset = ppc_spapr_reset,
957 .block_default_type = IF_SCSI,
958 .max_cpus = MAX_CPUS,
959 .no_parallel = 1,
960 .boot_order = NULL,
961 };
962
963 static void spapr_machine_init(void)
964 {
965 qemu_register_machine(&spapr_machine);
966 }
967
968 machine_init(spapr_machine_init);