Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' into staging
[qemu.git] / hw / ppc / spapr_caps.c
1 /*
2 * QEMU PowerPC pSeries Logical Partition capabilities handling
3 *
4 * Copyright (c) 2017 David Gibson, Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "qemu/error-report.h"
27 #include "qapi/error.h"
28 #include "qapi/visitor.h"
29 #include "sysemu/hw_accel.h"
30 #include "exec/ram_addr.h"
31 #include "target/ppc/cpu.h"
32 #include "target/ppc/mmu-hash64.h"
33 #include "cpu-models.h"
34 #include "kvm_ppc.h"
35 #include "migration/vmstate.h"
36 #include "sysemu/qtest.h"
37 #include "sysemu/tcg.h"
38
39 #include "hw/ppc/spapr.h"
40
41 typedef struct SpaprCapPossible {
42 int num; /* size of vals array below */
43 const char *help; /* help text for vals */
44 /*
45 * Note:
46 * - because of the way compatibility is determined vals MUST be ordered
47 * such that later options are a superset of all preceding options.
48 * - the order of vals must be preserved, that is their index is important,
49 * however vals may be added to the end of the list so long as the above
50 * point is observed
51 */
52 const char *vals[];
53 } SpaprCapPossible;
54
55 typedef struct SpaprCapabilityInfo {
56 const char *name;
57 const char *description;
58 int index;
59
60 /* Getter and Setter Function Pointers */
61 ObjectPropertyAccessor *get;
62 ObjectPropertyAccessor *set;
63 const char *type;
64 /* Possible values if this is a custom string type */
65 SpaprCapPossible *possible;
66 /* Make sure the virtual hardware can support this capability */
67 void (*apply)(SpaprMachineState *spapr, uint8_t val, Error **errp);
68 void (*cpu_apply)(SpaprMachineState *spapr, PowerPCCPU *cpu,
69 uint8_t val, Error **errp);
70 bool (*migrate_needed)(void *opaque);
71 } SpaprCapabilityInfo;
72
73 static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name,
74 void *opaque, Error **errp)
75 {
76 SpaprCapabilityInfo *cap = opaque;
77 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
78 bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON;
79
80 visit_type_bool(v, name, &value, errp);
81 }
82
83 static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name,
84 void *opaque, Error **errp)
85 {
86 SpaprCapabilityInfo *cap = opaque;
87 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
88 bool value;
89
90 if (!visit_type_bool(v, name, &value, errp)) {
91 return;
92 }
93
94 spapr->cmd_line_caps[cap->index] = true;
95 spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF;
96 }
97
98
99 static void spapr_cap_get_string(Object *obj, Visitor *v, const char *name,
100 void *opaque, Error **errp)
101 {
102 SpaprCapabilityInfo *cap = opaque;
103 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
104 char *val = NULL;
105 uint8_t value = spapr_get_cap(spapr, cap->index);
106
107 if (value >= cap->possible->num) {
108 error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name);
109 return;
110 }
111
112 val = g_strdup(cap->possible->vals[value]);
113
114 visit_type_str(v, name, &val, errp);
115 g_free(val);
116 }
117
118 static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name,
119 void *opaque, Error **errp)
120 {
121 SpaprCapabilityInfo *cap = opaque;
122 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
123 uint8_t i;
124 char *val;
125
126 if (!visit_type_str(v, name, &val, errp)) {
127 return;
128 }
129
130 if (!strcmp(val, "?")) {
131 error_setg(errp, "%s", cap->possible->help);
132 goto out;
133 }
134 for (i = 0; i < cap->possible->num; i++) {
135 if (!strcasecmp(val, cap->possible->vals[i])) {
136 spapr->cmd_line_caps[cap->index] = true;
137 spapr->eff.caps[cap->index] = i;
138 goto out;
139 }
140 }
141
142 error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val,
143 cap->name);
144 out:
145 g_free(val);
146 }
147
148 static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name,
149 void *opaque, Error **errp)
150 {
151 SpaprCapabilityInfo *cap = opaque;
152 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
153 uint8_t val = spapr_get_cap(spapr, cap->index);
154 uint64_t pagesize = (1ULL << val);
155
156 visit_type_size(v, name, &pagesize, errp);
157 }
158
159 static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name,
160 void *opaque, Error **errp)
161 {
162 SpaprCapabilityInfo *cap = opaque;
163 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
164 uint64_t pagesize;
165 uint8_t val;
166
167 if (!visit_type_size(v, name, &pagesize, errp)) {
168 return;
169 }
170
171 if (!is_power_of_2(pagesize)) {
172 error_setg(errp, "cap-%s must be a power of 2", cap->name);
173 return;
174 }
175
176 val = ctz64(pagesize);
177 spapr->cmd_line_caps[cap->index] = true;
178 spapr->eff.caps[cap->index] = val;
179 }
180
181 static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
182 {
183 ERRP_GUARD();
184 if (!val) {
185 /* TODO: We don't support disabling htm yet */
186 return;
187 }
188 if (tcg_enabled()) {
189 error_setg(errp, "No Transactional Memory support in TCG");
190 error_append_hint(errp, "Try appending -machine cap-htm=off\n");
191 } else if (kvm_enabled() && !kvmppc_has_cap_htm()) {
192 error_setg(errp,
193 "KVM implementation does not support Transactional Memory");
194 error_append_hint(errp, "Try appending -machine cap-htm=off\n");
195 }
196 }
197
198 static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
199 {
200 ERRP_GUARD();
201 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
202 CPUPPCState *env = &cpu->env;
203
204 if (!val) {
205 /* TODO: We don't support disabling vsx yet */
206 return;
207 }
208 /* Allowable CPUs in spapr_cpu_core.c should already have gotten
209 * rid of anything that doesn't do VMX */
210 g_assert(env->insns_flags & PPC_ALTIVEC);
211 if (!(env->insns_flags2 & PPC2_VSX)) {
212 error_setg(errp, "VSX support not available");
213 error_append_hint(errp, "Try appending -machine cap-vsx=off\n");
214 }
215 }
216
217 static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
218 {
219 ERRP_GUARD();
220 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
221 CPUPPCState *env = &cpu->env;
222
223 if (!val) {
224 /* TODO: We don't support disabling dfp yet */
225 return;
226 }
227 if (!(env->insns_flags2 & PPC2_DFP)) {
228 error_setg(errp, "DFP support not available");
229 error_append_hint(errp, "Try appending -machine cap-dfp=off\n");
230 }
231 }
232
233 SpaprCapPossible cap_cfpc_possible = {
234 .num = 3,
235 .vals = {"broken", "workaround", "fixed"},
236 .help = "broken - no protection, workaround - workaround available,"
237 " fixed - fixed in hardware",
238 };
239
240 static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val,
241 Error **errp)
242 {
243 ERRP_GUARD();
244 uint8_t kvm_val = kvmppc_get_cap_safe_cache();
245
246 if (tcg_enabled() && val) {
247 /* TCG only supports broken, allow other values and print a warning */
248 warn_report("TCG doesn't support requested feature, cap-cfpc=%s",
249 cap_cfpc_possible.vals[val]);
250 } else if (kvm_enabled() && (val > kvm_val)) {
251 error_setg(errp,
252 "Requested safe cache capability level not supported by KVM");
253 error_append_hint(errp, "Try appending -machine cap-cfpc=%s\n",
254 cap_cfpc_possible.vals[kvm_val]);
255 }
256 }
257
258 SpaprCapPossible cap_sbbc_possible = {
259 .num = 3,
260 .vals = {"broken", "workaround", "fixed"},
261 .help = "broken - no protection, workaround - workaround available,"
262 " fixed - fixed in hardware",
263 };
264
265 static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val,
266 Error **errp)
267 {
268 ERRP_GUARD();
269 uint8_t kvm_val = kvmppc_get_cap_safe_bounds_check();
270
271 if (tcg_enabled() && val) {
272 /* TCG only supports broken, allow other values and print a warning */
273 warn_report("TCG doesn't support requested feature, cap-sbbc=%s",
274 cap_sbbc_possible.vals[val]);
275 } else if (kvm_enabled() && (val > kvm_val)) {
276 error_setg(errp,
277 "Requested safe bounds check capability level not supported by KVM");
278 error_append_hint(errp, "Try appending -machine cap-sbbc=%s\n",
279 cap_sbbc_possible.vals[kvm_val]);
280 }
281 }
282
283 SpaprCapPossible cap_ibs_possible = {
284 .num = 5,
285 /* Note workaround only maintained for compatibility */
286 .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"},
287 .help = "broken - no protection, workaround - count cache flush"
288 ", fixed-ibs - indirect branch serialisation,"
289 " fixed-ccd - cache count disabled,"
290 " fixed-na - fixed in hardware (no longer applicable)",
291 };
292
293 static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr,
294 uint8_t val, Error **errp)
295 {
296 ERRP_GUARD();
297 uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch();
298
299 if (tcg_enabled() && val) {
300 /* TCG only supports broken, allow other values and print a warning */
301 warn_report("TCG doesn't support requested feature, cap-ibs=%s",
302 cap_ibs_possible.vals[val]);
303 } else if (kvm_enabled() && (val > kvm_val)) {
304 error_setg(errp,
305 "Requested safe indirect branch capability level not supported by KVM");
306 error_append_hint(errp, "Try appending -machine cap-ibs=%s\n",
307 cap_ibs_possible.vals[kvm_val]);
308 }
309 }
310
311 #define VALUE_DESC_TRISTATE " (broken, workaround, fixed)"
312
313 bool spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize,
314 Error **errp)
315 {
316 hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]);
317
318 if (!kvmppc_hpt_needs_host_contiguous_pages()) {
319 return true;
320 }
321
322 if (maxpagesize > pagesize) {
323 error_setg(errp,
324 "Can't support %"HWADDR_PRIu" kiB guest pages with %"
325 HWADDR_PRIu" kiB host pages with this KVM implementation",
326 maxpagesize >> 10, pagesize >> 10);
327 return false;
328 }
329
330 return true;
331 }
332
333 static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr,
334 uint8_t val, Error **errp)
335 {
336 if (val < 12) {
337 error_setg(errp, "Require at least 4kiB hpt-max-page-size");
338 return;
339 } else if (val < 16) {
340 warn_report("Many guests require at least 64kiB hpt-max-page-size");
341 }
342
343 spapr_check_pagesize(spapr, qemu_minrampagesize(), errp);
344 }
345
346 static bool cap_hpt_maxpagesize_migrate_needed(void *opaque)
347 {
348 return !SPAPR_MACHINE_GET_CLASS(opaque)->pre_4_1_migration;
349 }
350
351 static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift,
352 uint32_t pshift)
353 {
354 unsigned maxshift = *((unsigned *)opaque);
355
356 assert(pshift >= seg_pshift);
357
358 /* Don't allow the guest to use pages bigger than the configured
359 * maximum size */
360 if (pshift > maxshift) {
361 return false;
362 }
363
364 /* For whatever reason, KVM doesn't allow multiple pagesizes
365 * within a segment, *except* for the case of 16M pages in a 4k or
366 * 64k segment. Always exclude other cases, so that TCG and KVM
367 * guests see a consistent environment */
368 if ((pshift != seg_pshift) && (pshift != 24)) {
369 return false;
370 }
371
372 return true;
373 }
374
375 static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState *spapr,
376 PowerPCCPU *cpu,
377 uint8_t val, Error **errp)
378 {
379 unsigned maxshift = val;
380
381 ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift);
382 }
383
384 static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr,
385 uint8_t val, Error **errp)
386 {
387 ERRP_GUARD();
388 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
389
390 if (!val) {
391 /* capability disabled by default */
392 return;
393 }
394
395 if (tcg_enabled()) {
396 error_setg(errp, "No Nested KVM-HV support in TCG");
397 error_append_hint(errp, "Try appending -machine cap-nested-hv=off\n");
398 } else if (kvm_enabled()) {
399 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0,
400 spapr->max_compat_pvr)) {
401 error_setg(errp, "Nested KVM-HV only supported on POWER9");
402 error_append_hint(errp,
403 "Try appending -machine max-cpu-compat=power9\n");
404 return;
405 }
406
407 if (!kvmppc_has_cap_nested_kvm_hv()) {
408 error_setg(errp,
409 "KVM implementation does not support Nested KVM-HV");
410 error_append_hint(errp,
411 "Try appending -machine cap-nested-hv=off\n");
412 } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) {
413 error_setg(errp, "Error enabling cap-nested-hv with KVM");
414 error_append_hint(errp,
415 "Try appending -machine cap-nested-hv=off\n");
416 }
417 }
418 }
419
420 static void cap_large_decr_apply(SpaprMachineState *spapr,
421 uint8_t val, Error **errp)
422 {
423 ERRP_GUARD();
424 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
425 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
426
427 if (!val) {
428 return; /* Disabled by default */
429 }
430
431 if (tcg_enabled()) {
432 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0,
433 spapr->max_compat_pvr)) {
434 error_setg(errp, "Large decrementer only supported on POWER9");
435 error_append_hint(errp, "Try -cpu POWER9\n");
436 return;
437 }
438 } else if (kvm_enabled()) {
439 int kvm_nr_bits = kvmppc_get_cap_large_decr();
440
441 if (!kvm_nr_bits) {
442 error_setg(errp, "No large decrementer support");
443 error_append_hint(errp,
444 "Try appending -machine cap-large-decr=off\n");
445 } else if (pcc->lrg_decr_bits != kvm_nr_bits) {
446 error_setg(errp,
447 "KVM large decrementer size (%d) differs to model (%d)",
448 kvm_nr_bits, pcc->lrg_decr_bits);
449 error_append_hint(errp,
450 "Try appending -machine cap-large-decr=off\n");
451 }
452 }
453 }
454
455 static void cap_large_decr_cpu_apply(SpaprMachineState *spapr,
456 PowerPCCPU *cpu,
457 uint8_t val, Error **errp)
458 {
459 ERRP_GUARD();
460 CPUPPCState *env = &cpu->env;
461 target_ulong lpcr = env->spr[SPR_LPCR];
462
463 if (kvm_enabled()) {
464 if (kvmppc_enable_cap_large_decr(cpu, val)) {
465 error_setg(errp, "No large decrementer support");
466 error_append_hint(errp,
467 "Try appending -machine cap-large-decr=off\n");
468 }
469 }
470
471 if (val) {
472 lpcr |= LPCR_LD;
473 } else {
474 lpcr &= ~LPCR_LD;
475 }
476 ppc_store_lpcr(cpu, lpcr);
477 }
478
479 static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val,
480 Error **errp)
481 {
482 ERRP_GUARD();
483 uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist();
484
485 if (tcg_enabled() && val) {
486 /* TCG doesn't implement anything here, but allow with a warning */
487 warn_report("TCG doesn't support requested feature, cap-ccf-assist=on");
488 } else if (kvm_enabled() && (val > kvm_val)) {
489 uint8_t kvm_ibs = kvmppc_get_cap_safe_indirect_branch();
490
491 if (kvm_ibs == SPAPR_CAP_FIXED_CCD) {
492 /*
493 * If we don't have CCF assist on the host, the assist
494 * instruction is a harmless no-op. It won't correctly
495 * implement the cache count flush *but* if we have
496 * count-cache-disabled in the host, that flush is
497 * unnnecessary. So, specifically allow this case. This
498 * allows us to have better performance on POWER9 DD2.3,
499 * while still working on POWER9 DD2.2 and POWER8 host
500 * cpus.
501 */
502 return;
503 }
504 error_setg(errp,
505 "Requested count cache flush assist capability level not supported by KVM");
506 error_append_hint(errp, "Try appending -machine cap-ccf-assist=off\n");
507 }
508 }
509
510 static void cap_fwnmi_apply(SpaprMachineState *spapr, uint8_t val,
511 Error **errp)
512 {
513 ERRP_GUARD();
514 if (!val) {
515 return; /* Disabled by default */
516 }
517
518 if (kvm_enabled()) {
519 if (!kvmppc_get_fwnmi()) {
520 error_setg(errp,
521 "Firmware Assisted Non-Maskable Interrupts(FWNMI) not supported by KVM.");
522 error_append_hint(errp, "Try appending -machine cap-fwnmi=off\n");
523 }
524 }
525 }
526
527 SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
528 [SPAPR_CAP_HTM] = {
529 .name = "htm",
530 .description = "Allow Hardware Transactional Memory (HTM)",
531 .index = SPAPR_CAP_HTM,
532 .get = spapr_cap_get_bool,
533 .set = spapr_cap_set_bool,
534 .type = "bool",
535 .apply = cap_htm_apply,
536 },
537 [SPAPR_CAP_VSX] = {
538 .name = "vsx",
539 .description = "Allow Vector Scalar Extensions (VSX)",
540 .index = SPAPR_CAP_VSX,
541 .get = spapr_cap_get_bool,
542 .set = spapr_cap_set_bool,
543 .type = "bool",
544 .apply = cap_vsx_apply,
545 },
546 [SPAPR_CAP_DFP] = {
547 .name = "dfp",
548 .description = "Allow Decimal Floating Point (DFP)",
549 .index = SPAPR_CAP_DFP,
550 .get = spapr_cap_get_bool,
551 .set = spapr_cap_set_bool,
552 .type = "bool",
553 .apply = cap_dfp_apply,
554 },
555 [SPAPR_CAP_CFPC] = {
556 .name = "cfpc",
557 .description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE,
558 .index = SPAPR_CAP_CFPC,
559 .get = spapr_cap_get_string,
560 .set = spapr_cap_set_string,
561 .type = "string",
562 .possible = &cap_cfpc_possible,
563 .apply = cap_safe_cache_apply,
564 },
565 [SPAPR_CAP_SBBC] = {
566 .name = "sbbc",
567 .description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE,
568 .index = SPAPR_CAP_SBBC,
569 .get = spapr_cap_get_string,
570 .set = spapr_cap_set_string,
571 .type = "string",
572 .possible = &cap_sbbc_possible,
573 .apply = cap_safe_bounds_check_apply,
574 },
575 [SPAPR_CAP_IBS] = {
576 .name = "ibs",
577 .description =
578 "Indirect Branch Speculation (broken, workaround, fixed-ibs,"
579 "fixed-ccd, fixed-na)",
580 .index = SPAPR_CAP_IBS,
581 .get = spapr_cap_get_string,
582 .set = spapr_cap_set_string,
583 .type = "string",
584 .possible = &cap_ibs_possible,
585 .apply = cap_safe_indirect_branch_apply,
586 },
587 [SPAPR_CAP_HPT_MAXPAGESIZE] = {
588 .name = "hpt-max-page-size",
589 .description = "Maximum page size for Hash Page Table guests",
590 .index = SPAPR_CAP_HPT_MAXPAGESIZE,
591 .get = spapr_cap_get_pagesize,
592 .set = spapr_cap_set_pagesize,
593 .type = "int",
594 .apply = cap_hpt_maxpagesize_apply,
595 .cpu_apply = cap_hpt_maxpagesize_cpu_apply,
596 .migrate_needed = cap_hpt_maxpagesize_migrate_needed,
597 },
598 [SPAPR_CAP_NESTED_KVM_HV] = {
599 .name = "nested-hv",
600 .description = "Allow Nested KVM-HV",
601 .index = SPAPR_CAP_NESTED_KVM_HV,
602 .get = spapr_cap_get_bool,
603 .set = spapr_cap_set_bool,
604 .type = "bool",
605 .apply = cap_nested_kvm_hv_apply,
606 },
607 [SPAPR_CAP_LARGE_DECREMENTER] = {
608 .name = "large-decr",
609 .description = "Allow Large Decrementer",
610 .index = SPAPR_CAP_LARGE_DECREMENTER,
611 .get = spapr_cap_get_bool,
612 .set = spapr_cap_set_bool,
613 .type = "bool",
614 .apply = cap_large_decr_apply,
615 .cpu_apply = cap_large_decr_cpu_apply,
616 },
617 [SPAPR_CAP_CCF_ASSIST] = {
618 .name = "ccf-assist",
619 .description = "Count Cache Flush Assist via HW Instruction",
620 .index = SPAPR_CAP_CCF_ASSIST,
621 .get = spapr_cap_get_bool,
622 .set = spapr_cap_set_bool,
623 .type = "bool",
624 .apply = cap_ccf_assist_apply,
625 },
626 [SPAPR_CAP_FWNMI] = {
627 .name = "fwnmi",
628 .description = "Implements PAPR FWNMI option",
629 .index = SPAPR_CAP_FWNMI,
630 .get = spapr_cap_get_bool,
631 .set = spapr_cap_set_bool,
632 .type = "bool",
633 .apply = cap_fwnmi_apply,
634 },
635 };
636
637 static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr,
638 const char *cputype)
639 {
640 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
641 SpaprCapabilities caps;
642
643 caps = smc->default_caps;
644
645 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_3_00,
646 0, spapr->max_compat_pvr)) {
647 caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF;
648 }
649
650 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07,
651 0, spapr->max_compat_pvr)) {
652 caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
653 caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN;
654 }
655
656 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS,
657 0, spapr->max_compat_pvr)) {
658 caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN;
659 }
660
661 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06,
662 0, spapr->max_compat_pvr)) {
663 caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF;
664 caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF;
665 caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
666 }
667
668 /* This is for pseries-2.12 and older */
669 if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) {
670 uint8_t mps;
671
672 if (kvmppc_hpt_needs_host_contiguous_pages()) {
673 mps = ctz64(qemu_minrampagesize());
674 } else {
675 mps = 34; /* allow everything up to 16GiB, i.e. everything */
676 }
677
678 caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps;
679 }
680
681 return caps;
682 }
683
684 int spapr_caps_pre_load(void *opaque)
685 {
686 SpaprMachineState *spapr = opaque;
687
688 /* Set to default so we can tell if this came in with the migration */
689 spapr->mig = spapr->def;
690 return 0;
691 }
692
693 int spapr_caps_pre_save(void *opaque)
694 {
695 SpaprMachineState *spapr = opaque;
696
697 spapr->mig = spapr->eff;
698 return 0;
699 }
700
701 /* This has to be called from the top-level spapr post_load, not the
702 * caps specific one. Otherwise it wouldn't be called when the source
703 * caps are all defaults, which could still conflict with overridden
704 * caps on the destination */
705 int spapr_caps_post_migration(SpaprMachineState *spapr)
706 {
707 int i;
708 bool ok = true;
709 SpaprCapabilities dstcaps = spapr->eff;
710 SpaprCapabilities srccaps;
711
712 srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
713 for (i = 0; i < SPAPR_CAP_NUM; i++) {
714 /* If not default value then assume came in with the migration */
715 if (spapr->mig.caps[i] != spapr->def.caps[i]) {
716 srccaps.caps[i] = spapr->mig.caps[i];
717 }
718 }
719
720 for (i = 0; i < SPAPR_CAP_NUM; i++) {
721 SpaprCapabilityInfo *info = &capability_table[i];
722
723 if (srccaps.caps[i] > dstcaps.caps[i]) {
724 error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)",
725 info->name, srccaps.caps[i], dstcaps.caps[i]);
726 ok = false;
727 }
728
729 if (srccaps.caps[i] < dstcaps.caps[i]) {
730 warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)",
731 info->name, srccaps.caps[i], dstcaps.caps[i]);
732 }
733 }
734
735 return ok ? 0 : -EINVAL;
736 }
737
738 /* Used to generate the migration field and needed function for a spapr cap */
739 #define SPAPR_CAP_MIG_STATE(sname, cap) \
740 static bool spapr_cap_##sname##_needed(void *opaque) \
741 { \
742 SpaprMachineState *spapr = opaque; \
743 bool (*needed)(void *opaque) = \
744 capability_table[cap].migrate_needed; \
745 \
746 return needed ? needed(opaque) : true && \
747 spapr->cmd_line_caps[cap] && \
748 (spapr->eff.caps[cap] != \
749 spapr->def.caps[cap]); \
750 } \
751 \
752 const VMStateDescription vmstate_spapr_cap_##sname = { \
753 .name = "spapr/cap/" #sname, \
754 .version_id = 1, \
755 .minimum_version_id = 1, \
756 .needed = spapr_cap_##sname##_needed, \
757 .fields = (VMStateField[]) { \
758 VMSTATE_UINT8(mig.caps[cap], \
759 SpaprMachineState), \
760 VMSTATE_END_OF_LIST() \
761 }, \
762 }
763
764 SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM);
765 SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX);
766 SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP);
767 SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC);
768 SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC);
769 SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS);
770 SPAPR_CAP_MIG_STATE(hpt_maxpagesize, SPAPR_CAP_HPT_MAXPAGESIZE);
771 SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV);
772 SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER);
773 SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST);
774 SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI);
775
776 void spapr_caps_init(SpaprMachineState *spapr)
777 {
778 SpaprCapabilities default_caps;
779 int i;
780
781 /* Compute the actual set of caps we should run with */
782 default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
783
784 for (i = 0; i < SPAPR_CAP_NUM; i++) {
785 /* Store the defaults */
786 spapr->def.caps[i] = default_caps.caps[i];
787 /* If not set on the command line then apply the default value */
788 if (!spapr->cmd_line_caps[i]) {
789 spapr->eff.caps[i] = default_caps.caps[i];
790 }
791 }
792 }
793
794 void spapr_caps_apply(SpaprMachineState *spapr)
795 {
796 int i;
797
798 for (i = 0; i < SPAPR_CAP_NUM; i++) {
799 SpaprCapabilityInfo *info = &capability_table[i];
800
801 /*
802 * If the apply function can't set the desired level and thinks it's
803 * fatal, it should cause that.
804 */
805 info->apply(spapr, spapr->eff.caps[i], &error_fatal);
806 }
807 }
808
809 void spapr_caps_cpu_apply(SpaprMachineState *spapr, PowerPCCPU *cpu)
810 {
811 int i;
812
813 for (i = 0; i < SPAPR_CAP_NUM; i++) {
814 SpaprCapabilityInfo *info = &capability_table[i];
815
816 /*
817 * If the apply function can't set the desired level and thinks it's
818 * fatal, it should cause that.
819 */
820 if (info->cpu_apply) {
821 info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal);
822 }
823 }
824 }
825
826 void spapr_caps_add_properties(SpaprMachineClass *smc)
827 {
828 ObjectClass *klass = OBJECT_CLASS(smc);
829 int i;
830
831 for (i = 0; i < ARRAY_SIZE(capability_table); i++) {
832 SpaprCapabilityInfo *cap = &capability_table[i];
833 char *name = g_strdup_printf("cap-%s", cap->name);
834 char *desc;
835
836 object_class_property_add(klass, name, cap->type,
837 cap->get, cap->set,
838 NULL, cap);
839
840 desc = g_strdup_printf("%s", cap->description);
841 object_class_property_set_description(klass, name, desc);
842 g_free(name);
843 g_free(desc);
844 }
845 }