hw/arm/raspi: fix CPRMAN base address
[qemu.git] / hw / ppc / spapr_rtas_ddw.c
1 /*
2 * QEMU sPAPR Dynamic DMA windows support
3 *
4 * Copyright (c) 2015 Alexey Kardashevskiy, IBM Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License,
9 * or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "qemu/error-report.h"
23 #include "qemu/module.h"
24 #include "hw/ppc/spapr.h"
25 #include "hw/pci-host/spapr.h"
26 #include "trace.h"
27
28 static int spapr_phb_get_active_win_num_cb(Object *child, void *opaque)
29 {
30 SpaprTceTable *tcet;
31
32 tcet = (SpaprTceTable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE);
33 if (tcet && tcet->nb_table) {
34 ++*(unsigned *)opaque;
35 }
36 return 0;
37 }
38
39 static unsigned spapr_phb_get_active_win_num(SpaprPhbState *sphb)
40 {
41 unsigned ret = 0;
42
43 object_child_foreach(OBJECT(sphb), spapr_phb_get_active_win_num_cb, &ret);
44
45 return ret;
46 }
47
48 static int spapr_phb_get_free_liobn_cb(Object *child, void *opaque)
49 {
50 SpaprTceTable *tcet;
51
52 tcet = (SpaprTceTable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE);
53 if (tcet && !tcet->nb_table) {
54 *(uint32_t *)opaque = tcet->liobn;
55 return 1;
56 }
57 return 0;
58 }
59
60 static unsigned spapr_phb_get_free_liobn(SpaprPhbState *sphb)
61 {
62 uint32_t liobn = 0;
63
64 object_child_foreach(OBJECT(sphb), spapr_phb_get_free_liobn_cb, &liobn);
65
66 return liobn;
67 }
68
69 static uint32_t spapr_page_mask_to_query_mask(uint64_t page_mask)
70 {
71 int i;
72 uint32_t mask = 0;
73 const struct { int shift; uint32_t mask; } masks[] = {
74 { 12, RTAS_DDW_PGSIZE_4K },
75 { 16, RTAS_DDW_PGSIZE_64K },
76 { 24, RTAS_DDW_PGSIZE_16M },
77 { 25, RTAS_DDW_PGSIZE_32M },
78 { 26, RTAS_DDW_PGSIZE_64M },
79 { 27, RTAS_DDW_PGSIZE_128M },
80 { 28, RTAS_DDW_PGSIZE_256M },
81 { 34, RTAS_DDW_PGSIZE_16G },
82 };
83
84 for (i = 0; i < ARRAY_SIZE(masks); ++i) {
85 if (page_mask & (1ULL << masks[i].shift)) {
86 mask |= masks[i].mask;
87 }
88 }
89
90 return mask;
91 }
92
93 static void rtas_ibm_query_pe_dma_window(PowerPCCPU *cpu,
94 SpaprMachineState *spapr,
95 uint32_t token, uint32_t nargs,
96 target_ulong args,
97 uint32_t nret, target_ulong rets)
98 {
99 SpaprPhbState *sphb;
100 uint64_t buid;
101 uint32_t avail, addr, pgmask = 0;
102
103 if ((nargs != 3) || (nret != 5)) {
104 goto param_error_exit;
105 }
106
107 buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
108 addr = rtas_ld(args, 0);
109 sphb = spapr_pci_find_phb(spapr, buid);
110 if (!sphb || !sphb->ddw_enabled) {
111 goto param_error_exit;
112 }
113
114 /* Translate page mask to LoPAPR format */
115 pgmask = spapr_page_mask_to_query_mask(sphb->page_size_mask);
116
117 avail = SPAPR_PCI_DMA_MAX_WINDOWS - spapr_phb_get_active_win_num(sphb);
118
119 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
120 rtas_st(rets, 1, avail);
121 rtas_st(rets, 2, 0x80000000); /* The largest window we can possibly have */
122 rtas_st(rets, 3, pgmask);
123 rtas_st(rets, 4, 0); /* DMA migration mask, not supported */
124
125 trace_spapr_iommu_ddw_query(buid, addr, avail, 0x80000000, pgmask);
126 return;
127
128 param_error_exit:
129 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
130 }
131
132 static void rtas_ibm_create_pe_dma_window(PowerPCCPU *cpu,
133 SpaprMachineState *spapr,
134 uint32_t token, uint32_t nargs,
135 target_ulong args,
136 uint32_t nret, target_ulong rets)
137 {
138 SpaprPhbState *sphb;
139 SpaprTceTable *tcet = NULL;
140 uint32_t addr, page_shift, window_shift, liobn;
141 uint64_t buid, win_addr;
142 int windows;
143
144 if ((nargs != 5) || (nret != 4)) {
145 goto param_error_exit;
146 }
147
148 buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
149 addr = rtas_ld(args, 0);
150 sphb = spapr_pci_find_phb(spapr, buid);
151 if (!sphb || !sphb->ddw_enabled) {
152 goto param_error_exit;
153 }
154
155 page_shift = rtas_ld(args, 3);
156 window_shift = rtas_ld(args, 4);
157 liobn = spapr_phb_get_free_liobn(sphb);
158 windows = spapr_phb_get_active_win_num(sphb);
159
160 if (!(sphb->page_size_mask & (1ULL << page_shift)) ||
161 (window_shift < page_shift)) {
162 goto param_error_exit;
163 }
164
165 if (!liobn || !sphb->ddw_enabled || windows == SPAPR_PCI_DMA_MAX_WINDOWS) {
166 goto hw_error_exit;
167 }
168
169 tcet = spapr_tce_find_by_liobn(liobn);
170 if (!tcet) {
171 goto hw_error_exit;
172 }
173
174 win_addr = (windows == 0) ? sphb->dma_win_addr : sphb->dma64_win_addr;
175 /*
176 * We have just created a window, we know for the fact that it is empty,
177 * use a hack to avoid iterating over the table as it is quite possible
178 * to have billions of TCEs, all empty.
179 * Note that we cannot delay this to the first H_PUT_TCE as this hcall is
180 * mostly likely to be handled in KVM so QEMU just does not know if it
181 * happened.
182 */
183 tcet->skipping_replay = true;
184 spapr_tce_table_enable(tcet, page_shift, win_addr,
185 1ULL << (window_shift - page_shift));
186 tcet->skipping_replay = false;
187 if (!tcet->nb_table) {
188 goto hw_error_exit;
189 }
190
191 trace_spapr_iommu_ddw_create(buid, addr, 1ULL << page_shift,
192 1ULL << window_shift, tcet->bus_offset, liobn);
193
194 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
195 rtas_st(rets, 1, liobn);
196 rtas_st(rets, 2, tcet->bus_offset >> 32);
197 rtas_st(rets, 3, tcet->bus_offset & ((uint32_t) -1));
198
199 return;
200
201 hw_error_exit:
202 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
203 return;
204
205 param_error_exit:
206 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
207 }
208
209 static void rtas_ibm_remove_pe_dma_window(PowerPCCPU *cpu,
210 SpaprMachineState *spapr,
211 uint32_t token, uint32_t nargs,
212 target_ulong args,
213 uint32_t nret, target_ulong rets)
214 {
215 SpaprPhbState *sphb;
216 SpaprTceTable *tcet;
217 uint32_t liobn;
218
219 if ((nargs != 1) || (nret != 1)) {
220 goto param_error_exit;
221 }
222
223 liobn = rtas_ld(args, 0);
224 tcet = spapr_tce_find_by_liobn(liobn);
225 if (!tcet) {
226 goto param_error_exit;
227 }
228
229 sphb = SPAPR_PCI_HOST_BRIDGE(OBJECT(tcet)->parent);
230 if (!sphb || !sphb->ddw_enabled || !tcet->nb_table) {
231 goto param_error_exit;
232 }
233
234 spapr_tce_table_disable(tcet);
235 trace_spapr_iommu_ddw_remove(liobn);
236
237 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
238 return;
239
240 param_error_exit:
241 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
242 }
243
244 static void rtas_ibm_reset_pe_dma_window(PowerPCCPU *cpu,
245 SpaprMachineState *spapr,
246 uint32_t token, uint32_t nargs,
247 target_ulong args,
248 uint32_t nret, target_ulong rets)
249 {
250 SpaprPhbState *sphb;
251 uint64_t buid;
252 uint32_t addr;
253
254 if ((nargs != 3) || (nret != 1)) {
255 goto param_error_exit;
256 }
257
258 buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
259 addr = rtas_ld(args, 0);
260 sphb = spapr_pci_find_phb(spapr, buid);
261 if (!sphb || !sphb->ddw_enabled) {
262 goto param_error_exit;
263 }
264
265 spapr_phb_dma_reset(sphb);
266 trace_spapr_iommu_ddw_reset(buid, addr);
267
268 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
269
270 return;
271
272 param_error_exit:
273 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
274 }
275
276 static void spapr_rtas_ddw_init(void)
277 {
278 spapr_rtas_register(RTAS_IBM_QUERY_PE_DMA_WINDOW,
279 "ibm,query-pe-dma-window",
280 rtas_ibm_query_pe_dma_window);
281 spapr_rtas_register(RTAS_IBM_CREATE_PE_DMA_WINDOW,
282 "ibm,create-pe-dma-window",
283 rtas_ibm_create_pe_dma_window);
284 spapr_rtas_register(RTAS_IBM_REMOVE_PE_DMA_WINDOW,
285 "ibm,remove-pe-dma-window",
286 rtas_ibm_remove_pe_dma_window);
287 spapr_rtas_register(RTAS_IBM_RESET_PE_DMA_WINDOW,
288 "ibm,reset-pe-dma-window",
289 rtas_ibm_reset_pe_dma_window);
290 }
291
292 type_init(spapr_rtas_ddw_init)