Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request...
[qemu.git] / hw / ppc / virtex_ml507.c
1 /*
2 * Model of Xilinx Virtex5 ML507 PPC-440 refdesign.
3 *
4 * Copyright (c) 2010 Edgar E. Iglesias.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "cpu.h"
27 #include "hw/sysbus.h"
28 #include "hw/hw.h"
29 #include "hw/char/serial.h"
30 #include "hw/block/flash.h"
31 #include "sysemu/sysemu.h"
32 #include "hw/devices.h"
33 #include "hw/boards.h"
34 #include "sysemu/device_tree.h"
35 #include "hw/loader.h"
36 #include "elf.h"
37 #include "qemu/error-report.h"
38 #include "qemu/log.h"
39 #include "exec/address-spaces.h"
40
41 #include "hw/ppc/ppc.h"
42 #include "hw/ppc/ppc4xx.h"
43 #include "ppc405.h"
44
45 #include "sysemu/block-backend.h"
46
47 #define EPAPR_MAGIC (0x45504150)
48 #define FLASH_SIZE (16 * 1024 * 1024)
49
50 #define INTC_BASEADDR 0x81800000
51 #define UART16550_BASEADDR 0x83e01003
52 #define TIMER_BASEADDR 0x83c00000
53 #define PFLASH_BASEADDR 0xfc000000
54
55 #define TIMER_IRQ 3
56 #define UART16550_IRQ 9
57
58 static struct boot_info
59 {
60 uint32_t bootstrap_pc;
61 uint32_t cmdline;
62 uint32_t fdt;
63 uint32_t ima_size;
64 void *vfdt;
65 } boot_info;
66
67 /* Create reset TLB entries for BookE, spanning the 32bit addr space. */
68 static void mmubooke_create_initial_mapping(CPUPPCState *env,
69 target_ulong va,
70 hwaddr pa)
71 {
72 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
73
74 tlb->attr = 0;
75 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
76 tlb->size = 1U << 31; /* up to 0x80000000 */
77 tlb->EPN = va & TARGET_PAGE_MASK;
78 tlb->RPN = pa & TARGET_PAGE_MASK;
79 tlb->PID = 0;
80
81 tlb = &env->tlb.tlbe[1];
82 tlb->attr = 0;
83 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
84 tlb->size = 1U << 31; /* up to 0xffffffff */
85 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
86 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
87 tlb->PID = 0;
88 }
89
90 static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
91 int do_init,
92 const char *cpu_model,
93 uint32_t sysclk)
94 {
95 PowerPCCPU *cpu;
96 CPUPPCState *env;
97 qemu_irq *irqs;
98
99 cpu = cpu_ppc_init(cpu_model);
100 if (cpu == NULL) {
101 fprintf(stderr, "Unable to initialize CPU!\n");
102 exit(1);
103 }
104 env = &cpu->env;
105
106 ppc_booke_timers_init(cpu, sysclk, 0/* no flags */);
107
108 ppc_dcr_init(env, NULL, NULL);
109
110 /* interrupt controller */
111 irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
112 irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
113 irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
114 ppcuic_init(env, irqs, 0x0C0, 0, 1);
115 return cpu;
116 }
117
118 static void main_cpu_reset(void *opaque)
119 {
120 PowerPCCPU *cpu = opaque;
121 CPUPPCState *env = &cpu->env;
122 struct boot_info *bi = env->load_info;
123
124 cpu_reset(CPU(cpu));
125 /* Linux Kernel Parameters (passing device tree):
126 * r3: pointer to the fdt
127 * r4: 0
128 * r5: 0
129 * r6: epapr magic
130 * r7: size of IMA in bytes
131 * r8: 0
132 * r9: 0
133 */
134 env->gpr[1] = (16<<20) - 8;
135 /* Provide a device-tree. */
136 env->gpr[3] = bi->fdt;
137 env->nip = bi->bootstrap_pc;
138
139 /* Create a mapping for the kernel. */
140 mmubooke_create_initial_mapping(env, 0, 0);
141 env->gpr[6] = tswap32(EPAPR_MAGIC);
142 env->gpr[7] = bi->ima_size;
143 }
144
145 #define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb"
146 static int xilinx_load_device_tree(hwaddr addr,
147 uint32_t ramsize,
148 hwaddr initrd_base,
149 hwaddr initrd_size,
150 const char *kernel_cmdline)
151 {
152 char *path;
153 int fdt_size;
154 void *fdt = NULL;
155 int r;
156 const char *dtb_filename;
157
158 dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb");
159 if (dtb_filename) {
160 fdt = load_device_tree(dtb_filename, &fdt_size);
161 if (!fdt) {
162 error_report("Error while loading device tree file '%s'",
163 dtb_filename);
164 }
165 } else {
166 /* Try the local "ppc.dtb" override. */
167 fdt = load_device_tree("ppc.dtb", &fdt_size);
168 if (!fdt) {
169 path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
170 if (path) {
171 fdt = load_device_tree(path, &fdt_size);
172 g_free(path);
173 }
174 }
175 }
176 if (!fdt) {
177 return 0;
178 }
179
180 r = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
181 initrd_base);
182 if (r < 0) {
183 error_report("couldn't set /chosen/linux,initrd-start");
184 }
185
186 r = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
187 (initrd_base + initrd_size));
188 if (r < 0) {
189 error_report("couldn't set /chosen/linux,initrd-end");
190 }
191
192 r = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
193 if (r < 0)
194 fprintf(stderr, "couldn't set /chosen/bootargs\n");
195 cpu_physical_memory_write(addr, fdt, fdt_size);
196 return fdt_size;
197 }
198
199 static void virtex_init(MachineState *machine)
200 {
201 ram_addr_t ram_size = machine->ram_size;
202 const char *kernel_filename = machine->kernel_filename;
203 const char *kernel_cmdline = machine->kernel_cmdline;
204 hwaddr initrd_base = 0;
205 int initrd_size = 0;
206 MemoryRegion *address_space_mem = get_system_memory();
207 DeviceState *dev;
208 PowerPCCPU *cpu;
209 CPUPPCState *env;
210 hwaddr ram_base = 0;
211 DriveInfo *dinfo;
212 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
213 qemu_irq irq[32], *cpu_irq;
214 int kernel_size;
215 int i;
216
217 /* init CPUs */
218 if (machine->cpu_model == NULL) {
219 machine->cpu_model = "440-Xilinx";
220 }
221
222 cpu = ppc440_init_xilinx(&ram_size, 1, machine->cpu_model, 400000000);
223 env = &cpu->env;
224 qemu_register_reset(main_cpu_reset, cpu);
225
226 memory_region_allocate_system_memory(phys_ram, NULL, "ram", ram_size);
227 memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
228
229 dinfo = drive_get(IF_PFLASH, 0, 0);
230 pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZE,
231 dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
232 (64 * 1024), FLASH_SIZE >> 16,
233 1, 0x89, 0x18, 0x0000, 0x0, 1);
234
235 cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
236 dev = qdev_create(NULL, "xlnx.xps-intc");
237 qdev_prop_set_uint32(dev, "kind-of-intr", 0);
238 qdev_init_nofail(dev);
239 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
240 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]);
241 for (i = 0; i < 32; i++) {
242 irq[i] = qdev_get_gpio_in(dev, i);
243 }
244
245 serial_mm_init(address_space_mem, UART16550_BASEADDR, 2, irq[UART16550_IRQ],
246 115200, serial_hds[0], DEVICE_LITTLE_ENDIAN);
247
248 /* 2 timers at irq 2 @ 62 Mhz. */
249 dev = qdev_create(NULL, "xlnx.xps-timer");
250 qdev_prop_set_uint32(dev, "one-timer-only", 0);
251 qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
252 qdev_init_nofail(dev);
253 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
254 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
255
256 if (kernel_filename) {
257 uint64_t entry, low, high;
258 hwaddr boot_offset;
259
260 /* Boots a kernel elf binary. */
261 kernel_size = load_elf(kernel_filename, NULL, NULL,
262 &entry, &low, &high, 1, PPC_ELF_MACHINE,
263 0, 0);
264 boot_info.bootstrap_pc = entry & 0x00ffffff;
265
266 if (kernel_size < 0) {
267 boot_offset = 0x1200000;
268 /* If we failed loading ELF's try a raw image. */
269 kernel_size = load_image_targphys(kernel_filename,
270 boot_offset,
271 ram_size);
272 boot_info.bootstrap_pc = boot_offset;
273 high = boot_info.bootstrap_pc + kernel_size + 8192;
274 }
275
276 boot_info.ima_size = kernel_size;
277
278 /* Load initrd. */
279 if (machine->initrd_filename) {
280 initrd_base = high = ROUND_UP(high, 4);
281 initrd_size = load_image_targphys(machine->initrd_filename,
282 high, ram_size - high);
283
284 if (initrd_size < 0) {
285 error_report("couldn't load ram disk '%s'",
286 machine->initrd_filename);
287 exit(1);
288 }
289 high = ROUND_UP(high + initrd_size, 4);
290 }
291
292 /* Provide a device-tree. */
293 boot_info.fdt = high + (8192 * 2);
294 boot_info.fdt &= ~8191;
295
296 xilinx_load_device_tree(boot_info.fdt, ram_size,
297 initrd_base, initrd_size,
298 kernel_cmdline);
299 }
300 env->load_info = &boot_info;
301 }
302
303 static void virtex_machine_init(MachineClass *mc)
304 {
305 mc->desc = "Xilinx Virtex ML507 reference design";
306 mc->init = virtex_init;
307 }
308
309 DEFINE_MACHINE("virtex-ml507", virtex_machine_init)