PPC: e500mc: add missing IVORs to bitmap
[qemu.git] / hw / ppc_mac.h
1 /*
2 * QEMU PowerMac emulation shared definitions and prototypes
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 #if !defined(__PPC_MAC_H__)
26 #define __PPC_MAC_H__
27
28 #include "memory.h"
29
30 /* SMP is not enabled, for now */
31 #define MAX_CPUS 1
32
33 #define BIOS_SIZE (1024 * 1024)
34 #define BIOS_FILENAME "ppc_rom.bin"
35 #define NVRAM_SIZE 0x2000
36 #define PROM_FILENAME "openbios-ppc"
37 #define PROM_ADDR 0xfff00000
38
39 #define KERNEL_LOAD_ADDR 0x01000000
40 #define KERNEL_GAP 0x00100000
41
42 #define ESCC_CLOCK 3686400
43
44 /* Cuda */
45 void cuda_init (MemoryRegion **cuda_mem, qemu_irq irq);
46
47 /* MacIO */
48 void macio_init (PCIBus *bus, int device_id, int is_oldworld,
49 MemoryRegion *pic_mem, MemoryRegion *dbdma_mem,
50 MemoryRegion *cuda_mem, void *nvram,
51 int nb_ide, MemoryRegion **ide_mem, MemoryRegion *escc_mem);
52
53 /* Heathrow PIC */
54 qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
55 int nb_cpus, qemu_irq **irqs);
56
57 /* Grackle PCI */
58 PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
59 MemoryRegion *address_space_mem,
60 MemoryRegion *address_space_io);
61
62 /* UniNorth PCI */
63 PCIBus *pci_pmac_init(qemu_irq *pic,
64 MemoryRegion *address_space_mem,
65 MemoryRegion *address_space_io);
66 PCIBus *pci_pmac_u3_init(qemu_irq *pic,
67 MemoryRegion *address_space_mem,
68 MemoryRegion *address_space_io);
69
70 /* Mac NVRAM */
71 typedef struct MacIONVRAMState MacIONVRAMState;
72
73 MacIONVRAMState *macio_nvram_init (target_phys_addr_t size,
74 unsigned int it_shift);
75 void macio_nvram_setup_bar(MacIONVRAMState *s, MemoryRegion *bar,
76 target_phys_addr_t mem_base);
77 void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
78 uint32_t macio_nvram_read (void *opaque, uint32_t addr);
79 void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);
80 #endif /* !defined(__PPC_MAC_H__) */