PPC: e500mc: add missing IVORs to bitmap
[qemu.git] / hw / ppc_newworld.c
1 /*
2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 *
25 * PCI bus layout on a real G5 (U3 based):
26 *
27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
47 *
48 */
49 #include "hw.h"
50 #include "ppc.h"
51 #include "ppc_mac.h"
52 #include "adb.h"
53 #include "mac_dbdma.h"
54 #include "nvram.h"
55 #include "pc.h"
56 #include "pci.h"
57 #include "usb-ohci.h"
58 #include "net.h"
59 #include "sysemu.h"
60 #include "boards.h"
61 #include "fw_cfg.h"
62 #include "escc.h"
63 #include "openpic.h"
64 #include "ide.h"
65 #include "loader.h"
66 #include "elf.h"
67 #include "kvm.h"
68 #include "kvm_ppc.h"
69 #include "hw/usb.h"
70 #include "blockdev.h"
71 #include "exec-memory.h"
72
73 #define MAX_IDE_BUS 2
74 #define CFG_ADDR 0xf0000510
75
76 /* debug UniNorth */
77 //#define DEBUG_UNIN
78
79 #ifdef DEBUG_UNIN
80 #define UNIN_DPRINTF(fmt, ...) \
81 do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
82 #else
83 #define UNIN_DPRINTF(fmt, ...)
84 #endif
85
86 /* UniN device */
87 static void unin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
88 unsigned size)
89 {
90 UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, value);
91 }
92
93 static uint64_t unin_read(void *opaque, target_phys_addr_t addr, unsigned size)
94 {
95 uint32_t value;
96
97 value = 0;
98 UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
99
100 return value;
101 }
102
103 static const MemoryRegionOps unin_ops = {
104 .read = unin_read,
105 .write = unin_write,
106 .endianness = DEVICE_NATIVE_ENDIAN,
107 };
108
109 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
110 {
111 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
112 return 0;
113 }
114
115 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
116 {
117 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
118 }
119
120 static target_phys_addr_t round_page(target_phys_addr_t addr)
121 {
122 return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
123 }
124
125 /* PowerPC Mac99 hardware initialisation */
126 static void ppc_core99_init (ram_addr_t ram_size,
127 const char *boot_device,
128 const char *kernel_filename,
129 const char *kernel_cmdline,
130 const char *initrd_filename,
131 const char *cpu_model)
132 {
133 CPUState *env = NULL;
134 char *filename;
135 qemu_irq *pic, **openpic_irqs;
136 MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
137 int linux_boot, i;
138 MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
139 target_phys_addr_t kernel_base, initrd_base, cmdline_base = 0;
140 long kernel_size, initrd_size;
141 PCIBus *pci_bus;
142 MacIONVRAMState *nvr;
143 int bios_size;
144 MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem, *escc_mem;
145 MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
146 MemoryRegion *ide_mem[3];
147 int ppc_boot_device;
148 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
149 void *fw_cfg;
150 void *dbdma;
151 int machine_arch;
152
153 linux_boot = (kernel_filename != NULL);
154
155 /* init CPUs */
156 if (cpu_model == NULL)
157 #ifdef TARGET_PPC64
158 cpu_model = "970fx";
159 #else
160 cpu_model = "G4";
161 #endif
162 for (i = 0; i < smp_cpus; i++) {
163 env = cpu_init(cpu_model);
164 if (!env) {
165 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
166 exit(1);
167 }
168 /* Set time-base frequency to 100 Mhz */
169 cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
170 qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
171 }
172
173 /* allocate RAM */
174 memory_region_init_ram(ram, "ppc_core99.ram", ram_size);
175 vmstate_register_ram_global(ram);
176 memory_region_add_subregion(get_system_memory(), 0, ram);
177
178 /* allocate and load BIOS */
179 memory_region_init_ram(bios, "ppc_core99.bios", BIOS_SIZE);
180 vmstate_register_ram_global(bios);
181 if (bios_name == NULL)
182 bios_name = PROM_FILENAME;
183 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
184 memory_region_set_readonly(bios, true);
185 memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
186
187 /* Load OpenBIOS (ELF) */
188 if (filename) {
189 bios_size = load_elf(filename, NULL, NULL, NULL,
190 NULL, NULL, 1, ELF_MACHINE, 0);
191
192 g_free(filename);
193 } else {
194 bios_size = -1;
195 }
196 if (bios_size < 0 || bios_size > BIOS_SIZE) {
197 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
198 exit(1);
199 }
200
201 if (linux_boot) {
202 uint64_t lowaddr = 0;
203 int bswap_needed;
204
205 #ifdef BSWAP_NEEDED
206 bswap_needed = 1;
207 #else
208 bswap_needed = 0;
209 #endif
210 kernel_base = KERNEL_LOAD_ADDR;
211
212 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
213 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
214 if (kernel_size < 0)
215 kernel_size = load_aout(kernel_filename, kernel_base,
216 ram_size - kernel_base, bswap_needed,
217 TARGET_PAGE_SIZE);
218 if (kernel_size < 0)
219 kernel_size = load_image_targphys(kernel_filename,
220 kernel_base,
221 ram_size - kernel_base);
222 if (kernel_size < 0) {
223 hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
224 exit(1);
225 }
226 /* load initrd */
227 if (initrd_filename) {
228 initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
229 initrd_size = load_image_targphys(initrd_filename, initrd_base,
230 ram_size - initrd_base);
231 if (initrd_size < 0) {
232 hw_error("qemu: could not load initial ram disk '%s'\n",
233 initrd_filename);
234 exit(1);
235 }
236 cmdline_base = round_page(initrd_base + initrd_size);
237 } else {
238 initrd_base = 0;
239 initrd_size = 0;
240 cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
241 }
242 ppc_boot_device = 'm';
243 } else {
244 kernel_base = 0;
245 kernel_size = 0;
246 initrd_base = 0;
247 initrd_size = 0;
248 ppc_boot_device = '\0';
249 /* We consider that NewWorld PowerMac never have any floppy drive
250 * For now, OHW cannot boot from the network.
251 */
252 for (i = 0; boot_device[i] != '\0'; i++) {
253 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
254 ppc_boot_device = boot_device[i];
255 break;
256 }
257 }
258 if (ppc_boot_device == '\0') {
259 fprintf(stderr, "No valid boot device for Mac99 machine\n");
260 exit(1);
261 }
262 }
263
264 /* Register 8 MB of ISA IO space */
265 isa_mmio_init(0xf2000000, 0x00800000);
266
267 /* UniN init */
268 memory_region_init_io(unin_memory, &unin_ops, NULL, "unin", 0x1000);
269 memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
270
271 openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
272 openpic_irqs[0] =
273 g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
274 for (i = 0; i < smp_cpus; i++) {
275 /* Mac99 IRQ connection between OpenPIC outputs pins
276 * and PowerPC input pins
277 */
278 switch (PPC_INPUT(env)) {
279 case PPC_FLAGS_INPUT_6xx:
280 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
281 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
282 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
283 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
284 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
285 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
286 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
287 /* Not connected ? */
288 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
289 /* Check this */
290 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
291 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
292 break;
293 #if defined(TARGET_PPC64)
294 case PPC_FLAGS_INPUT_970:
295 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
296 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
297 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
298 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
299 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
300 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
301 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
302 /* Not connected ? */
303 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
304 /* Check this */
305 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
306 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
307 break;
308 #endif /* defined(TARGET_PPC64) */
309 default:
310 hw_error("Bus model not supported on mac99 machine\n");
311 exit(1);
312 }
313 }
314 pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs, NULL);
315 if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
316 /* 970 gets a U3 bus */
317 pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
318 machine_arch = ARCH_MAC99_U3;
319 } else {
320 pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
321 machine_arch = ARCH_MAC99;
322 }
323 /* init basic PC hardware */
324 pci_vga_init(pci_bus);
325
326 escc_mem = escc_init(0, pic[0x25], pic[0x24],
327 serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
328 memory_region_init_alias(escc_bar, "escc-bar",
329 escc_mem, 0, memory_region_size(escc_mem));
330
331 for(i = 0; i < nb_nics; i++)
332 pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
333
334 ide_drive_get(hd, MAX_IDE_BUS);
335 dbdma = DBDMA_init(&dbdma_mem);
336
337 /* We only emulate 2 out of 3 IDE controllers for now */
338 ide_mem[0] = NULL;
339 ide_mem[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
340 ide_mem[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);
341
342 /* cuda also initialize ADB */
343 if (machine_arch == ARCH_MAC99_U3) {
344 usb_enabled = 1;
345 }
346 cuda_init(&cuda_mem, pic[0x19]);
347
348 adb_kbd_init(&adb_bus);
349 adb_mouse_init(&adb_bus);
350
351 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem,
352 dbdma_mem, cuda_mem, NULL, 3, ide_mem, escc_bar);
353
354 if (usb_enabled) {
355 usb_ohci_init_pci(pci_bus, -1);
356 }
357
358 /* U3 needs to use USB for input because Linux doesn't support via-cuda
359 on PPC64 */
360 if (machine_arch == ARCH_MAC99_U3) {
361 usbdevice_create("keyboard");
362 usbdevice_create("mouse");
363 }
364
365 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
366 graphic_depth = 15;
367
368 /* The NewWorld NVRAM is not located in the MacIO device */
369 nvr = macio_nvram_init(0x2000, 1);
370 pmac_format_nvram_partition(nvr, 0x2000);
371 macio_nvram_setup_bar(nvr, get_system_memory(), 0xFFF04000);
372 /* No PCI init: the BIOS will do it */
373
374 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
375 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
376 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
377 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
378 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
379 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
380 if (kernel_cmdline) {
381 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
382 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
383 } else {
384 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
385 }
386 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
387 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
388 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
389
390 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
391 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
392 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
393
394 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
395 if (kvm_enabled()) {
396 #ifdef CONFIG_KVM
397 uint8_t *hypercall;
398
399 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
400 hypercall = g_malloc(16);
401 kvmppc_get_hypercall(env, hypercall, 16);
402 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
403 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
404 #endif
405 } else {
406 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
407 }
408
409 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
410 }
411
412 static QEMUMachine core99_machine = {
413 .name = "mac99",
414 .desc = "Mac99 based PowerMAC",
415 .init = ppc_core99_init,
416 .max_cpus = MAX_CPUS,
417 #ifdef TARGET_PPC64
418 .is_default = 1,
419 #endif
420 };
421
422 static void core99_machine_init(void)
423 {
424 qemu_register_machine(&core99_machine);
425 }
426
427 machine_init(core99_machine_init);