Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' into staging
[qemu.git] / hw / rx / rx-gdbsim.c
1 /*
2 * RX QEMU GDB simulator
3 *
4 * Copyright (c) 2019 Yoshinori Sato
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19 #include "qemu/osdep.h"
20 #include "qemu/cutils.h"
21 #include "qemu/error-report.h"
22 #include "qapi/error.h"
23 #include "qemu-common.h"
24 #include "cpu.h"
25 #include "hw/hw.h"
26 #include "hw/sysbus.h"
27 #include "hw/loader.h"
28 #include "hw/rx/rx62n.h"
29 #include "sysemu/sysemu.h"
30 #include "sysemu/qtest.h"
31 #include "sysemu/device_tree.h"
32 #include "hw/boards.h"
33 #include "qom/object.h"
34
35 /* Same address of GDB integrated simulator */
36 #define SDRAM_BASE EXT_CS_BASE
37
38 struct RxGdbSimMachineClass {
39 /*< private >*/
40 MachineClass parent_class;
41 /*< public >*/
42 const char *mcu_name;
43 uint32_t xtal_freq_hz;
44 };
45 typedef struct RxGdbSimMachineClass RxGdbSimMachineClass;
46
47 struct RxGdbSimMachineState {
48 /*< private >*/
49 MachineState parent_obj;
50 /*< public >*/
51 RX62NState mcu;
52 };
53 typedef struct RxGdbSimMachineState RxGdbSimMachineState;
54
55 #define TYPE_RX_GDBSIM_MACHINE MACHINE_TYPE_NAME("rx62n-common")
56
57 DECLARE_OBJ_CHECKERS(RxGdbSimMachineState, RxGdbSimMachineClass,
58 RX_GDBSIM_MACHINE, TYPE_RX_GDBSIM_MACHINE)
59
60
61 static void rx_load_image(RXCPU *cpu, const char *filename,
62 uint32_t start, uint32_t size)
63 {
64 static uint32_t extable[32];
65 long kernel_size;
66 int i;
67
68 kernel_size = load_image_targphys(filename, start, size);
69 if (kernel_size < 0) {
70 fprintf(stderr, "qemu: could not load kernel '%s'\n", filename);
71 exit(1);
72 }
73 cpu->env.pc = start;
74
75 /* setup exception trap trampoline */
76 /* linux kernel only works little-endian mode */
77 for (i = 0; i < ARRAY_SIZE(extable); i++) {
78 extable[i] = cpu_to_le32(0x10 + i * 4);
79 }
80 rom_add_blob_fixed("extable", extable, sizeof(extable), VECTOR_TABLE_BASE);
81 }
82
83 static void rx_gdbsim_init(MachineState *machine)
84 {
85 MachineClass *mc = MACHINE_GET_CLASS(machine);
86 RxGdbSimMachineState *s = RX_GDBSIM_MACHINE(machine);
87 RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_GET_CLASS(machine);
88 MemoryRegion *sysmem = get_system_memory();
89 const char *kernel_filename = machine->kernel_filename;
90 const char *dtb_filename = machine->dtb;
91
92 if (machine->ram_size < mc->default_ram_size) {
93 char *sz = size_to_str(mc->default_ram_size);
94 error_report("Invalid RAM size, should be more than %s", sz);
95 g_free(sz);
96 }
97
98 /* Allocate memory space */
99 memory_region_add_subregion(sysmem, SDRAM_BASE, machine->ram);
100
101 /* Initialize MCU */
102 object_initialize_child(OBJECT(machine), "mcu", &s->mcu, rxc->mcu_name);
103 object_property_set_link(OBJECT(&s->mcu), "main-bus", OBJECT(sysmem),
104 &error_abort);
105 object_property_set_uint(OBJECT(&s->mcu), "xtal-frequency-hz",
106 rxc->xtal_freq_hz, &error_abort);
107 object_property_set_bool(OBJECT(&s->mcu), "load-kernel",
108 kernel_filename != NULL, &error_abort);
109 qdev_realize(DEVICE(&s->mcu), NULL, &error_abort);
110
111 /* Load kernel and dtb */
112 if (kernel_filename) {
113 ram_addr_t kernel_offset;
114
115 /*
116 * The kernel image is loaded into
117 * the latter half of the SDRAM space.
118 */
119 kernel_offset = machine->ram_size / 2;
120 rx_load_image(RX_CPU(first_cpu), kernel_filename,
121 SDRAM_BASE + kernel_offset, kernel_offset);
122 if (dtb_filename) {
123 ram_addr_t dtb_offset;
124 int dtb_size;
125 void *dtb;
126
127 dtb = load_device_tree(dtb_filename, &dtb_size);
128 if (dtb == NULL) {
129 error_report("Couldn't open dtb file %s", dtb_filename);
130 exit(1);
131 }
132 if (machine->kernel_cmdline &&
133 qemu_fdt_setprop_string(dtb, "/chosen", "bootargs",
134 machine->kernel_cmdline) < 0) {
135 error_report("Couldn't set /chosen/bootargs");
136 exit(1);
137 }
138 /* DTB is located at the end of SDRAM space. */
139 dtb_offset = machine->ram_size - dtb_size;
140 rom_add_blob_fixed("dtb", dtb, dtb_size,
141 SDRAM_BASE + dtb_offset);
142 /* Set dtb address to R1 */
143 RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset;
144 }
145 }
146 }
147
148 static void rx_gdbsim_class_init(ObjectClass *oc, void *data)
149 {
150 MachineClass *mc = MACHINE_CLASS(oc);
151
152 mc->init = rx_gdbsim_init;
153 mc->default_cpu_type = TYPE_RX62N_CPU;
154 mc->default_ram_size = 16 * MiB;
155 mc->default_ram_id = "ext-sdram";
156 }
157
158 static void rx62n7_class_init(ObjectClass *oc, void *data)
159 {
160 RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc);
161 MachineClass *mc = MACHINE_CLASS(oc);
162
163 rxc->mcu_name = TYPE_R5F562N7_MCU;
164 rxc->xtal_freq_hz = 12 * 1000 * 1000;
165 mc->desc = "gdb simulator (R5F562N7 MCU and external RAM)";
166 };
167
168 static void rx62n8_class_init(ObjectClass *oc, void *data)
169 {
170 RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc);
171 MachineClass *mc = MACHINE_CLASS(oc);
172
173 rxc->mcu_name = TYPE_R5F562N8_MCU;
174 rxc->xtal_freq_hz = 12 * 1000 * 1000;
175 mc->desc = "gdb simulator (R5F562N8 MCU and external RAM)";
176 };
177
178 static const TypeInfo rx_gdbsim_types[] = {
179 {
180 .name = MACHINE_TYPE_NAME("gdbsim-r5f562n7"),
181 .parent = TYPE_RX_GDBSIM_MACHINE,
182 .class_init = rx62n7_class_init,
183 }, {
184 .name = MACHINE_TYPE_NAME("gdbsim-r5f562n8"),
185 .parent = TYPE_RX_GDBSIM_MACHINE,
186 .class_init = rx62n8_class_init,
187 }, {
188 .name = TYPE_RX_GDBSIM_MACHINE,
189 .parent = TYPE_MACHINE,
190 .instance_size = sizeof(RxGdbSimMachineState),
191 .class_size = sizeof(RxGdbSimMachineClass),
192 .class_init = rx_gdbsim_class_init,
193 .abstract = true,
194 }
195 };
196
197 DEFINE_TYPES(rx_gdbsim_types)