Add access control support to qemu bridge helper
[qemu.git] / hw / sh_intc.h
1 #ifndef __SH_INTC_H__
2 #define __SH_INTC_H__
3
4 #include "qemu-common.h"
5 #include "irq.h"
6 #include "exec-memory.h"
7
8 typedef unsigned char intc_enum;
9
10 struct intc_vect {
11 intc_enum enum_id;
12 unsigned short vect;
13 };
14
15 #define INTC_VECT(enum_id, vect) { enum_id, vect }
16
17 struct intc_group {
18 intc_enum enum_id;
19 intc_enum enum_ids[32];
20 };
21
22 #define INTC_GROUP(enum_id, ...) { enum_id, { __VA_ARGS__ } }
23
24 struct intc_mask_reg {
25 unsigned long set_reg, clr_reg, reg_width;
26 intc_enum enum_ids[32];
27 unsigned long value;
28 };
29
30 struct intc_prio_reg {
31 unsigned long set_reg, clr_reg, reg_width, field_width;
32 intc_enum enum_ids[16];
33 unsigned long value;
34 };
35
36 #define _INTC_ARRAY(a) a, ARRAY_SIZE(a)
37
38 struct intc_source {
39 unsigned short vect;
40 intc_enum next_enum_id;
41
42 int asserted; /* emulates the interrupt signal line from device to intc */
43 int enable_count;
44 int enable_max;
45 int pending; /* emulates the result of signal and masking */
46 struct intc_desc *parent;
47 };
48
49 struct intc_desc {
50 MemoryRegion iomem;
51 MemoryRegion *iomem_aliases;
52 qemu_irq *irqs;
53 struct intc_source *sources;
54 int nr_sources;
55 struct intc_mask_reg *mask_regs;
56 int nr_mask_regs;
57 struct intc_prio_reg *prio_regs;
58 int nr_prio_regs;
59 int pending; /* number of interrupt sources that has pending set */
60 };
61
62 int sh_intc_get_pending_vector(struct intc_desc *desc, int imask);
63 struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id);
64 void sh_intc_toggle_source(struct intc_source *source,
65 int enable_adj, int assert_adj);
66
67 void sh_intc_register_sources(struct intc_desc *desc,
68 struct intc_vect *vectors,
69 int nr_vectors,
70 struct intc_group *groups,
71 int nr_groups);
72
73 int sh_intc_init(MemoryRegion *sysmem,
74 struct intc_desc *desc,
75 int nr_sources,
76 struct intc_mask_reg *mask_regs,
77 int nr_mask_regs,
78 struct intc_prio_reg *prio_regs,
79 int nr_prio_regs);
80
81 void sh_intc_set_irl(void *opaque, int n, int level);
82
83 #endif /* __SH_INTC_H__ */