PPC: e500: msync is 440 only, e500 has real sync
[qemu.git] / hw / shix.c
1 /*
2 * SHIX 2.0 board description
3 *
4 * Copyright (c) 2005 Samuel Tardieu
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 /*
25 Shix 2.0 board by Alexis Polti, described at
26 http://perso.enst.fr/~polti/realisations/shix20/
27
28 More information in target-sh4/README.sh4
29 */
30 #include "hw.h"
31 #include "sh.h"
32 #include "sysemu.h"
33 #include "boards.h"
34 #include "loader.h"
35 #include "exec-memory.h"
36
37 #define BIOS_FILENAME "shix_bios.bin"
38 #define BIOS_ADDRESS 0xA0000000
39
40 static void shix_init(ram_addr_t ram_size,
41 const char *boot_device,
42 const char *kernel_filename, const char *kernel_cmdline,
43 const char *initrd_filename, const char *cpu_model)
44 {
45 int ret;
46 CPUState *env;
47 struct SH7750State *s;
48 MemoryRegion *sysmem = get_system_memory();
49 MemoryRegion *rom = g_new(MemoryRegion, 1);
50 MemoryRegion *sdram = g_new(MemoryRegion, 2);
51
52 if (!cpu_model)
53 cpu_model = "any";
54
55 printf("Initializing CPU\n");
56 env = cpu_init(cpu_model);
57
58 /* Allocate memory space */
59 printf("Allocating ROM\n");
60 memory_region_init_ram(rom, "shix.rom", 0x4000);
61 vmstate_register_ram_global(rom);
62 memory_region_set_readonly(rom, true);
63 memory_region_add_subregion(sysmem, 0x00000000, rom);
64 printf("Allocating SDRAM 1\n");
65 memory_region_init_ram(&sdram[0], "shix.sdram1", 0x01000000);
66 vmstate_register_ram_global(&sdram[0]);
67 memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
68 printf("Allocating SDRAM 2\n");
69 memory_region_init_ram(&sdram[1], "shix.sdram2", 0x01000000);
70 vmstate_register_ram_global(&sdram[1]);
71 memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
72
73 /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
74 if (bios_name == NULL)
75 bios_name = BIOS_FILENAME;
76 printf("%s: load BIOS '%s'\n", __func__, bios_name);
77 ret = load_image_targphys(bios_name, 0, 0x4000);
78 if (ret < 0) { /* Check bios size */
79 fprintf(stderr, "ret=%d\n", ret);
80 fprintf(stderr, "qemu: could not load SHIX bios '%s'\n",
81 bios_name);
82 exit(1);
83 }
84
85 /* Register peripherals */
86 s = sh7750_init(env, sysmem);
87 /* XXXXX Check success */
88 tc58128_init(s, "shix_linux_nand.bin", NULL);
89 fprintf(stderr, "initialization terminated\n");
90 }
91
92 static QEMUMachine shix_machine = {
93 .name = "shix",
94 .desc = "shix card",
95 .init = shix_init,
96 .is_default = 1,
97 };
98
99 static void shix_machine_init(void)
100 {
101 qemu_register_machine(&shix_machine);
102 }
103
104 machine_init(shix_machine_init);