Merge tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu into staging
[qemu.git] / hw / sparc / leon3.c
1 /*
2 * QEMU Leon3 System Emulator
3 *
4 * Copyright (c) 2010-2019 AdaCore
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "qemu/error-report.h"
28 #include "qapi/error.h"
29 #include "qemu/datadir.h"
30 #include "cpu.h"
31 #include "hw/irq.h"
32 #include "qemu/timer.h"
33 #include "hw/ptimer.h"
34 #include "hw/qdev-properties.h"
35 #include "sysemu/sysemu.h"
36 #include "sysemu/qtest.h"
37 #include "sysemu/reset.h"
38 #include "hw/boards.h"
39 #include "hw/loader.h"
40 #include "elf.h"
41 #include "trace.h"
42
43 #include "hw/sparc/grlib.h"
44 #include "hw/misc/grlib_ahb_apb_pnp.h"
45
46 /* Default system clock. */
47 #define CPU_CLK (40 * 1000 * 1000)
48
49 #define LEON3_PROM_FILENAME "u-boot.bin"
50 #define LEON3_PROM_OFFSET (0x00000000)
51 #define LEON3_RAM_OFFSET (0x40000000)
52
53 #define LEON3_UART_OFFSET (0x80000100)
54 #define LEON3_UART_IRQ (3)
55
56 #define LEON3_IRQMP_OFFSET (0x80000200)
57
58 #define LEON3_TIMER_OFFSET (0x80000300)
59 #define LEON3_TIMER_IRQ (6)
60 #define LEON3_TIMER_COUNT (2)
61
62 #define LEON3_APB_PNP_OFFSET (0x800FF000)
63 #define LEON3_AHB_PNP_OFFSET (0xFFFFF000)
64
65 typedef struct ResetData {
66 SPARCCPU *cpu;
67 uint32_t entry; /* save kernel entry in case of reset */
68 target_ulong sp; /* initial stack pointer */
69 } ResetData;
70
71 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val)
72 {
73 stl_p(code++, 0x82100000); /* mov %g0, %g1 */
74 stl_p(code++, 0x84100000); /* mov %g0, %g2 */
75 stl_p(code++, 0x03000000 +
76 extract32(addr, 10, 22));
77 /* sethi %hi(addr), %g1 */
78 stl_p(code++, 0x82106000 +
79 extract32(addr, 0, 10));
80 /* or %g1, addr, %g1 */
81 stl_p(code++, 0x05000000 +
82 extract32(val, 10, 22));
83 /* sethi %hi(val), %g2 */
84 stl_p(code++, 0x8410a000 +
85 extract32(val, 0, 10));
86 /* or %g2, val, %g2 */
87 stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */
88
89 return code;
90 }
91
92 /*
93 * When loading a kernel in RAM the machine is expected to be in a different
94 * state (eg: initialized by the bootloader). This little code reproduces
95 * this behavior.
96 */
97 static void write_bootloader(CPUSPARCState *env, uint8_t *base,
98 hwaddr kernel_addr)
99 {
100 uint32_t *p = (uint32_t *) base;
101
102 /* Initialize the UARTs */
103 /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */
104 p = gen_store_u32(p, 0x80000108, 3);
105
106 /* Initialize the TIMER 0 */
107 /* *GPTIMER_SCALER_RELOAD = 40 - 1; */
108 p = gen_store_u32(p, 0x80000304, 39);
109 /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE; */
110 p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE);
111 /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */
112 p = gen_store_u32(p, 0x80000318, 3);
113
114 /* JUMP to the entry point */
115 stl_p(p++, 0x82100000); /* mov %g0, %g1 */
116 stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22));
117 /* sethi %hi(kernel_addr), %g1 */
118 stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10));
119 /* or kernel_addr, %g1 */
120 stl_p(p++, 0x81c04000); /* jmp %g1 */
121 stl_p(p++, 0x01000000); /* nop */
122 }
123
124 static void main_cpu_reset(void *opaque)
125 {
126 ResetData *s = (ResetData *)opaque;
127 CPUState *cpu = CPU(s->cpu);
128 CPUSPARCState *env = &s->cpu->env;
129
130 cpu_reset(cpu);
131
132 cpu->halted = 0;
133 env->pc = s->entry;
134 env->npc = s->entry + 4;
135 env->regbase[6] = s->sp;
136 }
137
138 static void leon3_cache_control_int(CPUSPARCState *env)
139 {
140 uint32_t state = 0;
141
142 if (env->cache_control & CACHE_CTRL_IF) {
143 /* Instruction cache state */
144 state = env->cache_control & CACHE_STATE_MASK;
145 if (state == CACHE_ENABLED) {
146 state = CACHE_FROZEN;
147 trace_int_helper_icache_freeze();
148 }
149
150 env->cache_control &= ~CACHE_STATE_MASK;
151 env->cache_control |= state;
152 }
153
154 if (env->cache_control & CACHE_CTRL_DF) {
155 /* Data cache state */
156 state = (env->cache_control >> 2) & CACHE_STATE_MASK;
157 if (state == CACHE_ENABLED) {
158 state = CACHE_FROZEN;
159 trace_int_helper_dcache_freeze();
160 }
161
162 env->cache_control &= ~(CACHE_STATE_MASK << 2);
163 env->cache_control |= (state << 2);
164 }
165 }
166
167 static void leon3_irq_ack(void *irq_manager, int intno)
168 {
169 grlib_irqmp_ack((DeviceState *)irq_manager, intno);
170 }
171
172 /*
173 * This device assumes that the incoming 'level' value on the
174 * qemu_irq is the interrupt number, not just a simple 0/1 level.
175 */
176 static void leon3_set_pil_in(void *opaque, int n, int level)
177 {
178 CPUSPARCState *env = opaque;
179 uint32_t pil_in = level;
180 CPUState *cs;
181
182 assert(env != NULL);
183
184 env->pil_in = pil_in;
185
186 if (env->pil_in && (env->interrupt_index == 0 ||
187 (env->interrupt_index & ~15) == TT_EXTINT)) {
188 unsigned int i;
189
190 for (i = 15; i > 0; i--) {
191 if (env->pil_in & (1 << i)) {
192 int old_interrupt = env->interrupt_index;
193
194 env->interrupt_index = TT_EXTINT | i;
195 if (old_interrupt != env->interrupt_index) {
196 cs = env_cpu(env);
197 trace_leon3_set_irq(i);
198 cpu_interrupt(cs, CPU_INTERRUPT_HARD);
199 }
200 break;
201 }
202 }
203 } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) {
204 cs = env_cpu(env);
205 trace_leon3_reset_irq(env->interrupt_index & 15);
206 env->interrupt_index = 0;
207 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
208 }
209 }
210
211 static void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno)
212 {
213 leon3_irq_ack(irq_manager, intno);
214 leon3_cache_control_int(env);
215 }
216
217 static void leon3_generic_hw_init(MachineState *machine)
218 {
219 ram_addr_t ram_size = machine->ram_size;
220 const char *bios_name = machine->firmware ?: LEON3_PROM_FILENAME;
221 const char *kernel_filename = machine->kernel_filename;
222 SPARCCPU *cpu;
223 CPUSPARCState *env;
224 MemoryRegion *address_space_mem = get_system_memory();
225 MemoryRegion *prom = g_new(MemoryRegion, 1);
226 int ret;
227 char *filename;
228 int bios_size;
229 int prom_size;
230 ResetData *reset_info;
231 DeviceState *dev, *irqmpdev;
232 int i;
233 AHBPnp *ahb_pnp;
234 APBPnp *apb_pnp;
235
236 /* Init CPU */
237 cpu = SPARC_CPU(cpu_create(machine->cpu_type));
238 env = &cpu->env;
239
240 cpu_sparc_set_id(env, 0);
241
242 /* Reset data */
243 reset_info = g_new0(ResetData, 1);
244 reset_info->cpu = cpu;
245 reset_info->sp = LEON3_RAM_OFFSET + ram_size;
246 qemu_register_reset(main_cpu_reset, reset_info);
247
248 ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP));
249 sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal);
250 sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET);
251 grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER,
252 GRLIB_LEON3_DEV, GRLIB_AHB_MASTER,
253 GRLIB_CPU_AREA);
254
255 apb_pnp = GRLIB_APB_PNP(qdev_new(TYPE_GRLIB_APB_PNP));
256 sysbus_realize_and_unref(SYS_BUS_DEVICE(apb_pnp), &error_fatal);
257 sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET);
258 grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF,
259 GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV,
260 GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA);
261
262 /* Allocate IRQ manager */
263 irqmpdev = qdev_new(TYPE_GRLIB_IRQMP);
264 qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in,
265 env, "pil", 1);
266 qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", 0,
267 qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0));
268 sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal);
269 sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET);
270 env->irq_manager = irqmpdev;
271 env->qemu_irq_ack = leon3_irq_manager;
272 grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF,
273 GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV,
274 2, 0, GRLIB_APBIO_AREA);
275
276 /* Allocate RAM */
277 if (ram_size > 1 * GiB) {
278 error_report("Too much memory for this machine: %" PRId64 "MB,"
279 " maximum 1G",
280 ram_size / MiB);
281 exit(1);
282 }
283
284 memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET,
285 machine->ram);
286
287 /* Allocate BIOS */
288 prom_size = 8 * MiB;
289 memory_region_init_rom(prom, NULL, "Leon3.bios", prom_size, &error_fatal);
290 memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom);
291
292 /* Load boot prom */
293 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
294
295 if (filename) {
296 bios_size = get_image_size(filename);
297 } else {
298 bios_size = -1;
299 }
300
301 if (bios_size > prom_size) {
302 error_report("could not load prom '%s': file too big", filename);
303 exit(1);
304 }
305
306 if (bios_size > 0) {
307 ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size);
308 if (ret < 0 || ret > prom_size) {
309 error_report("could not load prom '%s'", filename);
310 exit(1);
311 }
312 } else if (kernel_filename == NULL && !qtest_enabled()) {
313 error_report("Can't read bios image '%s'", filename
314 ? filename
315 : LEON3_PROM_FILENAME);
316 exit(1);
317 }
318 g_free(filename);
319
320 /* Can directly load an application. */
321 if (kernel_filename != NULL) {
322 long kernel_size;
323 uint64_t entry;
324
325 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
326 &entry, NULL, NULL, NULL,
327 1 /* big endian */, EM_SPARC, 0, 0);
328 if (kernel_size < 0) {
329 kernel_size = load_uimage(kernel_filename, NULL, &entry,
330 NULL, NULL, NULL);
331 }
332 if (kernel_size < 0) {
333 error_report("could not load kernel '%s'", kernel_filename);
334 exit(1);
335 }
336 if (bios_size <= 0) {
337 /*
338 * If there is no bios/monitor just start the application but put
339 * the machine in an initialized state through a little
340 * bootloader.
341 */
342 uint8_t *bootloader_entry;
343
344 bootloader_entry = memory_region_get_ram_ptr(prom);
345 write_bootloader(env, bootloader_entry, entry);
346 env->pc = LEON3_PROM_OFFSET;
347 env->npc = LEON3_PROM_OFFSET + 4;
348 reset_info->entry = LEON3_PROM_OFFSET;
349 }
350 }
351
352 /* Allocate timers */
353 dev = qdev_new(TYPE_GRLIB_GPTIMER);
354 qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT);
355 qdev_prop_set_uint32(dev, "frequency", CPU_CLK);
356 qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ);
357 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
358
359 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET);
360 for (i = 0; i < LEON3_TIMER_COUNT; i++) {
361 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
362 qdev_get_gpio_in(irqmpdev, LEON3_TIMER_IRQ + i));
363 }
364
365 grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF,
366 GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV,
367 0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA);
368
369 /* Allocate uart */
370 dev = qdev_new(TYPE_GRLIB_APB_UART);
371 qdev_prop_set_chr(dev, "chrdev", serial_hd(0));
372 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
373 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET);
374 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
375 qdev_get_gpio_in(irqmpdev, LEON3_UART_IRQ));
376 grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF,
377 GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1,
378 LEON3_UART_IRQ, GRLIB_APBIO_AREA);
379 }
380
381 static void leon3_generic_machine_init(MachineClass *mc)
382 {
383 mc->desc = "Leon-3 generic";
384 mc->init = leon3_generic_hw_init;
385 mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3");
386 mc->default_ram_id = "leon3.ram";
387 }
388
389 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)