linux-user: stack_base is now mandatory on all targets
[qemu.git] / hw / spitz.c
1 /*
2 * PXA270-based Clamshell PDA platforms.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This code is licensed under the GNU GPL v2.
8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
11 */
12
13 #include "hw.h"
14 #include "pxa.h"
15 #include "arm-misc.h"
16 #include "sysemu.h"
17 #include "pcmcia.h"
18 #include "i2c.h"
19 #include "ssi.h"
20 #include "flash.h"
21 #include "qemu-timer.h"
22 #include "devices.h"
23 #include "sharpsl.h"
24 #include "console.h"
25 #include "block.h"
26 #include "audio/audio.h"
27 #include "boards.h"
28 #include "blockdev.h"
29 #include "sysbus.h"
30 #include "exec-memory.h"
31
32 #undef REG_FMT
33 #define REG_FMT "0x%02lx"
34
35 /* Spitz Flash */
36 #define FLASH_BASE 0x0c000000
37 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
38 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
39 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
40 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */
41 #define FLASH_ECCCLRR 0x10 /* Clear ECC */
42 #define FLASH_FLASHIO 0x14 /* Flash I/O */
43 #define FLASH_FLASHCTL 0x18 /* Flash Control */
44
45 #define FLASHCTL_CE0 (1 << 0)
46 #define FLASHCTL_CLE (1 << 1)
47 #define FLASHCTL_ALE (1 << 2)
48 #define FLASHCTL_WP (1 << 3)
49 #define FLASHCTL_CE1 (1 << 4)
50 #define FLASHCTL_RYBY (1 << 5)
51 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
52
53 typedef struct {
54 SysBusDevice busdev;
55 MemoryRegion iomem;
56 DeviceState *nand;
57 uint8_t ctl;
58 uint8_t manf_id;
59 uint8_t chip_id;
60 ECCState ecc;
61 } SLNANDState;
62
63 static uint64_t sl_read(void *opaque, target_phys_addr_t addr, unsigned size)
64 {
65 SLNANDState *s = (SLNANDState *) opaque;
66 int ryby;
67
68 switch (addr) {
69 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
70 case FLASH_ECCLPLB:
71 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
72 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
73
74 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
75 case FLASH_ECCLPUB:
76 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
77 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
78
79 case FLASH_ECCCP:
80 return s->ecc.cp;
81
82 case FLASH_ECCCNTR:
83 return s->ecc.count & 0xff;
84
85 case FLASH_FLASHCTL:
86 nand_getpins(s->nand, &ryby);
87 if (ryby)
88 return s->ctl | FLASHCTL_RYBY;
89 else
90 return s->ctl;
91
92 case FLASH_FLASHIO:
93 if (size == 4) {
94 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
95 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
96 }
97 return ecc_digest(&s->ecc, nand_getio(s->nand));
98
99 default:
100 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
101 }
102 return 0;
103 }
104
105 static void sl_write(void *opaque, target_phys_addr_t addr,
106 uint64_t value, unsigned size)
107 {
108 SLNANDState *s = (SLNANDState *) opaque;
109
110 switch (addr) {
111 case FLASH_ECCCLRR:
112 /* Value is ignored. */
113 ecc_reset(&s->ecc);
114 break;
115
116 case FLASH_FLASHCTL:
117 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
118 nand_setpins(s->nand,
119 s->ctl & FLASHCTL_CLE,
120 s->ctl & FLASHCTL_ALE,
121 s->ctl & FLASHCTL_NCE,
122 s->ctl & FLASHCTL_WP,
123 0);
124 break;
125
126 case FLASH_FLASHIO:
127 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
128 break;
129
130 default:
131 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
132 }
133 }
134
135 enum {
136 FLASH_128M,
137 FLASH_1024M,
138 };
139
140 static const MemoryRegionOps sl_ops = {
141 .read = sl_read,
142 .write = sl_write,
143 .endianness = DEVICE_NATIVE_ENDIAN,
144 };
145
146 static void sl_flash_register(PXA2xxState *cpu, int size)
147 {
148 DeviceState *dev;
149
150 dev = qdev_create(NULL, "sl-nand");
151
152 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
153 if (size == FLASH_128M)
154 qdev_prop_set_uint8(dev, "chip_id", 0x73);
155 else if (size == FLASH_1024M)
156 qdev_prop_set_uint8(dev, "chip_id", 0xf1);
157
158 qdev_init_nofail(dev);
159 sysbus_mmio_map(sysbus_from_qdev(dev), 0, FLASH_BASE);
160 }
161
162 static int sl_nand_init(SysBusDevice *dev) {
163 SLNANDState *s;
164 DriveInfo *nand;
165
166 s = FROM_SYSBUS(SLNANDState, dev);
167
168 s->ctl = 0;
169 nand = drive_get(IF_MTD, 0, 0);
170 s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
171
172 memory_region_init_io(&s->iomem, &sl_ops, s, "sl", 0x40);
173 sysbus_init_mmio(dev, &s->iomem);
174
175 return 0;
176 }
177
178 /* Spitz Keyboard */
179
180 #define SPITZ_KEY_STROBE_NUM 11
181 #define SPITZ_KEY_SENSE_NUM 7
182
183 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
184 12, 17, 91, 34, 36, 38, 39
185 };
186
187 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
188 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
189 };
190
191 /* Eighth additional row maps the special keys */
192 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
193 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
194 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
195 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
196 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
197 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
198 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
199 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
200 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
201 };
202
203 #define SPITZ_GPIO_AK_INT 13 /* Remote control */
204 #define SPITZ_GPIO_SYNC 16 /* Sync button */
205 #define SPITZ_GPIO_ON_KEY 95 /* Power button */
206 #define SPITZ_GPIO_SWA 97 /* Lid */
207 #define SPITZ_GPIO_SWB 96 /* Tablet mode */
208
209 /* The special buttons are mapped to unused keys */
210 static const int spitz_gpiomap[5] = {
211 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
212 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
213 };
214
215 typedef struct {
216 SysBusDevice busdev;
217 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
218 qemu_irq gpiomap[5];
219 int keymap[0x80];
220 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
221 uint16_t strobe_state;
222 uint16_t sense_state;
223
224 uint16_t pre_map[0x100];
225 uint16_t modifiers;
226 uint16_t imodifiers;
227 uint8_t fifo[16];
228 int fifopos, fifolen;
229 QEMUTimer *kbdtimer;
230 } SpitzKeyboardState;
231
232 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
233 {
234 int i;
235 uint16_t strobe, sense = 0;
236 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
237 strobe = s->keyrow[i] & s->strobe_state;
238 if (strobe) {
239 sense |= 1 << i;
240 if (!(s->sense_state & (1 << i)))
241 qemu_irq_raise(s->sense[i]);
242 } else if (s->sense_state & (1 << i))
243 qemu_irq_lower(s->sense[i]);
244 }
245
246 s->sense_state = sense;
247 }
248
249 static void spitz_keyboard_strobe(void *opaque, int line, int level)
250 {
251 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
252
253 if (level)
254 s->strobe_state |= 1 << line;
255 else
256 s->strobe_state &= ~(1 << line);
257 spitz_keyboard_sense_update(s);
258 }
259
260 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
261 {
262 int spitz_keycode = s->keymap[keycode & 0x7f];
263 if (spitz_keycode == -1)
264 return;
265
266 /* Handle the additional keys */
267 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
268 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
269 return;
270 }
271
272 if (keycode & 0x80)
273 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
274 else
275 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
276
277 spitz_keyboard_sense_update(s);
278 }
279
280 #define SHIFT (1 << 7)
281 #define CTRL (1 << 8)
282 #define FN (1 << 9)
283
284 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
285
286 static void spitz_keyboard_handler(void *opaque, int keycode)
287 {
288 SpitzKeyboardState *s = opaque;
289 uint16_t code;
290 int mapcode;
291 switch (keycode) {
292 case 0x2a: /* Left Shift */
293 s->modifiers |= 1;
294 break;
295 case 0xaa:
296 s->modifiers &= ~1;
297 break;
298 case 0x36: /* Right Shift */
299 s->modifiers |= 2;
300 break;
301 case 0xb6:
302 s->modifiers &= ~2;
303 break;
304 case 0x1d: /* Control */
305 s->modifiers |= 4;
306 break;
307 case 0x9d:
308 s->modifiers &= ~4;
309 break;
310 case 0x38: /* Alt */
311 s->modifiers |= 8;
312 break;
313 case 0xb8:
314 s->modifiers &= ~8;
315 break;
316 }
317
318 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
319 (keycode | SHIFT) :
320 (keycode & ~SHIFT))];
321
322 if (code != mapcode) {
323 #if 0
324 if ((code & SHIFT) && !(s->modifiers & 1))
325 QUEUE_KEY(0x2a | (keycode & 0x80));
326 if ((code & CTRL ) && !(s->modifiers & 4))
327 QUEUE_KEY(0x1d | (keycode & 0x80));
328 if ((code & FN ) && !(s->modifiers & 8))
329 QUEUE_KEY(0x38 | (keycode & 0x80));
330 if ((code & FN ) && (s->modifiers & 1))
331 QUEUE_KEY(0x2a | (~keycode & 0x80));
332 if ((code & FN ) && (s->modifiers & 2))
333 QUEUE_KEY(0x36 | (~keycode & 0x80));
334 #else
335 if (keycode & 0x80) {
336 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
337 QUEUE_KEY(0x2a | 0x80);
338 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
339 QUEUE_KEY(0x1d | 0x80);
340 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
341 QUEUE_KEY(0x38 | 0x80);
342 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
343 QUEUE_KEY(0x2a);
344 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
345 QUEUE_KEY(0x36);
346 s->imodifiers = 0;
347 } else {
348 if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) {
349 QUEUE_KEY(0x2a);
350 s->imodifiers |= 1;
351 }
352 if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) {
353 QUEUE_KEY(0x1d);
354 s->imodifiers |= 4;
355 }
356 if ((code & FN ) && !((s->modifiers | s->imodifiers) & 8)) {
357 QUEUE_KEY(0x38);
358 s->imodifiers |= 8;
359 }
360 if ((code & FN ) && (s->modifiers & 1) &&
361 !(s->imodifiers & 0x10)) {
362 QUEUE_KEY(0x2a | 0x80);
363 s->imodifiers |= 0x10;
364 }
365 if ((code & FN ) && (s->modifiers & 2) &&
366 !(s->imodifiers & 0x20)) {
367 QUEUE_KEY(0x36 | 0x80);
368 s->imodifiers |= 0x20;
369 }
370 }
371 #endif
372 }
373
374 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
375 }
376
377 static void spitz_keyboard_tick(void *opaque)
378 {
379 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
380
381 if (s->fifolen) {
382 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
383 s->fifolen --;
384 if (s->fifopos >= 16)
385 s->fifopos = 0;
386 }
387
388 qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock) +
389 get_ticks_per_sec() / 32);
390 }
391
392 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
393 {
394 int i;
395 for (i = 0; i < 0x100; i ++)
396 s->pre_map[i] = i;
397 s->pre_map[0x02 | SHIFT ] = 0x02 | SHIFT; /* exclam */
398 s->pre_map[0x28 | SHIFT ] = 0x03 | SHIFT; /* quotedbl */
399 s->pre_map[0x04 | SHIFT ] = 0x04 | SHIFT; /* numbersign */
400 s->pre_map[0x05 | SHIFT ] = 0x05 | SHIFT; /* dollar */
401 s->pre_map[0x06 | SHIFT ] = 0x06 | SHIFT; /* percent */
402 s->pre_map[0x08 | SHIFT ] = 0x07 | SHIFT; /* ampersand */
403 s->pre_map[0x28 ] = 0x08 | SHIFT; /* apostrophe */
404 s->pre_map[0x0a | SHIFT ] = 0x09 | SHIFT; /* parenleft */
405 s->pre_map[0x0b | SHIFT ] = 0x0a | SHIFT; /* parenright */
406 s->pre_map[0x29 | SHIFT ] = 0x0b | SHIFT; /* asciitilde */
407 s->pre_map[0x03 | SHIFT ] = 0x0c | SHIFT; /* at */
408 s->pre_map[0xd3 ] = 0x0e | FN; /* Delete */
409 s->pre_map[0x3a ] = 0x0f | FN; /* Caps_Lock */
410 s->pre_map[0x07 | SHIFT ] = 0x11 | FN; /* asciicircum */
411 s->pre_map[0x0d ] = 0x12 | FN; /* equal */
412 s->pre_map[0x0d | SHIFT ] = 0x13 | FN; /* plus */
413 s->pre_map[0x1a ] = 0x14 | FN; /* bracketleft */
414 s->pre_map[0x1b ] = 0x15 | FN; /* bracketright */
415 s->pre_map[0x1a | SHIFT ] = 0x16 | FN; /* braceleft */
416 s->pre_map[0x1b | SHIFT ] = 0x17 | FN; /* braceright */
417 s->pre_map[0x27 ] = 0x22 | FN; /* semicolon */
418 s->pre_map[0x27 | SHIFT ] = 0x23 | FN; /* colon */
419 s->pre_map[0x09 | SHIFT ] = 0x24 | FN; /* asterisk */
420 s->pre_map[0x2b ] = 0x25 | FN; /* backslash */
421 s->pre_map[0x2b | SHIFT ] = 0x26 | FN; /* bar */
422 s->pre_map[0x0c | SHIFT ] = 0x30 | FN; /* underscore */
423 s->pre_map[0x33 | SHIFT ] = 0x33 | FN; /* less */
424 s->pre_map[0x35 ] = 0x33 | SHIFT; /* slash */
425 s->pre_map[0x34 | SHIFT ] = 0x34 | FN; /* greater */
426 s->pre_map[0x35 | SHIFT ] = 0x34 | SHIFT; /* question */
427 s->pre_map[0x49 ] = 0x48 | FN; /* Page_Up */
428 s->pre_map[0x51 ] = 0x50 | FN; /* Page_Down */
429
430 s->modifiers = 0;
431 s->imodifiers = 0;
432 s->fifopos = 0;
433 s->fifolen = 0;
434 }
435
436 #undef SHIFT
437 #undef CTRL
438 #undef FN
439
440 static int spitz_keyboard_post_load(void *opaque, int version_id)
441 {
442 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
443
444 /* Release all pressed keys */
445 memset(s->keyrow, 0, sizeof(s->keyrow));
446 spitz_keyboard_sense_update(s);
447 s->modifiers = 0;
448 s->imodifiers = 0;
449 s->fifopos = 0;
450 s->fifolen = 0;
451
452 return 0;
453 }
454
455 static void spitz_keyboard_register(PXA2xxState *cpu)
456 {
457 int i;
458 DeviceState *dev;
459 SpitzKeyboardState *s;
460
461 dev = sysbus_create_simple("spitz-keyboard", -1, NULL);
462 s = FROM_SYSBUS(SpitzKeyboardState, sysbus_from_qdev(dev));
463
464 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
465 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
466
467 for (i = 0; i < 5; i ++)
468 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
469
470 if (!graphic_rotate)
471 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
472
473 for (i = 0; i < 5; i++)
474 qemu_set_irq(s->gpiomap[i], 0);
475
476 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
477 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
478 qdev_get_gpio_in(dev, i));
479
480 qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock));
481
482 qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
483 }
484
485 static int spitz_keyboard_init(SysBusDevice *dev)
486 {
487 SpitzKeyboardState *s;
488 int i, j;
489
490 s = FROM_SYSBUS(SpitzKeyboardState, dev);
491
492 for (i = 0; i < 0x80; i ++)
493 s->keymap[i] = -1;
494 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
495 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
496 if (spitz_keymap[i][j] != -1)
497 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
498
499 spitz_keyboard_pre_map(s);
500
501 s->kbdtimer = qemu_new_timer_ns(vm_clock, spitz_keyboard_tick, s);
502 qdev_init_gpio_in(&dev->qdev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
503 qdev_init_gpio_out(&dev->qdev, s->sense, SPITZ_KEY_SENSE_NUM);
504
505 return 0;
506 }
507
508 /* LCD backlight controller */
509
510 #define LCDTG_RESCTL 0x00
511 #define LCDTG_PHACTRL 0x01
512 #define LCDTG_DUTYCTRL 0x02
513 #define LCDTG_POWERREG0 0x03
514 #define LCDTG_POWERREG1 0x04
515 #define LCDTG_GPOR3 0x05
516 #define LCDTG_PICTRL 0x06
517 #define LCDTG_POLCTRL 0x07
518
519 typedef struct {
520 SSISlave ssidev;
521 uint32_t bl_intensity;
522 uint32_t bl_power;
523 } SpitzLCDTG;
524
525 static void spitz_bl_update(SpitzLCDTG *s)
526 {
527 if (s->bl_power && s->bl_intensity)
528 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
529 else
530 zaurus_printf("LCD Backlight now off\n");
531 }
532
533 /* FIXME: Implement GPIO properly and remove this hack. */
534 static SpitzLCDTG *spitz_lcdtg;
535
536 static inline void spitz_bl_bit5(void *opaque, int line, int level)
537 {
538 SpitzLCDTG *s = spitz_lcdtg;
539 int prev = s->bl_intensity;
540
541 if (level)
542 s->bl_intensity &= ~0x20;
543 else
544 s->bl_intensity |= 0x20;
545
546 if (s->bl_power && prev != s->bl_intensity)
547 spitz_bl_update(s);
548 }
549
550 static inline void spitz_bl_power(void *opaque, int line, int level)
551 {
552 SpitzLCDTG *s = spitz_lcdtg;
553 s->bl_power = !!level;
554 spitz_bl_update(s);
555 }
556
557 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
558 {
559 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
560 int addr;
561 addr = value >> 5;
562 value &= 0x1f;
563
564 switch (addr) {
565 case LCDTG_RESCTL:
566 if (value)
567 zaurus_printf("LCD in QVGA mode\n");
568 else
569 zaurus_printf("LCD in VGA mode\n");
570 break;
571
572 case LCDTG_DUTYCTRL:
573 s->bl_intensity &= ~0x1f;
574 s->bl_intensity |= value;
575 if (s->bl_power)
576 spitz_bl_update(s);
577 break;
578
579 case LCDTG_POWERREG0:
580 /* Set common voltage to M62332FP */
581 break;
582 }
583 return 0;
584 }
585
586 static int spitz_lcdtg_init(SSISlave *dev)
587 {
588 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
589
590 spitz_lcdtg = s;
591 s->bl_power = 0;
592 s->bl_intensity = 0x20;
593
594 return 0;
595 }
596
597 /* SSP devices */
598
599 #define CORGI_SSP_PORT 2
600
601 #define SPITZ_GPIO_LCDCON_CS 53
602 #define SPITZ_GPIO_ADS7846_CS 14
603 #define SPITZ_GPIO_MAX1111_CS 20
604 #define SPITZ_GPIO_TP_INT 11
605
606 static DeviceState *max1111;
607
608 /* "Demux" the signal based on current chipselect */
609 typedef struct {
610 SSISlave ssidev;
611 SSIBus *bus[3];
612 uint32_t enable[3];
613 } CorgiSSPState;
614
615 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
616 {
617 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
618 int i;
619
620 for (i = 0; i < 3; i++) {
621 if (s->enable[i]) {
622 return ssi_transfer(s->bus[i], value);
623 }
624 }
625 return 0;
626 }
627
628 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
629 {
630 CorgiSSPState *s = (CorgiSSPState *)opaque;
631 assert(line >= 0 && line < 3);
632 s->enable[line] = !level;
633 }
634
635 #define MAX1111_BATT_VOLT 1
636 #define MAX1111_BATT_TEMP 2
637 #define MAX1111_ACIN_VOLT 3
638
639 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
640 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
641 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
642
643 static void spitz_adc_temp_on(void *opaque, int line, int level)
644 {
645 if (!max1111)
646 return;
647
648 if (level)
649 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
650 else
651 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
652 }
653
654 static int corgi_ssp_init(SSISlave *dev)
655 {
656 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
657
658 qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
659 s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0");
660 s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1");
661 s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2");
662
663 return 0;
664 }
665
666 static void spitz_ssp_attach(PXA2xxState *cpu)
667 {
668 DeviceState *mux;
669 DeviceState *dev;
670 void *bus;
671
672 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
673
674 bus = qdev_get_child_bus(mux, "ssi0");
675 ssi_create_slave(bus, "spitz-lcdtg");
676
677 bus = qdev_get_child_bus(mux, "ssi1");
678 dev = ssi_create_slave(bus, "ads7846");
679 qdev_connect_gpio_out(dev, 0,
680 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
681
682 bus = qdev_get_child_bus(mux, "ssi2");
683 max1111 = ssi_create_slave(bus, "max1111");
684 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
685 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
686 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
687
688 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
689 qdev_get_gpio_in(mux, 0));
690 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
691 qdev_get_gpio_in(mux, 1));
692 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
693 qdev_get_gpio_in(mux, 2));
694 }
695
696 /* CF Microdrive */
697
698 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
699 {
700 PCMCIACardState *md;
701 DriveInfo *dinfo;
702
703 dinfo = drive_get(IF_IDE, 0, 0);
704 if (!dinfo || dinfo->media_cd)
705 return;
706 md = dscm1xxxx_init(dinfo);
707 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
708 }
709
710 /* Wm8750 and Max7310 on I2C */
711
712 #define AKITA_MAX_ADDR 0x18
713 #define SPITZ_WM_ADDRL 0x1b
714 #define SPITZ_WM_ADDRH 0x1a
715
716 #define SPITZ_GPIO_WM 5
717
718 static void spitz_wm8750_addr(void *opaque, int line, int level)
719 {
720 I2CSlave *wm = (I2CSlave *) opaque;
721 if (level)
722 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
723 else
724 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
725 }
726
727 static void spitz_i2c_setup(PXA2xxState *cpu)
728 {
729 /* Attach the CPU on one end of our I2C bus. */
730 i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
731
732 DeviceState *wm;
733
734 /* Attach a WM8750 to the bus */
735 wm = i2c_create_slave(bus, "wm8750", 0);
736
737 spitz_wm8750_addr(wm, 0, 0);
738 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
739 qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
740 /* .. and to the sound interface. */
741 cpu->i2s->opaque = wm;
742 cpu->i2s->codec_out = wm8750_dac_dat;
743 cpu->i2s->codec_in = wm8750_adc_dat;
744 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
745 }
746
747 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
748 {
749 /* Attach a Max7310 to Akita I2C bus. */
750 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
751 AKITA_MAX_ADDR);
752 }
753
754 /* Other peripherals */
755
756 static void spitz_out_switch(void *opaque, int line, int level)
757 {
758 switch (line) {
759 case 0:
760 zaurus_printf("Charging %s.\n", level ? "off" : "on");
761 break;
762 case 1:
763 zaurus_printf("Discharging %s.\n", level ? "on" : "off");
764 break;
765 case 2:
766 zaurus_printf("Green LED %s.\n", level ? "on" : "off");
767 break;
768 case 3:
769 zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
770 break;
771 case 4:
772 spitz_bl_bit5(opaque, line, level);
773 break;
774 case 5:
775 spitz_bl_power(opaque, line, level);
776 break;
777 case 6:
778 spitz_adc_temp_on(opaque, line, level);
779 break;
780 }
781 }
782
783 #define SPITZ_SCP_LED_GREEN 1
784 #define SPITZ_SCP_JK_B 2
785 #define SPITZ_SCP_CHRG_ON 3
786 #define SPITZ_SCP_MUTE_L 4
787 #define SPITZ_SCP_MUTE_R 5
788 #define SPITZ_SCP_CF_POWER 6
789 #define SPITZ_SCP_LED_ORANGE 7
790 #define SPITZ_SCP_JK_A 8
791 #define SPITZ_SCP_ADC_TEMP_ON 9
792 #define SPITZ_SCP2_IR_ON 1
793 #define SPITZ_SCP2_AKIN_PULLUP 2
794 #define SPITZ_SCP2_BACKLIGHT_CONT 7
795 #define SPITZ_SCP2_BACKLIGHT_ON 8
796 #define SPITZ_SCP2_MIC_BIAS 9
797
798 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
799 DeviceState *scp0, DeviceState *scp1)
800 {
801 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
802
803 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
804 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
805 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
806 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
807
808 if (scp1) {
809 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
810 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
811 }
812
813 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
814 }
815
816 #define SPITZ_GPIO_HSYNC 22
817 #define SPITZ_GPIO_SD_DETECT 9
818 #define SPITZ_GPIO_SD_WP 81
819 #define SPITZ_GPIO_ON_RESET 89
820 #define SPITZ_GPIO_BAT_COVER 90
821 #define SPITZ_GPIO_CF1_IRQ 105
822 #define SPITZ_GPIO_CF1_CD 94
823 #define SPITZ_GPIO_CF2_IRQ 106
824 #define SPITZ_GPIO_CF2_CD 93
825
826 static int spitz_hsync;
827
828 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
829 {
830 PXA2xxState *cpu = (PXA2xxState *) opaque;
831 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
832 spitz_hsync ^= 1;
833 }
834
835 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
836 {
837 qemu_irq lcd_hsync;
838 /*
839 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
840 * read to satisfy broken guests that poll-wait for hsync.
841 * Simulating a real hsync event would be less practical and
842 * wouldn't guarantee that a guest ever exits the loop.
843 */
844 spitz_hsync = 0;
845 lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
846 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
847 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
848
849 /* MMC/SD host */
850 pxa2xx_mmci_handlers(cpu->mmc,
851 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
852 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
853
854 /* Battery lock always closed */
855 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
856
857 /* Handle reset */
858 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
859
860 /* PCMCIA signals: card's IRQ and Card-Detect */
861 if (slots >= 1)
862 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
863 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
864 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
865 if (slots >= 2)
866 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
867 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
868 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
869 }
870
871 /* Board init. */
872 enum spitz_model_e { spitz, akita, borzoi, terrier };
873
874 #define SPITZ_RAM 0x04000000
875 #define SPITZ_ROM 0x00800000
876
877 static struct arm_boot_info spitz_binfo = {
878 .loader_start = PXA2XX_SDRAM_BASE,
879 .ram_size = 0x04000000,
880 };
881
882 static void spitz_common_init(ram_addr_t ram_size,
883 const char *kernel_filename,
884 const char *kernel_cmdline, const char *initrd_filename,
885 const char *cpu_model, enum spitz_model_e model, int arm_id)
886 {
887 PXA2xxState *cpu;
888 DeviceState *scp0, *scp1 = NULL;
889 MemoryRegion *address_space_mem = get_system_memory();
890 MemoryRegion *rom = g_new(MemoryRegion, 1);
891
892 if (!cpu_model)
893 cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
894
895 /* Setup CPU & memory */
896 cpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
897
898 sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
899
900 memory_region_init_ram(rom, "spitz.rom", SPITZ_ROM);
901 vmstate_register_ram_global(rom);
902 memory_region_set_readonly(rom, true);
903 memory_region_add_subregion(address_space_mem, 0, rom);
904
905 /* Setup peripherals */
906 spitz_keyboard_register(cpu);
907
908 spitz_ssp_attach(cpu);
909
910 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
911 if (model != akita) {
912 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
913 }
914
915 spitz_scoop_gpio_setup(cpu, scp0, scp1);
916
917 spitz_gpio_setup(cpu, (model == akita) ? 1 : 2);
918
919 spitz_i2c_setup(cpu);
920
921 if (model == akita)
922 spitz_akita_i2c_setup(cpu);
923
924 if (model == terrier)
925 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
926 spitz_microdrive_attach(cpu, 1);
927 else if (model != akita)
928 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
929 spitz_microdrive_attach(cpu, 0);
930
931 spitz_binfo.kernel_filename = kernel_filename;
932 spitz_binfo.kernel_cmdline = kernel_cmdline;
933 spitz_binfo.initrd_filename = initrd_filename;
934 spitz_binfo.board_id = arm_id;
935 arm_load_kernel(cpu->env, &spitz_binfo);
936 sl_bootparam_write(SL_PXA_PARAM_BASE);
937 }
938
939 static void spitz_init(ram_addr_t ram_size,
940 const char *boot_device,
941 const char *kernel_filename, const char *kernel_cmdline,
942 const char *initrd_filename, const char *cpu_model)
943 {
944 spitz_common_init(ram_size, kernel_filename,
945 kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
946 }
947
948 static void borzoi_init(ram_addr_t ram_size,
949 const char *boot_device,
950 const char *kernel_filename, const char *kernel_cmdline,
951 const char *initrd_filename, const char *cpu_model)
952 {
953 spitz_common_init(ram_size, kernel_filename,
954 kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
955 }
956
957 static void akita_init(ram_addr_t ram_size,
958 const char *boot_device,
959 const char *kernel_filename, const char *kernel_cmdline,
960 const char *initrd_filename, const char *cpu_model)
961 {
962 spitz_common_init(ram_size, kernel_filename,
963 kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
964 }
965
966 static void terrier_init(ram_addr_t ram_size,
967 const char *boot_device,
968 const char *kernel_filename, const char *kernel_cmdline,
969 const char *initrd_filename, const char *cpu_model)
970 {
971 spitz_common_init(ram_size, kernel_filename,
972 kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
973 }
974
975 static QEMUMachine akitapda_machine = {
976 .name = "akita",
977 .desc = "Akita PDA (PXA270)",
978 .init = akita_init,
979 };
980
981 static QEMUMachine spitzpda_machine = {
982 .name = "spitz",
983 .desc = "Spitz PDA (PXA270)",
984 .init = spitz_init,
985 };
986
987 static QEMUMachine borzoipda_machine = {
988 .name = "borzoi",
989 .desc = "Borzoi PDA (PXA270)",
990 .init = borzoi_init,
991 };
992
993 static QEMUMachine terrierpda_machine = {
994 .name = "terrier",
995 .desc = "Terrier PDA (PXA270)",
996 .init = terrier_init,
997 };
998
999 static void spitz_machine_init(void)
1000 {
1001 qemu_register_machine(&akitapda_machine);
1002 qemu_register_machine(&spitzpda_machine);
1003 qemu_register_machine(&borzoipda_machine);
1004 qemu_register_machine(&terrierpda_machine);
1005 }
1006
1007 machine_init(spitz_machine_init);
1008
1009 static bool is_version_0(void *opaque, int version_id)
1010 {
1011 return version_id == 0;
1012 }
1013
1014 static VMStateDescription vmstate_sl_nand_info = {
1015 .name = "sl-nand",
1016 .version_id = 0,
1017 .minimum_version_id = 0,
1018 .minimum_version_id_old = 0,
1019 .fields = (VMStateField []) {
1020 VMSTATE_UINT8(ctl, SLNANDState),
1021 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1022 VMSTATE_END_OF_LIST(),
1023 },
1024 };
1025
1026 static Property sl_nand_properties[] = {
1027 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1028 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1029 DEFINE_PROP_END_OF_LIST(),
1030 };
1031
1032 static void sl_nand_class_init(ObjectClass *klass, void *data)
1033 {
1034 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1035
1036 k->init = sl_nand_init;
1037 }
1038
1039 static DeviceInfo sl_nand_info = {
1040 .name = "sl-nand",
1041 .size = sizeof(SLNANDState),
1042 .vmsd = &vmstate_sl_nand_info,
1043 .props = sl_nand_properties,
1044 .class_init = sl_nand_class_init,
1045 };
1046
1047 static VMStateDescription vmstate_spitz_kbd = {
1048 .name = "spitz-keyboard",
1049 .version_id = 1,
1050 .minimum_version_id = 0,
1051 .minimum_version_id_old = 0,
1052 .post_load = spitz_keyboard_post_load,
1053 .fields = (VMStateField []) {
1054 VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1055 VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1056 VMSTATE_UNUSED_TEST(is_version_0, 5),
1057 VMSTATE_END_OF_LIST(),
1058 },
1059 };
1060
1061 static Property spitz_keyboard_properties[] = {
1062 DEFINE_PROP_END_OF_LIST(),
1063 };
1064
1065 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1066 {
1067 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1068
1069 k->init = spitz_keyboard_init;
1070 }
1071
1072 static DeviceInfo spitz_keyboard_info = {
1073 .name = "spitz-keyboard",
1074 .size = sizeof(SpitzKeyboardState),
1075 .vmsd = &vmstate_spitz_kbd,
1076 .props = spitz_keyboard_properties,
1077 .class_init = spitz_keyboard_class_init,
1078 };
1079
1080 static const VMStateDescription vmstate_corgi_ssp_regs = {
1081 .name = "corgi-ssp",
1082 .version_id = 1,
1083 .minimum_version_id = 1,
1084 .minimum_version_id_old = 1,
1085 .fields = (VMStateField []) {
1086 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1087 VMSTATE_END_OF_LIST(),
1088 }
1089 };
1090
1091 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1092 {
1093 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1094
1095 k->init = corgi_ssp_init;
1096 k->transfer = corgi_ssp_transfer;
1097 }
1098
1099 static DeviceInfo corgi_ssp_info = {
1100 .name = "corgi-ssp",
1101 .size = sizeof(CorgiSSPState),
1102 .vmsd = &vmstate_corgi_ssp_regs,
1103 .class_init = corgi_ssp_class_init,
1104 };
1105
1106 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1107 .name = "spitz-lcdtg",
1108 .version_id = 1,
1109 .minimum_version_id = 1,
1110 .minimum_version_id_old = 1,
1111 .fields = (VMStateField []) {
1112 VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1113 VMSTATE_UINT32(bl_power, SpitzLCDTG),
1114 VMSTATE_END_OF_LIST(),
1115 }
1116 };
1117
1118 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1119 {
1120 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1121
1122 k->init = spitz_lcdtg_init;
1123 k->transfer = spitz_lcdtg_transfer;
1124 }
1125
1126 static DeviceInfo spitz_lcdtg_info = {
1127 .name = "spitz-lcdtg",
1128 .size = sizeof(SpitzLCDTG),
1129 .vmsd = &vmstate_spitz_lcdtg_regs,
1130 .class_init = spitz_lcdtg_class_init,
1131 };
1132
1133 static void spitz_register_devices(void)
1134 {
1135 ssi_register_slave(&corgi_ssp_info);
1136 ssi_register_slave(&spitz_lcdtg_info);
1137 sysbus_register_withprop(&spitz_keyboard_info);
1138 sysbus_register_withprop(&sl_nand_info);
1139 }
1140
1141 device_init(spitz_register_devices)