linux-user: stack_base is now mandatory on all targets
[qemu.git] / hw / vga_int.h
1 /*
2 * QEMU internal VGA defines.
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include <hw/hw.h>
26 #include "memory.h"
27
28 #define MSR_COLOR_EMULATION 0x01
29 #define MSR_PAGE_SELECT 0x20
30
31 #define ST01_V_RETRACE 0x08
32 #define ST01_DISP_ENABLE 0x01
33
34 /* bochs VBE support */
35 #define CONFIG_BOCHS_VBE
36
37 #define VBE_DISPI_MAX_XRES 1600
38 #define VBE_DISPI_MAX_YRES 1200
39 #define VBE_DISPI_MAX_BPP 32
40
41 #define VBE_DISPI_INDEX_ID 0x0
42 #define VBE_DISPI_INDEX_XRES 0x1
43 #define VBE_DISPI_INDEX_YRES 0x2
44 #define VBE_DISPI_INDEX_BPP 0x3
45 #define VBE_DISPI_INDEX_ENABLE 0x4
46 #define VBE_DISPI_INDEX_BANK 0x5
47 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
48 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
49 #define VBE_DISPI_INDEX_X_OFFSET 0x8
50 #define VBE_DISPI_INDEX_Y_OFFSET 0x9
51 #define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */
52 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */
53
54 #define VBE_DISPI_ID0 0xB0C0
55 #define VBE_DISPI_ID1 0xB0C1
56 #define VBE_DISPI_ID2 0xB0C2
57 #define VBE_DISPI_ID3 0xB0C3
58 #define VBE_DISPI_ID4 0xB0C4
59 #define VBE_DISPI_ID5 0xB0C5
60
61 #define VBE_DISPI_DISABLED 0x00
62 #define VBE_DISPI_ENABLED 0x01
63 #define VBE_DISPI_GETCAPS 0x02
64 #define VBE_DISPI_8BIT_DAC 0x20
65 #define VBE_DISPI_LFB_ENABLED 0x40
66 #define VBE_DISPI_NOCLEARMEM 0x80
67
68 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
69
70 #ifdef CONFIG_BOCHS_VBE
71
72 #define VGA_STATE_COMMON_BOCHS_VBE \
73 uint16_t vbe_index; \
74 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
75 uint32_t vbe_start_addr; \
76 uint32_t vbe_line_offset; \
77 uint32_t vbe_bank_mask; \
78 int vbe_mapped;
79 #else
80
81 #define VGA_STATE_COMMON_BOCHS_VBE
82
83 #endif /* !CONFIG_BOCHS_VBE */
84
85 #define CH_ATTR_SIZE (160 * 100)
86 #define VGA_MAX_HEIGHT 2048
87
88 struct vga_precise_retrace {
89 int64_t ticks_per_char;
90 int64_t total_chars;
91 int htotal;
92 int hstart;
93 int hend;
94 int vstart;
95 int vend;
96 int freq;
97 };
98
99 union vga_retrace {
100 struct vga_precise_retrace precise;
101 };
102
103 struct VGACommonState;
104 typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
105 typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
106
107 typedef struct VGACommonState {
108 MemoryRegion *legacy_address_space;
109 uint8_t *vram_ptr;
110 MemoryRegion vram;
111 uint32_t vram_size;
112 uint32_t latch;
113 MemoryRegion *chain4_alias;
114 uint8_t sr_index;
115 uint8_t sr[256];
116 uint8_t gr_index;
117 uint8_t gr[256];
118 uint8_t ar_index;
119 uint8_t ar[21];
120 int ar_flip_flop;
121 uint8_t cr_index;
122 uint8_t cr[256]; /* CRT registers */
123 uint8_t msr; /* Misc Output Register */
124 uint8_t fcr; /* Feature Control Register */
125 uint8_t st00; /* status 0 */
126 uint8_t st01; /* status 1 */
127 uint8_t dac_state;
128 uint8_t dac_sub_index;
129 uint8_t dac_read_index;
130 uint8_t dac_write_index;
131 uint8_t dac_cache[3]; /* used when writing */
132 int dac_8bit;
133 uint8_t palette[768];
134 int32_t bank_offset;
135 int (*get_bpp)(struct VGACommonState *s);
136 void (*get_offsets)(struct VGACommonState *s,
137 uint32_t *pline_offset,
138 uint32_t *pstart_addr,
139 uint32_t *pline_compare);
140 void (*get_resolution)(struct VGACommonState *s,
141 int *pwidth,
142 int *pheight);
143 VGA_STATE_COMMON_BOCHS_VBE
144 /* display refresh support */
145 DisplayState *ds;
146 uint32_t font_offsets[2];
147 int graphic_mode;
148 uint8_t shift_control;
149 uint8_t double_scan;
150 uint32_t line_offset;
151 uint32_t line_compare;
152 uint32_t start_addr;
153 uint32_t plane_updated;
154 uint32_t last_line_offset;
155 uint8_t last_cw, last_ch;
156 uint32_t last_width, last_height; /* in chars or pixels */
157 uint32_t last_scr_width, last_scr_height; /* in pixels */
158 uint32_t last_depth; /* in bits */
159 uint8_t cursor_start, cursor_end;
160 uint32_t cursor_offset;
161 unsigned int (*rgb_to_pixel)(unsigned int r,
162 unsigned int g, unsigned b);
163 vga_hw_update_ptr update;
164 vga_hw_invalidate_ptr invalidate;
165 vga_hw_screen_dump_ptr screen_dump;
166 vga_hw_text_update_ptr text_update;
167 /* hardware mouse cursor support */
168 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
169 void (*cursor_invalidate)(struct VGACommonState *s);
170 void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
171 /* tell for each page if it has been updated since the last time */
172 uint32_t last_palette[256];
173 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
174 /* retrace */
175 vga_retrace_fn retrace;
176 vga_update_retrace_info_fn update_retrace_info;
177 union vga_retrace retrace_info;
178 uint8_t is_vbe_vmstate;
179 } VGACommonState;
180
181 static inline int c6_to_8(int v)
182 {
183 int b;
184 v &= 0x3f;
185 b = v & 1;
186 return (v << 2) | (b << 1) | b;
187 }
188
189 void vga_common_init(VGACommonState *s, int vga_ram_size);
190 void vga_init(VGACommonState *s, MemoryRegion *address_space,
191 MemoryRegion *address_space_io, bool init_vga_ports);
192 MemoryRegion *vga_init_io(VGACommonState *s,
193 const MemoryRegionPortio **vga_ports,
194 const MemoryRegionPortio **vbe_ports);
195 void vga_common_reset(VGACommonState *s);
196
197 void vga_dirty_log_start(VGACommonState *s);
198 void vga_dirty_log_stop(VGACommonState *s);
199
200 extern const VMStateDescription vmstate_vga_common;
201 uint32_t vga_ioport_read(void *opaque, uint32_t addr);
202 void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
203 uint32_t vga_mem_readb(VGACommonState *s, target_phys_addr_t addr);
204 void vga_mem_writeb(VGACommonState *s, target_phys_addr_t addr, uint32_t val);
205 void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
206 int ppm_save(const char *filename, struct DisplaySurface *ds);
207
208 void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
209 int poffset, int w,
210 unsigned int color0, unsigned int color1,
211 unsigned int color_xor);
212 void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
213 int poffset, int w,
214 unsigned int color0, unsigned int color1,
215 unsigned int color_xor);
216 void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
217 int poffset, int w,
218 unsigned int color0, unsigned int color1,
219 unsigned int color_xor);
220
221 int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
222 void vga_init_vbe(VGACommonState *s, MemoryRegion *address_space);
223
224 extern const uint8_t sr_mask[8];
225 extern const uint8_t gr_mask[16];
226
227 #define VGA_RAM_SIZE (8192 * 1024)
228 #define VGABIOS_FILENAME "vgabios.bin"
229 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
230
231 extern const MemoryRegionOps vga_mem_ops;