PPC: e500: msync is 440 only, e500 has real sync
[qemu.git] / hw / xilinx.h
1 #include "qemu-common.h"
2 #include "net.h"
3
4 static inline DeviceState *
5 xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr)
6 {
7 DeviceState *dev;
8
9 dev = qdev_create(NULL, "xilinx,intc");
10 qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
11 qdev_init_nofail(dev);
12 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
13 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
14 return dev;
15 }
16
17 /* OPB Timer/Counter. */
18 static inline DeviceState *
19 xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int nr, int freq)
20 {
21 DeviceState *dev;
22
23 dev = qdev_create(NULL, "xilinx,timer");
24 qdev_prop_set_uint32(dev, "nr-timers", nr);
25 qdev_prop_set_uint32(dev, "frequency", freq);
26 qdev_init_nofail(dev);
27 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
28 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
29 return dev;
30 }
31
32 /* XPS Ethernet Lite MAC. */
33 static inline DeviceState *
34 xilinx_ethlite_create(NICInfo *nd, target_phys_addr_t base, qemu_irq irq,
35 int txpingpong, int rxpingpong)
36 {
37 DeviceState *dev;
38
39 qemu_check_nic_model(nd, "xilinx-ethlite");
40
41 dev = qdev_create(NULL, "xilinx,ethlite");
42 qdev_set_nic_properties(dev, nd);
43 qdev_prop_set_uint32(dev, "txpingpong", txpingpong);
44 qdev_prop_set_uint32(dev, "rxpingpong", rxpingpong);
45 qdev_init_nofail(dev);
46 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
47 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
48 return dev;
49 }
50
51 static inline DeviceState *
52 xilinx_axiethernet_create(void *dmach,
53 NICInfo *nd, target_phys_addr_t base, qemu_irq irq,
54 int txmem, int rxmem)
55 {
56 DeviceState *dev;
57 qemu_check_nic_model(nd, "xilinx-axienet");
58
59 dev = qdev_create(NULL, "xilinx,axienet");
60 qdev_set_nic_properties(dev, nd);
61 qdev_prop_set_uint32(dev, "c_rxmem", rxmem);
62 qdev_prop_set_uint32(dev, "c_txmem", txmem);
63 qdev_prop_set_ptr(dev, "dmach", dmach);
64 qdev_init_nofail(dev);
65 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
66 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
67
68 return dev;
69 }
70
71 static inline DeviceState *
72 xilinx_axiethernetdma_create(void *dmach,
73 target_phys_addr_t base, qemu_irq irq,
74 qemu_irq irq2, int freqhz)
75 {
76 DeviceState *dev = NULL;
77
78 dev = qdev_create(NULL, "xilinx,axidma");
79 qdev_prop_set_uint32(dev, "freqhz", freqhz);
80 qdev_prop_set_ptr(dev, "dmach", dmach);
81 qdev_init_nofail(dev);
82
83 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
84 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq2);
85 sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq);
86
87 return dev;
88 }