ppc/pnv: Add support for POWER8+ LPC Controller
[qemu.git] / include / elf.h
1 #ifndef QEMU_ELF_H
2 #define QEMU_ELF_H
3
4 /* 32-bit ELF base types. */
5 typedef uint32_t Elf32_Addr;
6 typedef uint16_t Elf32_Half;
7 typedef uint32_t Elf32_Off;
8 typedef int32_t Elf32_Sword;
9 typedef uint32_t Elf32_Word;
10
11 /* 64-bit ELF base types. */
12 typedef uint64_t Elf64_Addr;
13 typedef uint16_t Elf64_Half;
14 typedef int16_t Elf64_SHalf;
15 typedef uint64_t Elf64_Off;
16 typedef int32_t Elf64_Sword;
17 typedef uint32_t Elf64_Word;
18 typedef uint64_t Elf64_Xword;
19 typedef int64_t Elf64_Sxword;
20
21 /* These constants are for the segment types stored in the image headers */
22 #define PT_NULL 0
23 #define PT_LOAD 1
24 #define PT_DYNAMIC 2
25 #define PT_INTERP 3
26 #define PT_NOTE 4
27 #define PT_SHLIB 5
28 #define PT_PHDR 6
29 #define PT_LOPROC 0x70000000
30 #define PT_HIPROC 0x7fffffff
31 #define PT_MIPS_REGINFO 0x70000000
32 #define PT_MIPS_OPTIONS 0x70000001
33
34 /* Flags in the e_flags field of the header */
35 /* MIPS architecture level. */
36 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
37 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
38 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
39 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
40 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
41 #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
42 #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
43
44 /* The ABI of a file. */
45 #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
46 #define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
47
48 #define EF_MIPS_NOREORDER 0x00000001
49 #define EF_MIPS_PIC 0x00000002
50 #define EF_MIPS_CPIC 0x00000004
51 #define EF_MIPS_ABI2 0x00000020
52 #define EF_MIPS_OPTIONS_FIRST 0x00000080
53 #define EF_MIPS_32BITMODE 0x00000100
54 #define EF_MIPS_ABI 0x0000f000
55 #define EF_MIPS_FP64 0x00000200
56 #define EF_MIPS_NAN2008 0x00000400
57 #define EF_MIPS_ARCH 0xf0000000
58
59 /* These constants define the different elf file types */
60 #define ET_NONE 0
61 #define ET_REL 1
62 #define ET_EXEC 2
63 #define ET_DYN 3
64 #define ET_CORE 4
65 #define ET_LOPROC 0xff00
66 #define ET_HIPROC 0xffff
67
68 /* These constants define the various ELF target machines */
69 #define EM_NONE 0
70 #define EM_M32 1
71 #define EM_SPARC 2
72 #define EM_386 3
73 #define EM_68K 4
74 #define EM_88K 5
75 #define EM_486 6 /* Perhaps disused */
76 #define EM_860 7
77
78 #define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
79
80 #define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */
81
82 #define EM_PARISC 15 /* HPPA */
83
84 #define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
85
86 #define EM_PPC 20 /* PowerPC */
87 #define EM_PPC64 21 /* PowerPC64 */
88
89 #define EM_ARM 40 /* ARM */
90
91 #define EM_SH 42 /* SuperH */
92
93 #define EM_SPARCV9 43 /* SPARC v9 64-bit */
94
95 #define EM_TRICORE 44 /* Infineon TriCore */
96
97 #define EM_IA_64 50 /* HP/Intel IA-64 */
98
99 #define EM_X86_64 62 /* AMD x86-64 */
100
101 #define EM_S390 22 /* IBM S/390 */
102
103 #define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
104
105 #define EM_V850 87 /* NEC v850 */
106
107 #define EM_H8_300H 47 /* Hitachi H8/300H */
108 #define EM_H8S 48 /* Hitachi H8S */
109 #define EM_LATTICEMICO32 138 /* LatticeMico32 */
110
111 #define EM_OPENRISC 92 /* OpenCores OpenRISC */
112
113 #define EM_UNICORE32 110 /* UniCore32 */
114
115 /*
116 * This is an interim value that we will use until the committee comes
117 * up with a final number.
118 */
119 #define EM_ALPHA 0x9026
120
121 /* Bogus old v850 magic number, used by old tools. */
122 #define EM_CYGNUS_V850 0x9080
123
124 /*
125 * This is the old interim value for S/390 architecture
126 */
127 #define EM_S390_OLD 0xA390
128
129 #define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
130
131 #define EM_MICROBLAZE 189
132 #define EM_MICROBLAZE_OLD 0xBAAB
133
134 #define EM_XTENSA 94 /* Tensilica Xtensa */
135
136 #define EM_AARCH64 183
137
138 #define EM_TILEGX 191 /* TILE-Gx */
139
140 #define EM_MOXIE 223 /* Moxie processor family */
141 #define EM_MOXIE_OLD 0xFEED
142
143 /* This is the info that is needed to parse the dynamic section of the file */
144 #define DT_NULL 0
145 #define DT_NEEDED 1
146 #define DT_PLTRELSZ 2
147 #define DT_PLTGOT 3
148 #define DT_HASH 4
149 #define DT_STRTAB 5
150 #define DT_SYMTAB 6
151 #define DT_RELA 7
152 #define DT_RELASZ 8
153 #define DT_RELAENT 9
154 #define DT_STRSZ 10
155 #define DT_SYMENT 11
156 #define DT_INIT 12
157 #define DT_FINI 13
158 #define DT_SONAME 14
159 #define DT_RPATH 15
160 #define DT_SYMBOLIC 16
161 #define DT_REL 17
162 #define DT_RELSZ 18
163 #define DT_RELENT 19
164 #define DT_PLTREL 20
165 #define DT_DEBUG 21
166 #define DT_TEXTREL 22
167 #define DT_JMPREL 23
168 #define DT_BINDNOW 24
169 #define DT_INIT_ARRAY 25
170 #define DT_FINI_ARRAY 26
171 #define DT_INIT_ARRAYSZ 27
172 #define DT_FINI_ARRAYSZ 28
173 #define DT_RUNPATH 29
174 #define DT_FLAGS 30
175 #define DT_LOOS 0x6000000d
176 #define DT_HIOS 0x6ffff000
177 #define DT_LOPROC 0x70000000
178 #define DT_HIPROC 0x7fffffff
179
180 /* DT_ entries which fall between DT_VALRNGLO and DT_VALRNDHI use
181 the d_val field of the Elf*_Dyn structure. I.e. they contain scalars. */
182 #define DT_VALRNGLO 0x6ffffd00
183 #define DT_VALRNGHI 0x6ffffdff
184
185 /* DT_ entries which fall between DT_ADDRRNGLO and DT_ADDRRNGHI use
186 the d_ptr field of the Elf*_Dyn structure. I.e. they contain pointers. */
187 #define DT_ADDRRNGLO 0x6ffffe00
188 #define DT_ADDRRNGHI 0x6ffffeff
189
190 #define DT_VERSYM 0x6ffffff0
191 #define DT_RELACOUNT 0x6ffffff9
192 #define DT_RELCOUNT 0x6ffffffa
193 #define DT_FLAGS_1 0x6ffffffb
194 #define DT_VERDEF 0x6ffffffc
195 #define DT_VERDEFNUM 0x6ffffffd
196 #define DT_VERNEED 0x6ffffffe
197 #define DT_VERNEEDNUM 0x6fffffff
198
199 #define DT_MIPS_RLD_VERSION 0x70000001
200 #define DT_MIPS_TIME_STAMP 0x70000002
201 #define DT_MIPS_ICHECKSUM 0x70000003
202 #define DT_MIPS_IVERSION 0x70000004
203 #define DT_MIPS_FLAGS 0x70000005
204 #define RHF_NONE 0
205 #define RHF_HARDWAY 1
206 #define RHF_NOTPOT 2
207 #define DT_MIPS_BASE_ADDRESS 0x70000006
208 #define DT_MIPS_CONFLICT 0x70000008
209 #define DT_MIPS_LIBLIST 0x70000009
210 #define DT_MIPS_LOCAL_GOTNO 0x7000000a
211 #define DT_MIPS_CONFLICTNO 0x7000000b
212 #define DT_MIPS_LIBLISTNO 0x70000010
213 #define DT_MIPS_SYMTABNO 0x70000011
214 #define DT_MIPS_UNREFEXTNO 0x70000012
215 #define DT_MIPS_GOTSYM 0x70000013
216 #define DT_MIPS_HIPAGENO 0x70000014
217 #define DT_MIPS_RLD_MAP 0x70000016
218
219 /* This info is needed when parsing the symbol table */
220 #define STB_LOCAL 0
221 #define STB_GLOBAL 1
222 #define STB_WEAK 2
223
224 #define STT_NOTYPE 0
225 #define STT_OBJECT 1
226 #define STT_FUNC 2
227 #define STT_SECTION 3
228 #define STT_FILE 4
229
230 #define ELF_ST_BIND(x) ((x) >> 4)
231 #define ELF_ST_TYPE(x) (((unsigned int) x) & 0xf)
232 #define ELF_ST_INFO(bind, type) (((bind) << 4) | ((type) & 0xf))
233 #define ELF32_ST_BIND(x) ELF_ST_BIND(x)
234 #define ELF32_ST_TYPE(x) ELF_ST_TYPE(x)
235 #define ELF64_ST_BIND(x) ELF_ST_BIND(x)
236 #define ELF64_ST_TYPE(x) ELF_ST_TYPE(x)
237
238 /* Symbolic values for the entries in the auxiliary table
239 put on the initial stack */
240 #define AT_NULL 0 /* end of vector */
241 #define AT_IGNORE 1 /* entry should be ignored */
242 #define AT_EXECFD 2 /* file descriptor of program */
243 #define AT_PHDR 3 /* program headers for program */
244 #define AT_PHENT 4 /* size of program header entry */
245 #define AT_PHNUM 5 /* number of program headers */
246 #define AT_PAGESZ 6 /* system page size */
247 #define AT_BASE 7 /* base address of interpreter */
248 #define AT_FLAGS 8 /* flags */
249 #define AT_ENTRY 9 /* entry point of program */
250 #define AT_NOTELF 10 /* program is not ELF */
251 #define AT_UID 11 /* real uid */
252 #define AT_EUID 12 /* effective uid */
253 #define AT_GID 13 /* real gid */
254 #define AT_EGID 14 /* effective gid */
255 #define AT_PLATFORM 15 /* string identifying CPU for optimizations */
256 #define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */
257 #define AT_CLKTCK 17 /* frequency at which times() increments */
258 #define AT_FPUCW 18 /* info about fpu initialization by kernel */
259 #define AT_DCACHEBSIZE 19 /* data cache block size */
260 #define AT_ICACHEBSIZE 20 /* instruction cache block size */
261 #define AT_UCACHEBSIZE 21 /* unified cache block size */
262 #define AT_IGNOREPPC 22 /* ppc only; entry should be ignored */
263 #define AT_SECURE 23 /* boolean, was exec suid-like? */
264 #define AT_BASE_PLATFORM 24 /* string identifying real platforms */
265 #define AT_RANDOM 25 /* address of 16 random bytes */
266 #define AT_HWCAP2 26 /* extension of AT_HWCAP */
267 #define AT_EXECFN 31 /* filename of the executable */
268 #define AT_SYSINFO 32 /* address of kernel entry point */
269 #define AT_SYSINFO_EHDR 33 /* address of kernel vdso */
270 #define AT_L1I_CACHESHAPE 34 /* shapes of the caches: */
271 #define AT_L1D_CACHESHAPE 35 /* bits 0-3: cache associativity. */
272 #define AT_L2_CACHESHAPE 36 /* bits 4-7: log2 of line size. */
273 #define AT_L3_CACHESHAPE 37 /* val&~255: cache size. */
274
275 typedef struct dynamic{
276 Elf32_Sword d_tag;
277 union{
278 Elf32_Sword d_val;
279 Elf32_Addr d_ptr;
280 } d_un;
281 } Elf32_Dyn;
282
283 typedef struct {
284 Elf64_Sxword d_tag; /* entry tag value */
285 union {
286 Elf64_Xword d_val;
287 Elf64_Addr d_ptr;
288 } d_un;
289 } Elf64_Dyn;
290
291 /* The following are used with relocations */
292 #define ELF32_R_SYM(x) ((x) >> 8)
293 #define ELF32_R_TYPE(x) ((x) & 0xff)
294
295 #define ELF64_R_SYM(i) ((i) >> 32)
296 #define ELF64_R_TYPE(i) ((i) & 0xffffffff)
297 #define ELF64_R_TYPE_DATA(i) (((ELF64_R_TYPE(i) >> 8) ^ 0x00800000) - 0x00800000)
298
299 #define R_386_NONE 0
300 #define R_386_32 1
301 #define R_386_PC32 2
302 #define R_386_GOT32 3
303 #define R_386_PLT32 4
304 #define R_386_COPY 5
305 #define R_386_GLOB_DAT 6
306 #define R_386_JMP_SLOT 7
307 #define R_386_RELATIVE 8
308 #define R_386_GOTOFF 9
309 #define R_386_GOTPC 10
310 #define R_386_NUM 11
311 /* Not a dynamic reloc, so not included in R_386_NUM. Used in TCG. */
312 #define R_386_PC8 23
313
314 #define R_MIPS_NONE 0
315 #define R_MIPS_16 1
316 #define R_MIPS_32 2
317 #define R_MIPS_REL32 3
318 #define R_MIPS_26 4
319 #define R_MIPS_HI16 5
320 #define R_MIPS_LO16 6
321 #define R_MIPS_GPREL16 7
322 #define R_MIPS_LITERAL 8
323 #define R_MIPS_GOT16 9
324 #define R_MIPS_PC16 10
325 #define R_MIPS_CALL16 11
326 #define R_MIPS_GPREL32 12
327 /* The remaining relocs are defined on Irix, although they are not
328 in the MIPS ELF ABI. */
329 #define R_MIPS_UNUSED1 13
330 #define R_MIPS_UNUSED2 14
331 #define R_MIPS_UNUSED3 15
332 #define R_MIPS_SHIFT5 16
333 #define R_MIPS_SHIFT6 17
334 #define R_MIPS_64 18
335 #define R_MIPS_GOT_DISP 19
336 #define R_MIPS_GOT_PAGE 20
337 #define R_MIPS_GOT_OFST 21
338 /*
339 * The following two relocation types are specified in the MIPS ABI
340 * conformance guide version 1.2 but not yet in the psABI.
341 */
342 #define R_MIPS_GOTHI16 22
343 #define R_MIPS_GOTLO16 23
344 #define R_MIPS_SUB 24
345 #define R_MIPS_INSERT_A 25
346 #define R_MIPS_INSERT_B 26
347 #define R_MIPS_DELETE 27
348 #define R_MIPS_HIGHER 28
349 #define R_MIPS_HIGHEST 29
350 /*
351 * The following two relocation types are specified in the MIPS ABI
352 * conformance guide version 1.2 but not yet in the psABI.
353 */
354 #define R_MIPS_CALLHI16 30
355 #define R_MIPS_CALLLO16 31
356 /*
357 * This range is reserved for vendor specific relocations.
358 */
359 #define R_MIPS_LOVENDOR 100
360 #define R_MIPS_HIVENDOR 127
361
362
363 /* SUN SPARC specific definitions. */
364
365 /* Values for Elf64_Ehdr.e_flags. */
366
367 #define EF_SPARCV9_MM 3
368 #define EF_SPARCV9_TSO 0
369 #define EF_SPARCV9_PSO 1
370 #define EF_SPARCV9_RMO 2
371 #define EF_SPARC_LEDATA 0x800000 /* little endian data */
372 #define EF_SPARC_EXT_MASK 0xFFFF00
373 #define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */
374 #define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */
375 #define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */
376 #define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */
377
378 /*
379 * Sparc ELF relocation types
380 */
381 #define R_SPARC_NONE 0
382 #define R_SPARC_8 1
383 #define R_SPARC_16 2
384 #define R_SPARC_32 3
385 #define R_SPARC_DISP8 4
386 #define R_SPARC_DISP16 5
387 #define R_SPARC_DISP32 6
388 #define R_SPARC_WDISP30 7
389 #define R_SPARC_WDISP22 8
390 #define R_SPARC_HI22 9
391 #define R_SPARC_22 10
392 #define R_SPARC_13 11
393 #define R_SPARC_LO10 12
394 #define R_SPARC_GOT10 13
395 #define R_SPARC_GOT13 14
396 #define R_SPARC_GOT22 15
397 #define R_SPARC_PC10 16
398 #define R_SPARC_PC22 17
399 #define R_SPARC_WPLT30 18
400 #define R_SPARC_COPY 19
401 #define R_SPARC_GLOB_DAT 20
402 #define R_SPARC_JMP_SLOT 21
403 #define R_SPARC_RELATIVE 22
404 #define R_SPARC_UA32 23
405 #define R_SPARC_PLT32 24
406 #define R_SPARC_HIPLT22 25
407 #define R_SPARC_LOPLT10 26
408 #define R_SPARC_PCPLT32 27
409 #define R_SPARC_PCPLT22 28
410 #define R_SPARC_PCPLT10 29
411 #define R_SPARC_10 30
412 #define R_SPARC_11 31
413 #define R_SPARC_64 32
414 #define R_SPARC_OLO10 33
415 #define R_SPARC_HH22 34
416 #define R_SPARC_HM10 35
417 #define R_SPARC_LM22 36
418 #define R_SPARC_WDISP16 40
419 #define R_SPARC_WDISP19 41
420 #define R_SPARC_7 43
421 #define R_SPARC_5 44
422 #define R_SPARC_6 45
423
424 /* Bits present in AT_HWCAP for ARM. */
425
426 #define HWCAP_ARM_SWP (1 << 0)
427 #define HWCAP_ARM_HALF (1 << 1)
428 #define HWCAP_ARM_THUMB (1 << 2)
429 #define HWCAP_ARM_26BIT (1 << 3)
430 #define HWCAP_ARM_FAST_MULT (1 << 4)
431 #define HWCAP_ARM_FPA (1 << 5)
432 #define HWCAP_ARM_VFP (1 << 6)
433 #define HWCAP_ARM_EDSP (1 << 7)
434 #define HWCAP_ARM_JAVA (1 << 8)
435 #define HWCAP_ARM_IWMMXT (1 << 9)
436 #define HWCAP_ARM_CRUNCH (1 << 10)
437 #define HWCAP_ARM_THUMBEE (1 << 11)
438 #define HWCAP_ARM_NEON (1 << 12)
439 #define HWCAP_ARM_VFPv3 (1 << 13)
440 #define HWCAP_ARM_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
441 #define HWCAP_ARM_TLS (1 << 15)
442 #define HWCAP_ARM_VFPv4 (1 << 16)
443 #define HWCAP_ARM_IDIVA (1 << 17)
444 #define HWCAP_ARM_IDIVT (1 << 18)
445 #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
446 #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs */
447 #define HWCAP_LPAE (1 << 20)
448
449 /* Bits present in AT_HWCAP for PowerPC. */
450
451 #define PPC_FEATURE_32 0x80000000
452 #define PPC_FEATURE_64 0x40000000
453 #define PPC_FEATURE_601_INSTR 0x20000000
454 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000
455 #define PPC_FEATURE_HAS_FPU 0x08000000
456 #define PPC_FEATURE_HAS_MMU 0x04000000
457 #define PPC_FEATURE_HAS_4xxMAC 0x02000000
458 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000
459 #define PPC_FEATURE_HAS_SPE 0x00800000
460 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
461 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
462 #define PPC_FEATURE_NO_TB 0x00100000
463 #define PPC_FEATURE_POWER4 0x00080000
464 #define PPC_FEATURE_POWER5 0x00040000
465 #define PPC_FEATURE_POWER5_PLUS 0x00020000
466 #define PPC_FEATURE_CELL 0x00010000
467 #define PPC_FEATURE_BOOKE 0x00008000
468 #define PPC_FEATURE_SMT 0x00004000
469 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000
470 #define PPC_FEATURE_ARCH_2_05 0x00001000
471 #define PPC_FEATURE_PA6T 0x00000800
472 #define PPC_FEATURE_HAS_DFP 0x00000400
473 #define PPC_FEATURE_POWER6_EXT 0x00000200
474 #define PPC_FEATURE_ARCH_2_06 0x00000100
475 #define PPC_FEATURE_HAS_VSX 0x00000080
476
477 #define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
478 0x00000040
479
480 #define PPC_FEATURE_TRUE_LE 0x00000002
481 #define PPC_FEATURE_PPC_LE 0x00000001
482
483 /* Bits present in AT_HWCAP2 for PowerPC. */
484
485 #define PPC_FEATURE2_ARCH_2_07 0x80000000
486 #define PPC_FEATURE2_HAS_HTM 0x40000000
487 #define PPC_FEATURE2_HAS_DSCR 0x20000000
488 #define PPC_FEATURE2_HAS_EBB 0x10000000
489 #define PPC_FEATURE2_HAS_ISEL 0x08000000
490 #define PPC_FEATURE2_HAS_TAR 0x04000000
491 #define PPC_FEATURE2_HAS_VEC_CRYPTO 0x02000000
492 #define PPC_FEATURE2_HTM_NOSC 0x01000000
493 #define PPC_FEATURE2_ARCH_3_00 0x00800000
494 #define PPC_FEATURE2_HAS_IEEE128 0x00400000
495
496 /* Bits present in AT_HWCAP for Sparc. */
497
498 #define HWCAP_SPARC_FLUSH 0x00000001
499 #define HWCAP_SPARC_STBAR 0x00000002
500 #define HWCAP_SPARC_SWAP 0x00000004
501 #define HWCAP_SPARC_MULDIV 0x00000008
502 #define HWCAP_SPARC_V9 0x00000010
503 #define HWCAP_SPARC_ULTRA3 0x00000020
504 #define HWCAP_SPARC_BLKINIT 0x00000040
505 #define HWCAP_SPARC_N2 0x00000080
506 #define HWCAP_SPARC_MUL32 0x00000100
507 #define HWCAP_SPARC_DIV32 0x00000200
508 #define HWCAP_SPARC_FSMULD 0x00000400
509 #define HWCAP_SPARC_V8PLUS 0x00000800
510 #define HWCAP_SPARC_POPC 0x00001000
511 #define HWCAP_SPARC_VIS 0x00002000
512 #define HWCAP_SPARC_VIS2 0x00004000
513 #define HWCAP_SPARC_ASI_BLK_INIT 0x00008000
514 #define HWCAP_SPARC_FMAF 0x00010000
515 #define HWCAP_SPARC_VIS3 0x00020000
516 #define HWCAP_SPARC_HPC 0x00040000
517 #define HWCAP_SPARC_RANDOM 0x00080000
518 #define HWCAP_SPARC_TRANS 0x00100000
519 #define HWCAP_SPARC_FJFMAU 0x00200000
520 #define HWCAP_SPARC_IMA 0x00400000
521 #define HWCAP_SPARC_ASI_CACHE_SPARING 0x00800000
522 #define HWCAP_SPARC_PAUSE 0x01000000
523 #define HWCAP_SPARC_CBCOND 0x02000000
524 #define HWCAP_SPARC_CRYPTO 0x04000000
525
526 /* Bits present in AT_HWCAP for s390. */
527
528 #define HWCAP_S390_ESAN3 1
529 #define HWCAP_S390_ZARCH 2
530 #define HWCAP_S390_STFLE 4
531 #define HWCAP_S390_MSA 8
532 #define HWCAP_S390_LDISP 16
533 #define HWCAP_S390_EIMM 32
534 #define HWCAP_S390_DFP 64
535 #define HWCAP_S390_HPAGE 128
536 #define HWCAP_S390_ETF3EH 256
537 #define HWCAP_S390_HIGH_GPRS 512
538 #define HWCAP_S390_TE 1024
539
540 /*
541 * 68k ELF relocation types
542 */
543 #define R_68K_NONE 0
544 #define R_68K_32 1
545 #define R_68K_16 2
546 #define R_68K_8 3
547 #define R_68K_PC32 4
548 #define R_68K_PC16 5
549 #define R_68K_PC8 6
550 #define R_68K_GOT32 7
551 #define R_68K_GOT16 8
552 #define R_68K_GOT8 9
553 #define R_68K_GOT32O 10
554 #define R_68K_GOT16O 11
555 #define R_68K_GOT8O 12
556 #define R_68K_PLT32 13
557 #define R_68K_PLT16 14
558 #define R_68K_PLT8 15
559 #define R_68K_PLT32O 16
560 #define R_68K_PLT16O 17
561 #define R_68K_PLT8O 18
562 #define R_68K_COPY 19
563 #define R_68K_GLOB_DAT 20
564 #define R_68K_JMP_SLOT 21
565 #define R_68K_RELATIVE 22
566
567 /*
568 * Alpha ELF relocation types
569 */
570 #define R_ALPHA_NONE 0 /* No reloc */
571 #define R_ALPHA_REFLONG 1 /* Direct 32 bit */
572 #define R_ALPHA_REFQUAD 2 /* Direct 64 bit */
573 #define R_ALPHA_GPREL32 3 /* GP relative 32 bit */
574 #define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */
575 #define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */
576 #define R_ALPHA_GPDISP 6 /* Add displacement to GP */
577 #define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */
578 #define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */
579 #define R_ALPHA_SREL16 9 /* PC relative 16 bit */
580 #define R_ALPHA_SREL32 10 /* PC relative 32 bit */
581 #define R_ALPHA_SREL64 11 /* PC relative 64 bit */
582 #define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */
583 #define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */
584 #define R_ALPHA_GPREL16 19 /* GP relative 16 bit */
585 #define R_ALPHA_COPY 24 /* Copy symbol at runtime */
586 #define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */
587 #define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */
588 #define R_ALPHA_RELATIVE 27 /* Adjust by program base */
589 #define R_ALPHA_BRSGP 28
590 #define R_ALPHA_TLSGD 29
591 #define R_ALPHA_TLS_LDM 30
592 #define R_ALPHA_DTPMOD64 31
593 #define R_ALPHA_GOTDTPREL 32
594 #define R_ALPHA_DTPREL64 33
595 #define R_ALPHA_DTPRELHI 34
596 #define R_ALPHA_DTPRELLO 35
597 #define R_ALPHA_DTPREL16 36
598 #define R_ALPHA_GOTTPREL 37
599 #define R_ALPHA_TPREL64 38
600 #define R_ALPHA_TPRELHI 39
601 #define R_ALPHA_TPRELLO 40
602 #define R_ALPHA_TPREL16 41
603
604 #define SHF_ALPHA_GPREL 0x10000000
605
606
607 /* PowerPC specific definitions. */
608
609 /* Processor specific flags for the ELF header e_flags field. */
610 #define EF_PPC64_ABI 0x3
611
612 /* PowerPC relocations defined by the ABIs */
613 #define R_PPC_NONE 0
614 #define R_PPC_ADDR32 1 /* 32bit absolute address */
615 #define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
616 #define R_PPC_ADDR16 3 /* 16bit absolute address */
617 #define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
618 #define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
619 #define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
620 #define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
621 #define R_PPC_ADDR14_BRTAKEN 8
622 #define R_PPC_ADDR14_BRNTAKEN 9
623 #define R_PPC_REL24 10 /* PC relative 26 bit */
624 #define R_PPC_REL14 11 /* PC relative 16 bit */
625 #define R_PPC_REL14_BRTAKEN 12
626 #define R_PPC_REL14_BRNTAKEN 13
627 #define R_PPC_GOT16 14
628 #define R_PPC_GOT16_LO 15
629 #define R_PPC_GOT16_HI 16
630 #define R_PPC_GOT16_HA 17
631 #define R_PPC_PLTREL24 18
632 #define R_PPC_COPY 19
633 #define R_PPC_GLOB_DAT 20
634 #define R_PPC_JMP_SLOT 21
635 #define R_PPC_RELATIVE 22
636 #define R_PPC_LOCAL24PC 23
637 #define R_PPC_UADDR32 24
638 #define R_PPC_UADDR16 25
639 #define R_PPC_REL32 26
640 #define R_PPC_PLT32 27
641 #define R_PPC_PLTREL32 28
642 #define R_PPC_PLT16_LO 29
643 #define R_PPC_PLT16_HI 30
644 #define R_PPC_PLT16_HA 31
645 #define R_PPC_SDAREL16 32
646 #define R_PPC_SECTOFF 33
647 #define R_PPC_SECTOFF_LO 34
648 #define R_PPC_SECTOFF_HI 35
649 #define R_PPC_SECTOFF_HA 36
650 /* Keep this the last entry. */
651 #ifndef R_PPC_NUM
652 #define R_PPC_NUM 37
653 #endif
654
655 /* ARM specific declarations */
656
657 /* Processor specific flags for the ELF header e_flags field. */
658 #define EF_ARM_RELEXEC 0x01
659 #define EF_ARM_HASENTRY 0x02
660 #define EF_ARM_INTERWORK 0x04
661 #define EF_ARM_APCS_26 0x08
662 #define EF_ARM_APCS_FLOAT 0x10
663 #define EF_ARM_PIC 0x20
664 #define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */
665 #define EF_NEW_ABI 0x80
666 #define EF_OLD_ABI 0x100
667 #define EF_ARM_SOFT_FLOAT 0x200
668 #define EF_ARM_VFP_FLOAT 0x400
669 #define EF_ARM_MAVERICK_FLOAT 0x800
670
671 /* Other constants defined in the ARM ELF spec. version B-01. */
672 #define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK */
673 #define EF_ARM_DYNSYMSUSESEGIDX 0x08 /* NB conflicts with EF_APCS26 */
674 #define EF_ARM_MAPSYMSFIRST 0x10 /* NB conflicts with EF_APCS_FLOAT */
675 #define EF_ARM_EABIMASK 0xFF000000
676
677 /* Constants defined in AAELF. */
678 #define EF_ARM_BE8 0x00800000
679 #define EF_ARM_LE8 0x00400000
680
681 #define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK)
682 #define EF_ARM_EABI_UNKNOWN 0x00000000
683 #define EF_ARM_EABI_VER1 0x01000000
684 #define EF_ARM_EABI_VER2 0x02000000
685 #define EF_ARM_EABI_VER3 0x03000000
686 #define EF_ARM_EABI_VER4 0x04000000
687 #define EF_ARM_EABI_VER5 0x05000000
688
689 /* Additional symbol types for Thumb */
690 #define STT_ARM_TFUNC 0xd
691
692 /* ARM-specific values for sh_flags */
693 #define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */
694 #define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined
695 in the input to a link step */
696
697 /* ARM-specific program header flags */
698 #define PF_ARM_SB 0x10000000 /* Segment contains the location
699 addressed by the static base */
700
701 /* ARM relocs. */
702 #define R_ARM_NONE 0 /* No reloc */
703 #define R_ARM_PC24 1 /* PC relative 26 bit branch */
704 #define R_ARM_ABS32 2 /* Direct 32 bit */
705 #define R_ARM_REL32 3 /* PC relative 32 bit */
706 #define R_ARM_PC13 4
707 #define R_ARM_ABS16 5 /* Direct 16 bit */
708 #define R_ARM_ABS12 6 /* Direct 12 bit */
709 #define R_ARM_THM_ABS5 7
710 #define R_ARM_ABS8 8 /* Direct 8 bit */
711 #define R_ARM_SBREL32 9
712 #define R_ARM_THM_PC22 10
713 #define R_ARM_THM_PC8 11
714 #define R_ARM_AMP_VCALL9 12
715 #define R_ARM_SWI24 13
716 #define R_ARM_THM_SWI8 14
717 #define R_ARM_XPC25 15
718 #define R_ARM_THM_XPC22 16
719 #define R_ARM_COPY 20 /* Copy symbol at runtime */
720 #define R_ARM_GLOB_DAT 21 /* Create GOT entry */
721 #define R_ARM_JUMP_SLOT 22 /* Create PLT entry */
722 #define R_ARM_RELATIVE 23 /* Adjust by program base */
723 #define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */
724 #define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
725 #define R_ARM_GOT32 26 /* 32 bit GOT entry */
726 #define R_ARM_PLT32 27 /* 32 bit PLT address */
727 #define R_ARM_CALL 28
728 #define R_ARM_JUMP24 29
729 #define R_ARM_GNU_VTENTRY 100
730 #define R_ARM_GNU_VTINHERIT 101
731 #define R_ARM_THM_PC11 102 /* thumb unconditional branch */
732 #define R_ARM_THM_PC9 103 /* thumb conditional branch */
733 #define R_ARM_RXPC25 249
734 #define R_ARM_RSBREL32 250
735 #define R_ARM_THM_RPC22 251
736 #define R_ARM_RREL32 252
737 #define R_ARM_RABS22 253
738 #define R_ARM_RPC24 254
739 #define R_ARM_RBASE 255
740 /* Keep this the last entry. */
741 #define R_ARM_NUM 256
742
743 /* ARM Aarch64 relocation types */
744 #define R_AARCH64_NONE 256 /* also accepts R_ARM_NONE (0) */
745 /* static data relocations */
746 #define R_AARCH64_ABS64 257
747 #define R_AARCH64_ABS32 258
748 #define R_AARCH64_ABS16 259
749 #define R_AARCH64_PREL64 260
750 #define R_AARCH64_PREL32 261
751 #define R_AARCH64_PREL16 262
752 /* static aarch64 group relocations */
753 /* group relocs to create unsigned data value or address inline */
754 #define R_AARCH64_MOVW_UABS_G0 263
755 #define R_AARCH64_MOVW_UABS_G0_NC 264
756 #define R_AARCH64_MOVW_UABS_G1 265
757 #define R_AARCH64_MOVW_UABS_G1_NC 266
758 #define R_AARCH64_MOVW_UABS_G2 267
759 #define R_AARCH64_MOVW_UABS_G2_NC 268
760 #define R_AARCH64_MOVW_UABS_G3 269
761 /* group relocs to create signed data or offset value inline */
762 #define R_AARCH64_MOVW_SABS_G0 270
763 #define R_AARCH64_MOVW_SABS_G1 271
764 #define R_AARCH64_MOVW_SABS_G2 272
765 /* relocs to generate 19, 21, and 33 bit PC-relative addresses */
766 #define R_AARCH64_LD_PREL_LO19 273
767 #define R_AARCH64_ADR_PREL_LO21 274
768 #define R_AARCH64_ADR_PREL_PG_HI21 275
769 #define R_AARCH64_ADR_PREL_PG_HI21_NC 276
770 #define R_AARCH64_ADD_ABS_LO12_NC 277
771 #define R_AARCH64_LDST8_ABS_LO12_NC 278
772 #define R_AARCH64_LDST16_ABS_LO12_NC 284
773 #define R_AARCH64_LDST32_ABS_LO12_NC 285
774 #define R_AARCH64_LDST64_ABS_LO12_NC 286
775 #define R_AARCH64_LDST128_ABS_LO12_NC 299
776 /* relocs for control-flow - all offsets as multiple of 4 */
777 #define R_AARCH64_TSTBR14 279
778 #define R_AARCH64_CONDBR19 280
779 #define R_AARCH64_JUMP26 282
780 #define R_AARCH64_CALL26 283
781 /* group relocs to create pc-relative offset inline */
782 #define R_AARCH64_MOVW_PREL_G0 287
783 #define R_AARCH64_MOVW_PREL_G0_NC 288
784 #define R_AARCH64_MOVW_PREL_G1 289
785 #define R_AARCH64_MOVW_PREL_G1_NC 290
786 #define R_AARCH64_MOVW_PREL_G2 291
787 #define R_AARCH64_MOVW_PREL_G2_NC 292
788 #define R_AARCH64_MOVW_PREL_G3 293
789 /* group relocs to create a GOT-relative offset inline */
790 #define R_AARCH64_MOVW_GOTOFF_G0 300
791 #define R_AARCH64_MOVW_GOTOFF_G0_NC 301
792 #define R_AARCH64_MOVW_GOTOFF_G1 302
793 #define R_AARCH64_MOVW_GOTOFF_G1_NC 303
794 #define R_AARCH64_MOVW_GOTOFF_G2 304
795 #define R_AARCH64_MOVW_GOTOFF_G2_NC 305
796 #define R_AARCH64_MOVW_GOTOFF_G3 306
797 /* GOT-relative data relocs */
798 #define R_AARCH64_GOTREL64 307
799 #define R_AARCH64_GOTREL32 308
800 /* GOT-relative instr relocs */
801 #define R_AARCH64_GOT_LD_PREL19 309
802 #define R_AARCH64_LD64_GOTOFF_LO15 310
803 #define R_AARCH64_ADR_GOT_PAGE 311
804 #define R_AARCH64_LD64_GOT_LO12_NC 312
805 #define R_AARCH64_LD64_GOTPAGE_LO15 313
806 /* General Dynamic TLS relocations */
807 #define R_AARCH64_TLSGD_ADR_PREL21 512
808 #define R_AARCH64_TLSGD_ADR_PAGE21 513
809 #define R_AARCH64_TLSGD_ADD_LO12_NC 514
810 #define R_AARCH64_TLSGD_MOVW_G1 515
811 #define R_AARCH64_TLSGD_MOVW_G0_NC 516
812 /* Local Dynamic TLS relocations */
813 #define R_AARCH64_TLSLD_ADR_PREL21 517
814 #define R_AARCH64_TLSLD_ADR_PAGE21 518
815 #define R_AARCH64_TLSLD_ADD_LO12_NC 519
816 #define R_AARCH64_TLSLD_MOVW_G1 520
817 #define R_AARCH64_TLSLD_MOVW_G0_NC 521
818 #define R_AARCH64_TLSLD_LD_PREL19 522
819 #define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523
820 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524
821 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525
822 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526
823 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527
824 #define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528
825 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529
826 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530
827 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531
828 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532
829 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533
830 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534
831 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535
832 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536
833 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537
834 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538
835 /* initial exec TLS relocations */
836 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539
837 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540
838 #define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541
839 #define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542
840 #define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543
841 /* local exec TLS relocations */
842 #define R_AARCH64_TLSLE_MOVW_TPREL_G2 544
843 #define R_AARCH64_TLSLE_MOVW_TPREL_G1 545
844 #define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546
845 #define R_AARCH64_TLSLE_MOVW_TPREL_G0 547
846 #define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548
847 #define R_AARCH64_TLSLE_ADD_TPREL_HI12 549
848 #define R_AARCH64_TLSLE_ADD_TPREL_LO12 550
849 #define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551
850 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552
851 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553
852 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554
853 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555
854 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556
855 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557
856 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558
857 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559
858 /* Dynamic Relocations */
859 #define R_AARCH64_COPY 1024
860 #define R_AARCH64_GLOB_DAT 1025
861 #define R_AARCH64_JUMP_SLOT 1026
862 #define R_AARCH64_RELATIVE 1027
863 #define R_AARCH64_TLS_DTPREL64 1028
864 #define R_AARCH64_TLS_DTPMOD64 1029
865 #define R_AARCH64_TLS_TPREL64 1030
866 #define R_AARCH64_TLS_DTPREL32 1031
867 #define R_AARCH64_TLS_DTPMOD32 1032
868 #define R_AARCH64_TLS_TPREL32 1033
869
870 /* s390 relocations defined by the ABIs */
871 #define R_390_NONE 0 /* No reloc. */
872 #define R_390_8 1 /* Direct 8 bit. */
873 #define R_390_12 2 /* Direct 12 bit. */
874 #define R_390_16 3 /* Direct 16 bit. */
875 #define R_390_32 4 /* Direct 32 bit. */
876 #define R_390_PC32 5 /* PC relative 32 bit. */
877 #define R_390_GOT12 6 /* 12 bit GOT offset. */
878 #define R_390_GOT32 7 /* 32 bit GOT offset. */
879 #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
880 #define R_390_COPY 9 /* Copy symbol at runtime. */
881 #define R_390_GLOB_DAT 10 /* Create GOT entry. */
882 #define R_390_JMP_SLOT 11 /* Create PLT entry. */
883 #define R_390_RELATIVE 12 /* Adjust by program base. */
884 #define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
885 #define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */
886 #define R_390_GOT16 15 /* 16 bit GOT offset. */
887 #define R_390_PC16 16 /* PC relative 16 bit. */
888 #define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */
889 #define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */
890 #define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */
891 #define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */
892 #define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */
893 #define R_390_64 22 /* Direct 64 bit. */
894 #define R_390_PC64 23 /* PC relative 64 bit. */
895 #define R_390_GOT64 24 /* 64 bit GOT offset. */
896 #define R_390_PLT64 25 /* 64 bit PC relative PLT address. */
897 #define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */
898 #define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */
899 #define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */
900 #define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */
901 #define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */
902 #define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */
903 #define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */
904 #define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */
905 #define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */
906 #define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */
907 #define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */
908 #define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */
909 #define R_390_TLS_GDCALL 38 /* Tag for function call in general
910 dynamic TLS code. */
911 #define R_390_TLS_LDCALL 39 /* Tag for function call in local
912 dynamic TLS code. */
913 #define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic
914 thread local data. */
915 #define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic
916 thread local data. */
917 #define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS
918 block offset. */
919 #define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS
920 block offset. */
921 #define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS
922 block offset. */
923 #define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic
924 thread local data in LD code. */
925 #define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic
926 thread local data in LD code. */
927 #define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for
928 negated static TLS block offset. */
929 #define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for
930 negated static TLS block offset. */
931 #define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for
932 negated static TLS block offset. */
933 #define R_390_TLS_LE32 50 /* 32 bit negated offset relative to
934 static TLS block. */
935 #define R_390_TLS_LE64 51 /* 64 bit negated offset relative to
936 static TLS block. */
937 #define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS
938 block. */
939 #define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS
940 block. */
941 #define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */
942 #define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */
943 #define R_390_TLS_TPOFF 56 /* Negate offset in static TLS
944 block. */
945 /* Keep this the last entry. */
946 #define R_390_NUM 57
947
948 /* x86-64 relocation types */
949 #define R_X86_64_NONE 0 /* No reloc */
950 #define R_X86_64_64 1 /* Direct 64 bit */
951 #define R_X86_64_PC32 2 /* PC relative 32 bit signed */
952 #define R_X86_64_GOT32 3 /* 32 bit GOT entry */
953 #define R_X86_64_PLT32 4 /* 32 bit PLT address */
954 #define R_X86_64_COPY 5 /* Copy symbol at runtime */
955 #define R_X86_64_GLOB_DAT 6 /* Create GOT entry */
956 #define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */
957 #define R_X86_64_RELATIVE 8 /* Adjust by program base */
958 #define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative
959 offset to GOT */
960 #define R_X86_64_32 10 /* Direct 32 bit zero extended */
961 #define R_X86_64_32S 11 /* Direct 32 bit sign extended */
962 #define R_X86_64_16 12 /* Direct 16 bit zero extended */
963 #define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
964 #define R_X86_64_8 14 /* Direct 8 bit sign extended */
965 #define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
966
967 #define R_X86_64_NUM 16
968
969 /* Legal values for e_flags field of Elf64_Ehdr. */
970
971 #define EF_ALPHA_32BIT 1 /* All addresses are below 2GB */
972
973 /* HPPA specific definitions. */
974
975 /* Legal values for e_flags field of Elf32_Ehdr. */
976
977 #define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
978 #define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
979 #define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
980 #define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
981 #define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
982 prediction. */
983 #define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
984 #define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
985
986 /* Defined values for `e_flags & EF_PARISC_ARCH' are: */
987
988 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
989 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
990 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
991
992 /* Additional section indeces. */
993
994 #define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
995 symbols in ANSI C. */
996 #define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */
997
998 /* Legal values for sh_type field of Elf32_Shdr. */
999
1000 #define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */
1001 #define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */
1002 #define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */
1003
1004 /* Legal values for sh_flags field of Elf32_Shdr. */
1005
1006 #define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */
1007 #define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */
1008 #define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */
1009
1010 /* Legal values for ST_TYPE subfield of st_info (symbol type). */
1011
1012 #define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */
1013
1014 #define STT_HP_OPAQUE (STT_LOOS + 0x1)
1015 #define STT_HP_STUB (STT_LOOS + 0x2)
1016
1017 /* HPPA relocs. */
1018
1019 #define R_PARISC_NONE 0 /* No reloc. */
1020 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
1021 #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
1022 #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
1023 #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
1024 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
1025 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
1026 #define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
1027 #define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
1028 #define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
1029 #define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
1030 #define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
1031 #define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
1032 #define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
1033 #define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
1034 #define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
1035 #define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
1036 #define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */
1037 #define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */
1038 #define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */
1039 #define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */
1040 #define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
1041 #define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
1042 #define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
1043 #define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
1044 #define R_PARISC_FPTR64 64 /* 64 bits function address. */
1045 #define R_PARISC_PLABEL32 65 /* 32 bits function address. */
1046 #define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
1047 #define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
1048 #define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
1049 #define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
1050 #define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
1051 #define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
1052 #define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
1053 #define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
1054 #define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
1055 #define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */
1056 #define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */
1057 #define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */
1058 #define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */
1059 #define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
1060 #define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
1061 #define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
1062 #define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
1063 #define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
1064 #define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
1065 #define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
1066 #define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
1067 #define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
1068 #define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
1069 #define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
1070 #define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
1071 #define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
1072 #define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
1073 #define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
1074 #define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
1075 #define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
1076 #define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
1077 #define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
1078 #define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
1079 #define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
1080 #define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
1081 #define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
1082 #define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
1083 #define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
1084 #define R_PARISC_LORESERVE 128
1085 #define R_PARISC_COPY 128 /* Copy relocation. */
1086 #define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
1087 #define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
1088 #define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
1089 #define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
1090 #define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
1091 #define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
1092 #define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
1093 #define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
1094 #define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
1095 #define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
1096 #define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
1097 #define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
1098 #define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
1099 #define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
1100 #define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
1101 #define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
1102 #define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
1103 #define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
1104 #define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
1105 #define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
1106 #define R_PARISC_HIRESERVE 255
1107
1108 /* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
1109
1110 #define PT_HP_TLS (PT_LOOS + 0x0)
1111 #define PT_HP_CORE_NONE (PT_LOOS + 0x1)
1112 #define PT_HP_CORE_VERSION (PT_LOOS + 0x2)
1113 #define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
1114 #define PT_HP_CORE_COMM (PT_LOOS + 0x4)
1115 #define PT_HP_CORE_PROC (PT_LOOS + 0x5)
1116 #define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6)
1117 #define PT_HP_CORE_STACK (PT_LOOS + 0x7)
1118 #define PT_HP_CORE_SHM (PT_LOOS + 0x8)
1119 #define PT_HP_CORE_MMF (PT_LOOS + 0x9)
1120 #define PT_HP_PARALLEL (PT_LOOS + 0x10)
1121 #define PT_HP_FASTBIND (PT_LOOS + 0x11)
1122 #define PT_HP_OPT_ANNOT (PT_LOOS + 0x12)
1123 #define PT_HP_HSL_ANNOT (PT_LOOS + 0x13)
1124 #define PT_HP_STACK (PT_LOOS + 0x14)
1125
1126 #define PT_PARISC_ARCHEXT 0x70000000
1127 #define PT_PARISC_UNWIND 0x70000001
1128
1129 /* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
1130
1131 #define PF_PARISC_SBP 0x08000000
1132
1133 #define PF_HP_PAGE_SIZE 0x00100000
1134 #define PF_HP_FAR_SHARED 0x00200000
1135 #define PF_HP_NEAR_SHARED 0x00400000
1136 #define PF_HP_CODE 0x01000000
1137 #define PF_HP_MODIFY 0x02000000
1138 #define PF_HP_LAZYSWAP 0x04000000
1139 #define PF_HP_SBP 0x08000000
1140
1141 /* IA-64 specific declarations. */
1142
1143 /* Processor specific flags for the Ehdr e_flags field. */
1144 #define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */
1145 #define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */
1146 #define EF_IA_64_ARCH 0xff000000 /* arch. version mask */
1147
1148 /* Processor specific values for the Phdr p_type field. */
1149 #define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */
1150 #define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */
1151
1152 /* Processor specific flags for the Phdr p_flags field. */
1153 #define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */
1154
1155 /* Processor specific values for the Shdr sh_type field. */
1156 #define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */
1157 #define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */
1158
1159 /* Processor specific flags for the Shdr sh_flags field. */
1160 #define SHF_IA_64_SHORT 0x10000000 /* section near gp */
1161 #define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */
1162
1163 /* Processor specific values for the Dyn d_tag field. */
1164 #define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0)
1165 #define DT_IA_64_NUM 1
1166
1167 /* IA-64 relocations. */
1168 #define R_IA64_NONE 0x00 /* none */
1169 #define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */
1170 #define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */
1171 #define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */
1172 #define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */
1173 #define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */
1174 #define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */
1175 #define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */
1176 #define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */
1177 #define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */
1178 #define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */
1179 #define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */
1180 #define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */
1181 #define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */
1182 #define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */
1183 #define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */
1184 #define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */
1185 #define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */
1186 #define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */
1187 #define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */
1188 #define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */
1189 #define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */
1190 #define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */
1191 #define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */
1192 #define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */
1193 #define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */
1194 #define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */
1195 #define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */
1196 #define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */
1197 #define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */
1198 #define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */
1199 #define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */
1200 #define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */
1201 #define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */
1202 #define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */
1203 #define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */
1204 #define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */
1205 #define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */
1206 #define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */
1207 #define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */
1208 #define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */
1209 #define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */
1210 #define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */
1211 #define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */
1212 #define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */
1213 #define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */
1214 #define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */
1215 #define R_IA64_REL32MSB 0x6c /* data 4 + REL */
1216 #define R_IA64_REL32LSB 0x6d /* data 4 + REL */
1217 #define R_IA64_REL64MSB 0x6e /* data 8 + REL */
1218 #define R_IA64_REL64LSB 0x6f /* data 8 + REL */
1219 #define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */
1220 #define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */
1221 #define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */
1222 #define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */
1223 #define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */
1224 #define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */
1225 #define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */
1226 #define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */
1227 #define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */
1228 #define R_IA64_COPY 0x84 /* copy relocation */
1229 #define R_IA64_SUB 0x85 /* Addend and symbol difference */
1230 #define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */
1231 #define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */
1232 #define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */
1233 #define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */
1234 #define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */
1235 #define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */
1236 #define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */
1237 #define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */
1238 #define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */
1239 #define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */
1240 #define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */
1241 #define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */
1242 #define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */
1243 #define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */
1244 #define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */
1245 #define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */
1246 #define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */
1247 #define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */
1248 #define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */
1249
1250 typedef struct elf32_rel {
1251 Elf32_Addr r_offset;
1252 Elf32_Word r_info;
1253 } Elf32_Rel;
1254
1255 typedef struct elf64_rel {
1256 Elf64_Addr r_offset; /* Location at which to apply the action */
1257 Elf64_Xword r_info; /* index and type of relocation */
1258 } Elf64_Rel;
1259
1260 typedef struct elf32_rela{
1261 Elf32_Addr r_offset;
1262 Elf32_Word r_info;
1263 Elf32_Sword r_addend;
1264 } Elf32_Rela;
1265
1266 typedef struct elf64_rela {
1267 Elf64_Addr r_offset; /* Location at which to apply the action */
1268 Elf64_Xword r_info; /* index and type of relocation */
1269 Elf64_Sxword r_addend; /* Constant addend used to compute value */
1270 } Elf64_Rela;
1271
1272 typedef struct elf32_sym{
1273 Elf32_Word st_name;
1274 Elf32_Addr st_value;
1275 Elf32_Word st_size;
1276 unsigned char st_info;
1277 unsigned char st_other;
1278 Elf32_Half st_shndx;
1279 } Elf32_Sym;
1280
1281 typedef struct elf64_sym {
1282 Elf64_Word st_name; /* Symbol name, index in string tbl */
1283 unsigned char st_info; /* Type and binding attributes */
1284 unsigned char st_other; /* No defined meaning, 0 */
1285 Elf64_Half st_shndx; /* Associated section index */
1286 Elf64_Addr st_value; /* Value of the symbol */
1287 Elf64_Xword st_size; /* Associated symbol size */
1288 } Elf64_Sym;
1289
1290
1291 #define EI_NIDENT 16
1292
1293 /* Special value for e_phnum. This indicates that the real number of
1294 program headers is too large to fit into e_phnum. Instead the real
1295 value is in the field sh_info of section 0. */
1296 #define PN_XNUM 0xffff
1297
1298 typedef struct elf32_hdr{
1299 unsigned char e_ident[EI_NIDENT];
1300 Elf32_Half e_type;
1301 Elf32_Half e_machine;
1302 Elf32_Word e_version;
1303 Elf32_Addr e_entry; /* Entry point */
1304 Elf32_Off e_phoff;
1305 Elf32_Off e_shoff;
1306 Elf32_Word e_flags;
1307 Elf32_Half e_ehsize;
1308 Elf32_Half e_phentsize;
1309 Elf32_Half e_phnum;
1310 Elf32_Half e_shentsize;
1311 Elf32_Half e_shnum;
1312 Elf32_Half e_shstrndx;
1313 } Elf32_Ehdr;
1314
1315 typedef struct elf64_hdr {
1316 unsigned char e_ident[16]; /* ELF "magic number" */
1317 Elf64_Half e_type;
1318 Elf64_Half e_machine;
1319 Elf64_Word e_version;
1320 Elf64_Addr e_entry; /* Entry point virtual address */
1321 Elf64_Off e_phoff; /* Program header table file offset */
1322 Elf64_Off e_shoff; /* Section header table file offset */
1323 Elf64_Word e_flags;
1324 Elf64_Half e_ehsize;
1325 Elf64_Half e_phentsize;
1326 Elf64_Half e_phnum;
1327 Elf64_Half e_shentsize;
1328 Elf64_Half e_shnum;
1329 Elf64_Half e_shstrndx;
1330 } Elf64_Ehdr;
1331
1332 /* These constants define the permissions on sections in the program
1333 header, p_flags. */
1334 #define PF_R 0x4
1335 #define PF_W 0x2
1336 #define PF_X 0x1
1337
1338 typedef struct elf32_phdr{
1339 Elf32_Word p_type;
1340 Elf32_Off p_offset;
1341 Elf32_Addr p_vaddr;
1342 Elf32_Addr p_paddr;
1343 Elf32_Word p_filesz;
1344 Elf32_Word p_memsz;
1345 Elf32_Word p_flags;
1346 Elf32_Word p_align;
1347 } Elf32_Phdr;
1348
1349 typedef struct elf64_phdr {
1350 Elf64_Word p_type;
1351 Elf64_Word p_flags;
1352 Elf64_Off p_offset; /* Segment file offset */
1353 Elf64_Addr p_vaddr; /* Segment virtual address */
1354 Elf64_Addr p_paddr; /* Segment physical address */
1355 Elf64_Xword p_filesz; /* Segment size in file */
1356 Elf64_Xword p_memsz; /* Segment size in memory */
1357 Elf64_Xword p_align; /* Segment alignment, file & memory */
1358 } Elf64_Phdr;
1359
1360 /* sh_type */
1361 #define SHT_NULL 0
1362 #define SHT_PROGBITS 1
1363 #define SHT_SYMTAB 2
1364 #define SHT_STRTAB 3
1365 #define SHT_RELA 4
1366 #define SHT_HASH 5
1367 #define SHT_DYNAMIC 6
1368 #define SHT_NOTE 7
1369 #define SHT_NOBITS 8
1370 #define SHT_REL 9
1371 #define SHT_SHLIB 10
1372 #define SHT_DYNSYM 11
1373 #define SHT_NUM 12
1374 #define SHT_LOPROC 0x70000000
1375 #define SHT_HIPROC 0x7fffffff
1376 #define SHT_LOUSER 0x80000000
1377 #define SHT_HIUSER 0xffffffff
1378 #define SHT_MIPS_LIST 0x70000000
1379 #define SHT_MIPS_CONFLICT 0x70000002
1380 #define SHT_MIPS_GPTAB 0x70000003
1381 #define SHT_MIPS_UCODE 0x70000004
1382
1383 /* sh_flags */
1384 #define SHF_WRITE 0x1
1385 #define SHF_ALLOC 0x2
1386 #define SHF_EXECINSTR 0x4
1387 #define SHF_MASKPROC 0xf0000000
1388 #define SHF_MIPS_GPREL 0x10000000
1389
1390 /* special section indexes */
1391 #define SHN_UNDEF 0
1392 #define SHN_LORESERVE 0xff00
1393 #define SHN_LOPROC 0xff00
1394 #define SHN_HIPROC 0xff1f
1395 #define SHN_ABS 0xfff1
1396 #define SHN_COMMON 0xfff2
1397 #define SHN_HIRESERVE 0xffff
1398 #define SHN_MIPS_ACCOMON 0xff00
1399
1400 typedef struct elf32_shdr {
1401 Elf32_Word sh_name;
1402 Elf32_Word sh_type;
1403 Elf32_Word sh_flags;
1404 Elf32_Addr sh_addr;
1405 Elf32_Off sh_offset;
1406 Elf32_Word sh_size;
1407 Elf32_Word sh_link;
1408 Elf32_Word sh_info;
1409 Elf32_Word sh_addralign;
1410 Elf32_Word sh_entsize;
1411 } Elf32_Shdr;
1412
1413 typedef struct elf64_shdr {
1414 Elf64_Word sh_name; /* Section name, index in string tbl */
1415 Elf64_Word sh_type; /* Type of section */
1416 Elf64_Xword sh_flags; /* Miscellaneous section attributes */
1417 Elf64_Addr sh_addr; /* Section virtual addr at execution */
1418 Elf64_Off sh_offset; /* Section file offset */
1419 Elf64_Xword sh_size; /* Size of section in bytes */
1420 Elf64_Word sh_link; /* Index of another section */
1421 Elf64_Word sh_info; /* Additional section information */
1422 Elf64_Xword sh_addralign; /* Section alignment */
1423 Elf64_Xword sh_entsize; /* Entry size if section holds table */
1424 } Elf64_Shdr;
1425
1426 #define EI_MAG0 0 /* e_ident[] indexes */
1427 #define EI_MAG1 1
1428 #define EI_MAG2 2
1429 #define EI_MAG3 3
1430 #define EI_CLASS 4
1431 #define EI_DATA 5
1432 #define EI_VERSION 6
1433 #define EI_OSABI 7
1434 #define EI_PAD 8
1435
1436 #define ELFOSABI_NONE 0 /* UNIX System V ABI */
1437 #define ELFOSABI_SYSV 0 /* Alias. */
1438 #define ELFOSABI_HPUX 1 /* HP-UX */
1439 #define ELFOSABI_NETBSD 2 /* NetBSD. */
1440 #define ELFOSABI_LINUX 3 /* Linux. */
1441 #define ELFOSABI_SOLARIS 6 /* Sun Solaris. */
1442 #define ELFOSABI_AIX 7 /* IBM AIX. */
1443 #define ELFOSABI_IRIX 8 /* SGI Irix. */
1444 #define ELFOSABI_FREEBSD 9 /* FreeBSD. */
1445 #define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */
1446 #define ELFOSABI_MODESTO 11 /* Novell Modesto. */
1447 #define ELFOSABI_OPENBSD 12 /* OpenBSD. */
1448 #define ELFOSABI_ARM 97 /* ARM */
1449 #define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
1450
1451 #define ELFMAG0 0x7f /* EI_MAG */
1452 #define ELFMAG1 'E'
1453 #define ELFMAG2 'L'
1454 #define ELFMAG3 'F'
1455 #define ELFMAG "\177ELF"
1456 #define SELFMAG 4
1457
1458 #define ELFCLASSNONE 0 /* EI_CLASS */
1459 #define ELFCLASS32 1
1460 #define ELFCLASS64 2
1461 #define ELFCLASSNUM 3
1462
1463 #define ELFDATANONE 0 /* e_ident[EI_DATA] */
1464 #define ELFDATA2LSB 1
1465 #define ELFDATA2MSB 2
1466
1467 #define EV_NONE 0 /* e_version, EI_VERSION */
1468 #define EV_CURRENT 1
1469 #define EV_NUM 2
1470
1471 /* Notes used in ET_CORE */
1472 #define NT_PRSTATUS 1
1473 #define NT_FPREGSET 2
1474 #define NT_PRFPREG 2
1475 #define NT_PRPSINFO 3
1476 #define NT_TASKSTRUCT 4
1477 #define NT_AUXV 6
1478 #define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */
1479 #define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31 */
1480 #define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15 (lower half) */
1481 #define NT_S390_PREFIX 0x305 /* s390 prefix register */
1482 #define NT_S390_CTRS 0x304 /* s390 control registers */
1483 #define NT_S390_TODPREG 0x303 /* s390 TOD programmable register */
1484 #define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */
1485 #define NT_S390_TIMER 0x301 /* s390 timer register */
1486 #define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
1487 #define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
1488 #define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
1489 #define NT_ARM_VFP 0x400 /* ARM VFP/NEON registers */
1490 #define NT_ARM_TLS 0x401 /* ARM TLS register */
1491 #define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */
1492 #define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */
1493 #define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */
1494
1495
1496 /* Note header in a PT_NOTE section */
1497 typedef struct elf32_note {
1498 Elf32_Word n_namesz; /* Name size */
1499 Elf32_Word n_descsz; /* Content size */
1500 Elf32_Word n_type; /* Content type */
1501 } Elf32_Nhdr;
1502
1503 /* Note header in a PT_NOTE section */
1504 typedef struct elf64_note {
1505 Elf64_Word n_namesz; /* Name size */
1506 Elf64_Word n_descsz; /* Content size */
1507 Elf64_Word n_type; /* Content type */
1508 } Elf64_Nhdr;
1509
1510
1511 /* This data structure represents a PT_LOAD segment. */
1512 struct elf32_fdpic_loadseg {
1513 /* Core address to which the segment is mapped. */
1514 Elf32_Addr addr;
1515 /* VMA recorded in the program header. */
1516 Elf32_Addr p_vaddr;
1517 /* Size of this segment in memory. */
1518 Elf32_Word p_memsz;
1519 };
1520 struct elf32_fdpic_loadmap {
1521 /* Protocol version number, must be zero. */
1522 Elf32_Half version;
1523 /* Number of segments in this map. */
1524 Elf32_Half nsegs;
1525 /* The actual memory map. */
1526 struct elf32_fdpic_loadseg segs[/*nsegs*/];
1527 };
1528
1529 #ifdef ELF_CLASS
1530 #if ELF_CLASS == ELFCLASS32
1531
1532 #define elfhdr elf32_hdr
1533 #define elf_phdr elf32_phdr
1534 #define elf_note elf32_note
1535 #define elf_shdr elf32_shdr
1536 #define elf_sym elf32_sym
1537 #define elf_addr_t Elf32_Off
1538 #define elf_rela elf32_rela
1539
1540 #ifdef ELF_USES_RELOCA
1541 # define ELF_RELOC Elf32_Rela
1542 #else
1543 # define ELF_RELOC Elf32_Rel
1544 #endif
1545
1546 #else
1547
1548 #define elfhdr elf64_hdr
1549 #define elf_phdr elf64_phdr
1550 #define elf_note elf64_note
1551 #define elf_shdr elf64_shdr
1552 #define elf_sym elf64_sym
1553 #define elf_addr_t Elf64_Off
1554 #define elf_rela elf64_rela
1555
1556 #ifdef ELF_USES_RELOCA
1557 # define ELF_RELOC Elf64_Rela
1558 #else
1559 # define ELF_RELOC Elf64_Rel
1560 #endif
1561
1562 #endif /* ELF_CLASS */
1563
1564 #ifndef ElfW
1565 # if ELF_CLASS == ELFCLASS32
1566 # define ElfW(x) Elf32_ ## x
1567 # define ELFW(x) ELF32_ ## x
1568 # else
1569 # define ElfW(x) Elf64_ ## x
1570 # define ELFW(x) ELF64_ ## x
1571 # endif
1572 #endif
1573
1574 #endif /* ELF_CLASS */
1575
1576
1577 #endif /* QEMU_ELF_H */