target/riscv: vector register gather instruction
[qemu.git] / include / elf.h
1 #ifndef QEMU_ELF_H
2 #define QEMU_ELF_H
3
4 /* 32-bit ELF base types. */
5 typedef uint32_t Elf32_Addr;
6 typedef uint16_t Elf32_Half;
7 typedef uint32_t Elf32_Off;
8 typedef int32_t Elf32_Sword;
9 typedef uint32_t Elf32_Word;
10
11 /* 64-bit ELF base types. */
12 typedef uint64_t Elf64_Addr;
13 typedef uint16_t Elf64_Half;
14 typedef int16_t Elf64_SHalf;
15 typedef uint64_t Elf64_Off;
16 typedef int32_t Elf64_Sword;
17 typedef uint32_t Elf64_Word;
18 typedef uint64_t Elf64_Xword;
19 typedef int64_t Elf64_Sxword;
20
21 /* These constants are for the segment types stored in the image headers */
22 #define PT_NULL 0
23 #define PT_LOAD 1
24 #define PT_DYNAMIC 2
25 #define PT_INTERP 3
26 #define PT_NOTE 4
27 #define PT_SHLIB 5
28 #define PT_PHDR 6
29 #define PT_LOPROC 0x70000000
30 #define PT_HIPROC 0x7fffffff
31
32 #define PT_MIPS_REGINFO 0x70000000
33 #define PT_MIPS_RTPROC 0x70000001
34 #define PT_MIPS_OPTIONS 0x70000002
35 #define PT_MIPS_ABIFLAGS 0x70000003
36
37 /* Flags in the e_flags field of the header */
38 /* MIPS architecture level. */
39 #define EF_MIPS_ARCH 0xf0000000
40
41 /* Legal values for MIPS architecture level. */
42 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
43 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
44 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
45 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
46 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
47 #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
48 #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
49 #define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32r2 code. */
50 #define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64r2 code. */
51 #define EF_MIPS_ARCH_32R6 0x90000000 /* MIPS32r6 code. */
52 #define EF_MIPS_ARCH_64R6 0xa0000000 /* MIPS64r6 code. */
53
54 /* The ABI of a file. */
55 #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
56 #define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
57
58 #define EF_MIPS_NOREORDER 0x00000001
59 #define EF_MIPS_PIC 0x00000002
60 #define EF_MIPS_CPIC 0x00000004
61 #define EF_MIPS_ABI2 0x00000020
62 #define EF_MIPS_OPTIONS_FIRST 0x00000080
63 #define EF_MIPS_32BITMODE 0x00000100
64 #define EF_MIPS_ABI 0x0000f000
65 #define EF_MIPS_FP64 0x00000200
66 #define EF_MIPS_NAN2008 0x00000400
67
68 /* MIPS machine variant */
69 #define EF_MIPS_MACH_NONE 0x00000000 /* A standard MIPS implementation */
70 #define EF_MIPS_MACH_3900 0x00810000 /* Toshiba R3900 */
71 #define EF_MIPS_MACH_4010 0x00820000 /* LSI R4010 */
72 #define EF_MIPS_MACH_4100 0x00830000 /* NEC VR4100 */
73 #define EF_MIPS_MACH_4650 0x00850000 /* MIPS R4650 */
74 #define EF_MIPS_MACH_4120 0x00870000 /* NEC VR4120 */
75 #define EF_MIPS_MACH_4111 0x00880000 /* NEC VR4111/VR4181 */
76 #define EF_MIPS_MACH_SB1 0x008a0000 /* Broadcom SB-1 */
77 #define EF_MIPS_MACH_OCTEON 0x008b0000 /* Cavium Networks Octeon */
78 #define EF_MIPS_MACH_XLR 0x008c0000 /* RMI Xlr */
79 #define EF_MIPS_MACH_OCTEON2 0x008d0000 /* Cavium Networks Octeon2 */
80 #define EF_MIPS_MACH_OCTEON3 0x008e0000 /* Cavium Networks Octeon3 */
81 #define EF_MIPS_MACH_5400 0x00910000 /* NEC VR5400 */
82 #define EF_MIPS_MACH_5900 0x00920000 /* Toshiba/Sony R5900 */
83 #define EF_MIPS_MACH_5500 0x00980000 /* NEC VR5500 */
84 #define EF_MIPS_MACH_9000 0x00990000 /* PMC-Sierra RM9000 */
85 #define EF_MIPS_MACH_LS2E 0x00a00000 /* ST Microelectronics Loongson 2E */
86 #define EF_MIPS_MACH_LS2F 0x00a10000 /* ST Microelectronics Loongson 2F */
87 #define EF_MIPS_MACH_LS3A 0x00a20000 /* ST Microelectronics Loongson 3A */
88 #define EF_MIPS_MACH 0x00ff0000 /* EF_MIPS_MACH_xxx selection mask */
89
90 #define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (internal) */
91
92 #define MIPS_ABI_FP_ANY 0x0 /* FP ABI doesn't matter */
93 #define MIPS_ABI_FP_DOUBLE 0x1 /* -mdouble-float */
94 #define MIPS_ABI_FP_SINGLE 0x2 /* -msingle-float */
95 #define MIPS_ABI_FP_SOFT 0x3 /* -msoft-float */
96 #define MIPS_ABI_FP_OLD_64 0x4 /* -mips32r2 -mfp64 */
97 #define MIPS_ABI_FP_XX 0x5 /* -mfpxx */
98 #define MIPS_ABI_FP_64 0x6 /* -mips32r2 -mfp64 */
99 #define MIPS_ABI_FP_64A 0x7 /* -mips32r2 -mfp64 -mno-odd-spreg */
100
101 typedef struct mips_elf_abiflags_v0 {
102 uint16_t version; /* Version of flags structure */
103 uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */
104 uint8_t isa_rev; /* The revision of ISA: */
105 /* - 0 for MIPS V and below, */
106 /* - 1-n otherwise. */
107 uint8_t gpr_size; /* The size of general purpose registers */
108 uint8_t cpr1_size; /* The size of co-processor 1 registers */
109 uint8_t cpr2_size; /* The size of co-processor 2 registers */
110 uint8_t fp_abi; /* The floating-point ABI */
111 uint32_t isa_ext; /* Mask of processor-specific extensions */
112 uint32_t ases; /* Mask of ASEs used */
113 uint32_t flags1; /* Mask of general flags */
114 uint32_t flags2;
115 } Mips_elf_abiflags_v0;
116
117 /* These constants define the different elf file types */
118 #define ET_NONE 0
119 #define ET_REL 1
120 #define ET_EXEC 2
121 #define ET_DYN 3
122 #define ET_CORE 4
123 #define ET_LOPROC 0xff00
124 #define ET_HIPROC 0xffff
125
126 /* These constants define the various ELF target machines */
127 #define EM_NONE 0
128 #define EM_M32 1
129 #define EM_SPARC 2
130 #define EM_386 3
131 #define EM_68K 4
132 #define EM_88K 5
133 #define EM_486 6 /* Perhaps disused */
134 #define EM_860 7
135
136 #define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
137
138 #define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */
139
140 #define EM_PARISC 15 /* HPPA */
141
142 #define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
143
144 #define EM_PPC 20 /* PowerPC */
145 #define EM_PPC64 21 /* PowerPC64 */
146
147 #define EM_ARM 40 /* ARM */
148
149 #define EM_SH 42 /* SuperH */
150
151 #define EM_SPARCV9 43 /* SPARC v9 64-bit */
152
153 #define EM_TRICORE 44 /* Infineon TriCore */
154
155 #define EM_IA_64 50 /* HP/Intel IA-64 */
156
157 #define EM_X86_64 62 /* AMD x86-64 */
158
159 #define EM_S390 22 /* IBM S/390 */
160
161 #define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
162
163 #define EM_V850 87 /* NEC v850 */
164
165 #define EM_H8_300H 47 /* Hitachi H8/300H */
166 #define EM_H8S 48 /* Hitachi H8S */
167 #define EM_LATTICEMICO32 138 /* LatticeMico32 */
168
169 #define EM_OPENRISC 92 /* OpenCores OpenRISC */
170
171 #define EM_UNICORE32 110 /* UniCore32 */
172
173 #define EM_RISCV 243 /* RISC-V */
174
175 #define EM_NANOMIPS 249 /* Wave Computing nanoMIPS */
176
177 /*
178 * This is an interim value that we will use until the committee comes
179 * up with a final number.
180 */
181 #define EM_ALPHA 0x9026
182
183 /* Bogus old v850 magic number, used by old tools. */
184 #define EM_CYGNUS_V850 0x9080
185
186 /*
187 * This is the old interim value for S/390 architecture
188 */
189 #define EM_S390_OLD 0xA390
190
191 #define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
192
193 #define EM_MICROBLAZE 189
194 #define EM_MICROBLAZE_OLD 0xBAAB
195
196 #define EM_XTENSA 94 /* Tensilica Xtensa */
197
198 #define EM_AARCH64 183
199
200 #define EM_TILEGX 191 /* TILE-Gx */
201
202 #define EM_MOXIE 223 /* Moxie processor family */
203 #define EM_MOXIE_OLD 0xFEED
204
205 /* This is the info that is needed to parse the dynamic section of the file */
206 #define DT_NULL 0
207 #define DT_NEEDED 1
208 #define DT_PLTRELSZ 2
209 #define DT_PLTGOT 3
210 #define DT_HASH 4
211 #define DT_STRTAB 5
212 #define DT_SYMTAB 6
213 #define DT_RELA 7
214 #define DT_RELASZ 8
215 #define DT_RELAENT 9
216 #define DT_STRSZ 10
217 #define DT_SYMENT 11
218 #define DT_INIT 12
219 #define DT_FINI 13
220 #define DT_SONAME 14
221 #define DT_RPATH 15
222 #define DT_SYMBOLIC 16
223 #define DT_REL 17
224 #define DT_RELSZ 18
225 #define DT_RELENT 19
226 #define DT_PLTREL 20
227 #define DT_DEBUG 21
228 #define DT_TEXTREL 22
229 #define DT_JMPREL 23
230 #define DT_BINDNOW 24
231 #define DT_INIT_ARRAY 25
232 #define DT_FINI_ARRAY 26
233 #define DT_INIT_ARRAYSZ 27
234 #define DT_FINI_ARRAYSZ 28
235 #define DT_RUNPATH 29
236 #define DT_FLAGS 30
237 #define DT_LOOS 0x6000000d
238 #define DT_HIOS 0x6ffff000
239 #define DT_LOPROC 0x70000000
240 #define DT_HIPROC 0x7fffffff
241
242 /* DT_ entries which fall between DT_VALRNGLO and DT_VALRNDHI use
243 the d_val field of the Elf*_Dyn structure. I.e. they contain scalars. */
244 #define DT_VALRNGLO 0x6ffffd00
245 #define DT_VALRNGHI 0x6ffffdff
246
247 /* DT_ entries which fall between DT_ADDRRNGLO and DT_ADDRRNGHI use
248 the d_ptr field of the Elf*_Dyn structure. I.e. they contain pointers. */
249 #define DT_ADDRRNGLO 0x6ffffe00
250 #define DT_ADDRRNGHI 0x6ffffeff
251
252 #define DT_VERSYM 0x6ffffff0
253 #define DT_RELACOUNT 0x6ffffff9
254 #define DT_RELCOUNT 0x6ffffffa
255 #define DT_FLAGS_1 0x6ffffffb
256 #define DT_VERDEF 0x6ffffffc
257 #define DT_VERDEFNUM 0x6ffffffd
258 #define DT_VERNEED 0x6ffffffe
259 #define DT_VERNEEDNUM 0x6fffffff
260
261 #define DT_MIPS_RLD_VERSION 0x70000001
262 #define DT_MIPS_TIME_STAMP 0x70000002
263 #define DT_MIPS_ICHECKSUM 0x70000003
264 #define DT_MIPS_IVERSION 0x70000004
265 #define DT_MIPS_FLAGS 0x70000005
266 #define RHF_NONE 0
267 #define RHF_HARDWAY 1
268 #define RHF_NOTPOT 2
269 #define DT_MIPS_BASE_ADDRESS 0x70000006
270 #define DT_MIPS_CONFLICT 0x70000008
271 #define DT_MIPS_LIBLIST 0x70000009
272 #define DT_MIPS_LOCAL_GOTNO 0x7000000a
273 #define DT_MIPS_CONFLICTNO 0x7000000b
274 #define DT_MIPS_LIBLISTNO 0x70000010
275 #define DT_MIPS_SYMTABNO 0x70000011
276 #define DT_MIPS_UNREFEXTNO 0x70000012
277 #define DT_MIPS_GOTSYM 0x70000013
278 #define DT_MIPS_HIPAGENO 0x70000014
279 #define DT_MIPS_RLD_MAP 0x70000016
280
281 /* This info is needed when parsing the symbol table */
282 #define STB_LOCAL 0
283 #define STB_GLOBAL 1
284 #define STB_WEAK 2
285
286 #define STT_NOTYPE 0
287 #define STT_OBJECT 1
288 #define STT_FUNC 2
289 #define STT_SECTION 3
290 #define STT_FILE 4
291
292 #define ELF_ST_BIND(x) ((x) >> 4)
293 #define ELF_ST_TYPE(x) (((unsigned int) x) & 0xf)
294 #define ELF_ST_INFO(bind, type) (((bind) << 4) | ((type) & 0xf))
295 #define ELF32_ST_BIND(x) ELF_ST_BIND(x)
296 #define ELF32_ST_TYPE(x) ELF_ST_TYPE(x)
297 #define ELF64_ST_BIND(x) ELF_ST_BIND(x)
298 #define ELF64_ST_TYPE(x) ELF_ST_TYPE(x)
299
300 /* Symbolic values for the entries in the auxiliary table
301 put on the initial stack */
302 #define AT_NULL 0 /* end of vector */
303 #define AT_IGNORE 1 /* entry should be ignored */
304 #define AT_EXECFD 2 /* file descriptor of program */
305 #define AT_PHDR 3 /* program headers for program */
306 #define AT_PHENT 4 /* size of program header entry */
307 #define AT_PHNUM 5 /* number of program headers */
308 #define AT_PAGESZ 6 /* system page size */
309 #define AT_BASE 7 /* base address of interpreter */
310 #define AT_FLAGS 8 /* flags */
311 #define AT_ENTRY 9 /* entry point of program */
312 #define AT_NOTELF 10 /* program is not ELF */
313 #define AT_UID 11 /* real uid */
314 #define AT_EUID 12 /* effective uid */
315 #define AT_GID 13 /* real gid */
316 #define AT_EGID 14 /* effective gid */
317 #define AT_PLATFORM 15 /* string identifying CPU for optimizations */
318 #define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */
319 #define AT_CLKTCK 17 /* frequency at which times() increments */
320 #define AT_FPUCW 18 /* info about fpu initialization by kernel */
321 #define AT_DCACHEBSIZE 19 /* data cache block size */
322 #define AT_ICACHEBSIZE 20 /* instruction cache block size */
323 #define AT_UCACHEBSIZE 21 /* unified cache block size */
324 #define AT_IGNOREPPC 22 /* ppc only; entry should be ignored */
325 #define AT_SECURE 23 /* boolean, was exec suid-like? */
326 #define AT_BASE_PLATFORM 24 /* string identifying real platforms */
327 #define AT_RANDOM 25 /* address of 16 random bytes */
328 #define AT_HWCAP2 26 /* extension of AT_HWCAP */
329 #define AT_EXECFN 31 /* filename of the executable */
330 #define AT_SYSINFO 32 /* address of kernel entry point */
331 #define AT_SYSINFO_EHDR 33 /* address of kernel vdso */
332 #define AT_L1I_CACHESHAPE 34 /* shapes of the caches: */
333 #define AT_L1D_CACHESHAPE 35 /* bits 0-3: cache associativity. */
334 #define AT_L2_CACHESHAPE 36 /* bits 4-7: log2 of line size. */
335 #define AT_L3_CACHESHAPE 37 /* val&~255: cache size. */
336
337 typedef struct dynamic{
338 Elf32_Sword d_tag;
339 union{
340 Elf32_Sword d_val;
341 Elf32_Addr d_ptr;
342 } d_un;
343 } Elf32_Dyn;
344
345 typedef struct {
346 Elf64_Sxword d_tag; /* entry tag value */
347 union {
348 Elf64_Xword d_val;
349 Elf64_Addr d_ptr;
350 } d_un;
351 } Elf64_Dyn;
352
353 /* The following are used with relocations */
354 #define ELF32_R_SYM(x) ((x) >> 8)
355 #define ELF32_R_TYPE(x) ((x) & 0xff)
356
357 #define ELF64_R_SYM(i) ((i) >> 32)
358 #define ELF64_R_TYPE(i) ((i) & 0xffffffff)
359 #define ELF64_R_TYPE_DATA(i) (((ELF64_R_TYPE(i) >> 8) ^ 0x00800000) - 0x00800000)
360
361 #define R_386_NONE 0
362 #define R_386_32 1
363 #define R_386_PC32 2
364 #define R_386_GOT32 3
365 #define R_386_PLT32 4
366 #define R_386_COPY 5
367 #define R_386_GLOB_DAT 6
368 #define R_386_JMP_SLOT 7
369 #define R_386_RELATIVE 8
370 #define R_386_GOTOFF 9
371 #define R_386_GOTPC 10
372 #define R_386_NUM 11
373 /* Not a dynamic reloc, so not included in R_386_NUM. Used in TCG. */
374 #define R_386_PC8 23
375
376 #define R_MIPS_NONE 0
377 #define R_MIPS_16 1
378 #define R_MIPS_32 2
379 #define R_MIPS_REL32 3
380 #define R_MIPS_26 4
381 #define R_MIPS_HI16 5
382 #define R_MIPS_LO16 6
383 #define R_MIPS_GPREL16 7
384 #define R_MIPS_LITERAL 8
385 #define R_MIPS_GOT16 9
386 #define R_MIPS_PC16 10
387 #define R_MIPS_CALL16 11
388 #define R_MIPS_GPREL32 12
389 /* The remaining relocs are defined on Irix, although they are not
390 in the MIPS ELF ABI. */
391 #define R_MIPS_UNUSED1 13
392 #define R_MIPS_UNUSED2 14
393 #define R_MIPS_UNUSED3 15
394 #define R_MIPS_SHIFT5 16
395 #define R_MIPS_SHIFT6 17
396 #define R_MIPS_64 18
397 #define R_MIPS_GOT_DISP 19
398 #define R_MIPS_GOT_PAGE 20
399 #define R_MIPS_GOT_OFST 21
400 /*
401 * The following two relocation types are specified in the MIPS ABI
402 * conformance guide version 1.2 but not yet in the psABI.
403 */
404 #define R_MIPS_GOTHI16 22
405 #define R_MIPS_GOTLO16 23
406 #define R_MIPS_SUB 24
407 #define R_MIPS_INSERT_A 25
408 #define R_MIPS_INSERT_B 26
409 #define R_MIPS_DELETE 27
410 #define R_MIPS_HIGHER 28
411 #define R_MIPS_HIGHEST 29
412 /*
413 * The following two relocation types are specified in the MIPS ABI
414 * conformance guide version 1.2 but not yet in the psABI.
415 */
416 #define R_MIPS_CALLHI16 30
417 #define R_MIPS_CALLLO16 31
418 /*
419 * This range is reserved for vendor specific relocations.
420 */
421 #define R_MIPS_LOVENDOR 100
422 #define R_MIPS_HIVENDOR 127
423
424
425 /* SUN SPARC specific definitions. */
426
427 /* Values for Elf64_Ehdr.e_flags. */
428
429 #define EF_SPARCV9_MM 3
430 #define EF_SPARCV9_TSO 0
431 #define EF_SPARCV9_PSO 1
432 #define EF_SPARCV9_RMO 2
433 #define EF_SPARC_LEDATA 0x800000 /* little endian data */
434 #define EF_SPARC_EXT_MASK 0xFFFF00
435 #define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */
436 #define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */
437 #define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */
438 #define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */
439
440 /*
441 * Sparc ELF relocation types
442 */
443 #define R_SPARC_NONE 0
444 #define R_SPARC_8 1
445 #define R_SPARC_16 2
446 #define R_SPARC_32 3
447 #define R_SPARC_DISP8 4
448 #define R_SPARC_DISP16 5
449 #define R_SPARC_DISP32 6
450 #define R_SPARC_WDISP30 7
451 #define R_SPARC_WDISP22 8
452 #define R_SPARC_HI22 9
453 #define R_SPARC_22 10
454 #define R_SPARC_13 11
455 #define R_SPARC_LO10 12
456 #define R_SPARC_GOT10 13
457 #define R_SPARC_GOT13 14
458 #define R_SPARC_GOT22 15
459 #define R_SPARC_PC10 16
460 #define R_SPARC_PC22 17
461 #define R_SPARC_WPLT30 18
462 #define R_SPARC_COPY 19
463 #define R_SPARC_GLOB_DAT 20
464 #define R_SPARC_JMP_SLOT 21
465 #define R_SPARC_RELATIVE 22
466 #define R_SPARC_UA32 23
467 #define R_SPARC_PLT32 24
468 #define R_SPARC_HIPLT22 25
469 #define R_SPARC_LOPLT10 26
470 #define R_SPARC_PCPLT32 27
471 #define R_SPARC_PCPLT22 28
472 #define R_SPARC_PCPLT10 29
473 #define R_SPARC_10 30
474 #define R_SPARC_11 31
475 #define R_SPARC_64 32
476 #define R_SPARC_OLO10 33
477 #define R_SPARC_HH22 34
478 #define R_SPARC_HM10 35
479 #define R_SPARC_LM22 36
480 #define R_SPARC_WDISP16 40
481 #define R_SPARC_WDISP19 41
482 #define R_SPARC_7 43
483 #define R_SPARC_5 44
484 #define R_SPARC_6 45
485
486 /* Bits present in AT_HWCAP for ARM. */
487
488 #define HWCAP_ARM_SWP (1 << 0)
489 #define HWCAP_ARM_HALF (1 << 1)
490 #define HWCAP_ARM_THUMB (1 << 2)
491 #define HWCAP_ARM_26BIT (1 << 3)
492 #define HWCAP_ARM_FAST_MULT (1 << 4)
493 #define HWCAP_ARM_FPA (1 << 5)
494 #define HWCAP_ARM_VFP (1 << 6)
495 #define HWCAP_ARM_EDSP (1 << 7)
496 #define HWCAP_ARM_JAVA (1 << 8)
497 #define HWCAP_ARM_IWMMXT (1 << 9)
498 #define HWCAP_ARM_CRUNCH (1 << 10)
499 #define HWCAP_ARM_THUMBEE (1 << 11)
500 #define HWCAP_ARM_NEON (1 << 12)
501 #define HWCAP_ARM_VFPv3 (1 << 13)
502 #define HWCAP_ARM_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
503 #define HWCAP_ARM_TLS (1 << 15)
504 #define HWCAP_ARM_VFPv4 (1 << 16)
505 #define HWCAP_ARM_IDIVA (1 << 17)
506 #define HWCAP_ARM_IDIVT (1 << 18)
507 #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
508 #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs */
509 #define HWCAP_LPAE (1 << 20)
510
511 /* Bits present in AT_HWCAP for PowerPC. */
512
513 #define PPC_FEATURE_32 0x80000000
514 #define PPC_FEATURE_64 0x40000000
515 #define PPC_FEATURE_601_INSTR 0x20000000
516 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000
517 #define PPC_FEATURE_HAS_FPU 0x08000000
518 #define PPC_FEATURE_HAS_MMU 0x04000000
519 #define PPC_FEATURE_HAS_4xxMAC 0x02000000
520 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000
521 #define PPC_FEATURE_HAS_SPE 0x00800000
522 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
523 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
524 #define PPC_FEATURE_NO_TB 0x00100000
525 #define PPC_FEATURE_POWER4 0x00080000
526 #define PPC_FEATURE_POWER5 0x00040000
527 #define PPC_FEATURE_POWER5_PLUS 0x00020000
528 #define PPC_FEATURE_CELL 0x00010000
529 #define PPC_FEATURE_BOOKE 0x00008000
530 #define PPC_FEATURE_SMT 0x00004000
531 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000
532 #define PPC_FEATURE_ARCH_2_05 0x00001000
533 #define PPC_FEATURE_PA6T 0x00000800
534 #define PPC_FEATURE_HAS_DFP 0x00000400
535 #define PPC_FEATURE_POWER6_EXT 0x00000200
536 #define PPC_FEATURE_ARCH_2_06 0x00000100
537 #define PPC_FEATURE_HAS_VSX 0x00000080
538
539 #define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
540 0x00000040
541
542 #define PPC_FEATURE_TRUE_LE 0x00000002
543 #define PPC_FEATURE_PPC_LE 0x00000001
544
545 /* Bits present in AT_HWCAP2 for PowerPC. */
546
547 #define PPC_FEATURE2_ARCH_2_07 0x80000000
548 #define PPC_FEATURE2_HAS_HTM 0x40000000
549 #define PPC_FEATURE2_HAS_DSCR 0x20000000
550 #define PPC_FEATURE2_HAS_EBB 0x10000000
551 #define PPC_FEATURE2_HAS_ISEL 0x08000000
552 #define PPC_FEATURE2_HAS_TAR 0x04000000
553 #define PPC_FEATURE2_HAS_VEC_CRYPTO 0x02000000
554 #define PPC_FEATURE2_HTM_NOSC 0x01000000
555 #define PPC_FEATURE2_ARCH_3_00 0x00800000
556 #define PPC_FEATURE2_HAS_IEEE128 0x00400000
557
558 /* Bits present in AT_HWCAP for Sparc. */
559
560 #define HWCAP_SPARC_FLUSH 0x00000001
561 #define HWCAP_SPARC_STBAR 0x00000002
562 #define HWCAP_SPARC_SWAP 0x00000004
563 #define HWCAP_SPARC_MULDIV 0x00000008
564 #define HWCAP_SPARC_V9 0x00000010
565 #define HWCAP_SPARC_ULTRA3 0x00000020
566 #define HWCAP_SPARC_BLKINIT 0x00000040
567 #define HWCAP_SPARC_N2 0x00000080
568 #define HWCAP_SPARC_MUL32 0x00000100
569 #define HWCAP_SPARC_DIV32 0x00000200
570 #define HWCAP_SPARC_FSMULD 0x00000400
571 #define HWCAP_SPARC_V8PLUS 0x00000800
572 #define HWCAP_SPARC_POPC 0x00001000
573 #define HWCAP_SPARC_VIS 0x00002000
574 #define HWCAP_SPARC_VIS2 0x00004000
575 #define HWCAP_SPARC_ASI_BLK_INIT 0x00008000
576 #define HWCAP_SPARC_FMAF 0x00010000
577 #define HWCAP_SPARC_VIS3 0x00020000
578 #define HWCAP_SPARC_HPC 0x00040000
579 #define HWCAP_SPARC_RANDOM 0x00080000
580 #define HWCAP_SPARC_TRANS 0x00100000
581 #define HWCAP_SPARC_FJFMAU 0x00200000
582 #define HWCAP_SPARC_IMA 0x00400000
583 #define HWCAP_SPARC_ASI_CACHE_SPARING 0x00800000
584 #define HWCAP_SPARC_PAUSE 0x01000000
585 #define HWCAP_SPARC_CBCOND 0x02000000
586 #define HWCAP_SPARC_CRYPTO 0x04000000
587
588 /* Bits present in AT_HWCAP for s390. */
589
590 #define HWCAP_S390_ESAN3 1
591 #define HWCAP_S390_ZARCH 2
592 #define HWCAP_S390_STFLE 4
593 #define HWCAP_S390_MSA 8
594 #define HWCAP_S390_LDISP 16
595 #define HWCAP_S390_EIMM 32
596 #define HWCAP_S390_DFP 64
597 #define HWCAP_S390_HPAGE 128
598 #define HWCAP_S390_ETF3EH 256
599 #define HWCAP_S390_HIGH_GPRS 512
600 #define HWCAP_S390_TE 1024
601 #define HWCAP_S390_VXRS 2048
602
603 /* M68K specific definitions. */
604 /* We use the top 24 bits to encode information about the
605 architecture variant. */
606 #define EF_M68K_CPU32 0x00810000
607 #define EF_M68K_M68000 0x01000000
608 #define EF_M68K_CFV4E 0x00008000
609 #define EF_M68K_FIDO 0x02000000
610 #define EF_M68K_ARCH_MASK \
611 (EF_M68K_M68000 | EF_M68K_CPU32 | EF_M68K_CFV4E | EF_M68K_FIDO)
612
613 /* We use the bottom 8 bits to encode information about the
614 coldfire variant. If we use any of these bits, the top 24 bits are
615 either 0 or EF_M68K_CFV4E. */
616 #define EF_M68K_CF_ISA_MASK 0x0F /* Which ISA */
617 #define EF_M68K_CF_ISA_A_NODIV 0x01 /* ISA A except for div */
618 #define EF_M68K_CF_ISA_A 0x02
619 #define EF_M68K_CF_ISA_A_PLUS 0x03
620 #define EF_M68K_CF_ISA_B_NOUSP 0x04 /* ISA_B except for USP */
621 #define EF_M68K_CF_ISA_B 0x05
622 #define EF_M68K_CF_ISA_C 0x06
623 #define EF_M68K_CF_ISA_C_NODIV 0x07 /* ISA C except for div */
624 #define EF_M68K_CF_MAC_MASK 0x30
625 #define EF_M68K_CF_MAC 0x10 /* MAC */
626 #define EF_M68K_CF_EMAC 0x20 /* EMAC */
627 #define EF_M68K_CF_EMAC_B 0x30 /* EMAC_B */
628 #define EF_M68K_CF_FLOAT 0x40 /* Has float insns */
629 #define EF_M68K_CF_MASK 0xFF
630
631 /*
632 * 68k ELF relocation types
633 */
634 #define R_68K_NONE 0
635 #define R_68K_32 1
636 #define R_68K_16 2
637 #define R_68K_8 3
638 #define R_68K_PC32 4
639 #define R_68K_PC16 5
640 #define R_68K_PC8 6
641 #define R_68K_GOT32 7
642 #define R_68K_GOT16 8
643 #define R_68K_GOT8 9
644 #define R_68K_GOT32O 10
645 #define R_68K_GOT16O 11
646 #define R_68K_GOT8O 12
647 #define R_68K_PLT32 13
648 #define R_68K_PLT16 14
649 #define R_68K_PLT8 15
650 #define R_68K_PLT32O 16
651 #define R_68K_PLT16O 17
652 #define R_68K_PLT8O 18
653 #define R_68K_COPY 19
654 #define R_68K_GLOB_DAT 20
655 #define R_68K_JMP_SLOT 21
656 #define R_68K_RELATIVE 22
657
658 /*
659 * Alpha ELF relocation types
660 */
661 #define R_ALPHA_NONE 0 /* No reloc */
662 #define R_ALPHA_REFLONG 1 /* Direct 32 bit */
663 #define R_ALPHA_REFQUAD 2 /* Direct 64 bit */
664 #define R_ALPHA_GPREL32 3 /* GP relative 32 bit */
665 #define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */
666 #define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */
667 #define R_ALPHA_GPDISP 6 /* Add displacement to GP */
668 #define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */
669 #define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */
670 #define R_ALPHA_SREL16 9 /* PC relative 16 bit */
671 #define R_ALPHA_SREL32 10 /* PC relative 32 bit */
672 #define R_ALPHA_SREL64 11 /* PC relative 64 bit */
673 #define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */
674 #define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */
675 #define R_ALPHA_GPREL16 19 /* GP relative 16 bit */
676 #define R_ALPHA_COPY 24 /* Copy symbol at runtime */
677 #define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */
678 #define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */
679 #define R_ALPHA_RELATIVE 27 /* Adjust by program base */
680 #define R_ALPHA_BRSGP 28
681 #define R_ALPHA_TLSGD 29
682 #define R_ALPHA_TLS_LDM 30
683 #define R_ALPHA_DTPMOD64 31
684 #define R_ALPHA_GOTDTPREL 32
685 #define R_ALPHA_DTPREL64 33
686 #define R_ALPHA_DTPRELHI 34
687 #define R_ALPHA_DTPRELLO 35
688 #define R_ALPHA_DTPREL16 36
689 #define R_ALPHA_GOTTPREL 37
690 #define R_ALPHA_TPREL64 38
691 #define R_ALPHA_TPRELHI 39
692 #define R_ALPHA_TPRELLO 40
693 #define R_ALPHA_TPREL16 41
694
695 #define SHF_ALPHA_GPREL 0x10000000
696
697
698 /* PowerPC specific definitions. */
699
700 /* Processor specific flags for the ELF header e_flags field. */
701 #define EF_PPC64_ABI 0x3
702
703 /* PowerPC relocations defined by the ABIs */
704 #define R_PPC_NONE 0
705 #define R_PPC_ADDR32 1 /* 32bit absolute address */
706 #define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
707 #define R_PPC_ADDR16 3 /* 16bit absolute address */
708 #define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
709 #define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
710 #define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
711 #define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
712 #define R_PPC_ADDR14_BRTAKEN 8
713 #define R_PPC_ADDR14_BRNTAKEN 9
714 #define R_PPC_REL24 10 /* PC relative 26 bit */
715 #define R_PPC_REL14 11 /* PC relative 16 bit */
716 #define R_PPC_REL14_BRTAKEN 12
717 #define R_PPC_REL14_BRNTAKEN 13
718 #define R_PPC_GOT16 14
719 #define R_PPC_GOT16_LO 15
720 #define R_PPC_GOT16_HI 16
721 #define R_PPC_GOT16_HA 17
722 #define R_PPC_PLTREL24 18
723 #define R_PPC_COPY 19
724 #define R_PPC_GLOB_DAT 20
725 #define R_PPC_JMP_SLOT 21
726 #define R_PPC_RELATIVE 22
727 #define R_PPC_LOCAL24PC 23
728 #define R_PPC_UADDR32 24
729 #define R_PPC_UADDR16 25
730 #define R_PPC_REL32 26
731 #define R_PPC_PLT32 27
732 #define R_PPC_PLTREL32 28
733 #define R_PPC_PLT16_LO 29
734 #define R_PPC_PLT16_HI 30
735 #define R_PPC_PLT16_HA 31
736 #define R_PPC_SDAREL16 32
737 #define R_PPC_SECTOFF 33
738 #define R_PPC_SECTOFF_LO 34
739 #define R_PPC_SECTOFF_HI 35
740 #define R_PPC_SECTOFF_HA 36
741 /* Keep this the last entry. */
742 #ifndef R_PPC_NUM
743 #define R_PPC_NUM 37
744 #endif
745
746 /* ARM specific declarations */
747
748 /* Processor specific flags for the ELF header e_flags field. */
749 #define EF_ARM_RELEXEC 0x01
750 #define EF_ARM_HASENTRY 0x02
751 #define EF_ARM_INTERWORK 0x04
752 #define EF_ARM_APCS_26 0x08
753 #define EF_ARM_APCS_FLOAT 0x10
754 #define EF_ARM_PIC 0x20
755 #define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */
756 #define EF_NEW_ABI 0x80
757 #define EF_OLD_ABI 0x100
758 #define EF_ARM_SOFT_FLOAT 0x200
759 #define EF_ARM_VFP_FLOAT 0x400
760 #define EF_ARM_MAVERICK_FLOAT 0x800
761
762 /* Other constants defined in the ARM ELF spec. version B-01. */
763 #define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK */
764 #define EF_ARM_DYNSYMSUSESEGIDX 0x08 /* NB conflicts with EF_APCS26 */
765 #define EF_ARM_MAPSYMSFIRST 0x10 /* NB conflicts with EF_APCS_FLOAT */
766 #define EF_ARM_EABIMASK 0xFF000000
767
768 /* Constants defined in AAELF. */
769 #define EF_ARM_BE8 0x00800000
770 #define EF_ARM_LE8 0x00400000
771
772 #define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK)
773 #define EF_ARM_EABI_UNKNOWN 0x00000000
774 #define EF_ARM_EABI_VER1 0x01000000
775 #define EF_ARM_EABI_VER2 0x02000000
776 #define EF_ARM_EABI_VER3 0x03000000
777 #define EF_ARM_EABI_VER4 0x04000000
778 #define EF_ARM_EABI_VER5 0x05000000
779
780 /* Additional symbol types for Thumb */
781 #define STT_ARM_TFUNC 0xd
782
783 /* ARM-specific values for sh_flags */
784 #define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */
785 #define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined
786 in the input to a link step */
787
788 /* ARM-specific program header flags */
789 #define PF_ARM_SB 0x10000000 /* Segment contains the location
790 addressed by the static base */
791
792 /* ARM relocs. */
793 #define R_ARM_NONE 0 /* No reloc */
794 #define R_ARM_PC24 1 /* PC relative 26 bit branch */
795 #define R_ARM_ABS32 2 /* Direct 32 bit */
796 #define R_ARM_REL32 3 /* PC relative 32 bit */
797 #define R_ARM_PC13 4
798 #define R_ARM_ABS16 5 /* Direct 16 bit */
799 #define R_ARM_ABS12 6 /* Direct 12 bit */
800 #define R_ARM_THM_ABS5 7
801 #define R_ARM_ABS8 8 /* Direct 8 bit */
802 #define R_ARM_SBREL32 9
803 #define R_ARM_THM_PC22 10
804 #define R_ARM_THM_PC8 11
805 #define R_ARM_AMP_VCALL9 12
806 #define R_ARM_SWI24 13
807 #define R_ARM_THM_SWI8 14
808 #define R_ARM_XPC25 15
809 #define R_ARM_THM_XPC22 16
810 #define R_ARM_COPY 20 /* Copy symbol at runtime */
811 #define R_ARM_GLOB_DAT 21 /* Create GOT entry */
812 #define R_ARM_JUMP_SLOT 22 /* Create PLT entry */
813 #define R_ARM_RELATIVE 23 /* Adjust by program base */
814 #define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */
815 #define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
816 #define R_ARM_GOT32 26 /* 32 bit GOT entry */
817 #define R_ARM_PLT32 27 /* 32 bit PLT address */
818 #define R_ARM_CALL 28
819 #define R_ARM_JUMP24 29
820 #define R_ARM_GNU_VTENTRY 100
821 #define R_ARM_GNU_VTINHERIT 101
822 #define R_ARM_THM_PC11 102 /* thumb unconditional branch */
823 #define R_ARM_THM_PC9 103 /* thumb conditional branch */
824 #define R_ARM_RXPC25 249
825 #define R_ARM_RSBREL32 250
826 #define R_ARM_THM_RPC22 251
827 #define R_ARM_RREL32 252
828 #define R_ARM_RABS22 253
829 #define R_ARM_RPC24 254
830 #define R_ARM_RBASE 255
831 /* Keep this the last entry. */
832 #define R_ARM_NUM 256
833
834 /* ARM Aarch64 relocation types */
835 #define R_AARCH64_NONE 256 /* also accepts R_ARM_NONE (0) */
836 /* static data relocations */
837 #define R_AARCH64_ABS64 257
838 #define R_AARCH64_ABS32 258
839 #define R_AARCH64_ABS16 259
840 #define R_AARCH64_PREL64 260
841 #define R_AARCH64_PREL32 261
842 #define R_AARCH64_PREL16 262
843 /* static aarch64 group relocations */
844 /* group relocs to create unsigned data value or address inline */
845 #define R_AARCH64_MOVW_UABS_G0 263
846 #define R_AARCH64_MOVW_UABS_G0_NC 264
847 #define R_AARCH64_MOVW_UABS_G1 265
848 #define R_AARCH64_MOVW_UABS_G1_NC 266
849 #define R_AARCH64_MOVW_UABS_G2 267
850 #define R_AARCH64_MOVW_UABS_G2_NC 268
851 #define R_AARCH64_MOVW_UABS_G3 269
852 /* group relocs to create signed data or offset value inline */
853 #define R_AARCH64_MOVW_SABS_G0 270
854 #define R_AARCH64_MOVW_SABS_G1 271
855 #define R_AARCH64_MOVW_SABS_G2 272
856 /* relocs to generate 19, 21, and 33 bit PC-relative addresses */
857 #define R_AARCH64_LD_PREL_LO19 273
858 #define R_AARCH64_ADR_PREL_LO21 274
859 #define R_AARCH64_ADR_PREL_PG_HI21 275
860 #define R_AARCH64_ADR_PREL_PG_HI21_NC 276
861 #define R_AARCH64_ADD_ABS_LO12_NC 277
862 #define R_AARCH64_LDST8_ABS_LO12_NC 278
863 #define R_AARCH64_LDST16_ABS_LO12_NC 284
864 #define R_AARCH64_LDST32_ABS_LO12_NC 285
865 #define R_AARCH64_LDST64_ABS_LO12_NC 286
866 #define R_AARCH64_LDST128_ABS_LO12_NC 299
867 /* relocs for control-flow - all offsets as multiple of 4 */
868 #define R_AARCH64_TSTBR14 279
869 #define R_AARCH64_CONDBR19 280
870 #define R_AARCH64_JUMP26 282
871 #define R_AARCH64_CALL26 283
872 /* group relocs to create pc-relative offset inline */
873 #define R_AARCH64_MOVW_PREL_G0 287
874 #define R_AARCH64_MOVW_PREL_G0_NC 288
875 #define R_AARCH64_MOVW_PREL_G1 289
876 #define R_AARCH64_MOVW_PREL_G1_NC 290
877 #define R_AARCH64_MOVW_PREL_G2 291
878 #define R_AARCH64_MOVW_PREL_G2_NC 292
879 #define R_AARCH64_MOVW_PREL_G3 293
880 /* group relocs to create a GOT-relative offset inline */
881 #define R_AARCH64_MOVW_GOTOFF_G0 300
882 #define R_AARCH64_MOVW_GOTOFF_G0_NC 301
883 #define R_AARCH64_MOVW_GOTOFF_G1 302
884 #define R_AARCH64_MOVW_GOTOFF_G1_NC 303
885 #define R_AARCH64_MOVW_GOTOFF_G2 304
886 #define R_AARCH64_MOVW_GOTOFF_G2_NC 305
887 #define R_AARCH64_MOVW_GOTOFF_G3 306
888 /* GOT-relative data relocs */
889 #define R_AARCH64_GOTREL64 307
890 #define R_AARCH64_GOTREL32 308
891 /* GOT-relative instr relocs */
892 #define R_AARCH64_GOT_LD_PREL19 309
893 #define R_AARCH64_LD64_GOTOFF_LO15 310
894 #define R_AARCH64_ADR_GOT_PAGE 311
895 #define R_AARCH64_LD64_GOT_LO12_NC 312
896 #define R_AARCH64_LD64_GOTPAGE_LO15 313
897 /* General Dynamic TLS relocations */
898 #define R_AARCH64_TLSGD_ADR_PREL21 512
899 #define R_AARCH64_TLSGD_ADR_PAGE21 513
900 #define R_AARCH64_TLSGD_ADD_LO12_NC 514
901 #define R_AARCH64_TLSGD_MOVW_G1 515
902 #define R_AARCH64_TLSGD_MOVW_G0_NC 516
903 /* Local Dynamic TLS relocations */
904 #define R_AARCH64_TLSLD_ADR_PREL21 517
905 #define R_AARCH64_TLSLD_ADR_PAGE21 518
906 #define R_AARCH64_TLSLD_ADD_LO12_NC 519
907 #define R_AARCH64_TLSLD_MOVW_G1 520
908 #define R_AARCH64_TLSLD_MOVW_G0_NC 521
909 #define R_AARCH64_TLSLD_LD_PREL19 522
910 #define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523
911 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524
912 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525
913 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526
914 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527
915 #define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528
916 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529
917 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530
918 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531
919 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532
920 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533
921 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534
922 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535
923 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536
924 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537
925 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538
926 /* initial exec TLS relocations */
927 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539
928 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540
929 #define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541
930 #define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542
931 #define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543
932 /* local exec TLS relocations */
933 #define R_AARCH64_TLSLE_MOVW_TPREL_G2 544
934 #define R_AARCH64_TLSLE_MOVW_TPREL_G1 545
935 #define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546
936 #define R_AARCH64_TLSLE_MOVW_TPREL_G0 547
937 #define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548
938 #define R_AARCH64_TLSLE_ADD_TPREL_HI12 549
939 #define R_AARCH64_TLSLE_ADD_TPREL_LO12 550
940 #define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551
941 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552
942 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553
943 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554
944 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555
945 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556
946 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557
947 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558
948 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559
949 /* Dynamic Relocations */
950 #define R_AARCH64_COPY 1024
951 #define R_AARCH64_GLOB_DAT 1025
952 #define R_AARCH64_JUMP_SLOT 1026
953 #define R_AARCH64_RELATIVE 1027
954 #define R_AARCH64_TLS_DTPREL64 1028
955 #define R_AARCH64_TLS_DTPMOD64 1029
956 #define R_AARCH64_TLS_TPREL64 1030
957 #define R_AARCH64_TLS_DTPREL32 1031
958 #define R_AARCH64_TLS_DTPMOD32 1032
959 #define R_AARCH64_TLS_TPREL32 1033
960
961 /* s390 relocations defined by the ABIs */
962 #define R_390_NONE 0 /* No reloc. */
963 #define R_390_8 1 /* Direct 8 bit. */
964 #define R_390_12 2 /* Direct 12 bit. */
965 #define R_390_16 3 /* Direct 16 bit. */
966 #define R_390_32 4 /* Direct 32 bit. */
967 #define R_390_PC32 5 /* PC relative 32 bit. */
968 #define R_390_GOT12 6 /* 12 bit GOT offset. */
969 #define R_390_GOT32 7 /* 32 bit GOT offset. */
970 #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
971 #define R_390_COPY 9 /* Copy symbol at runtime. */
972 #define R_390_GLOB_DAT 10 /* Create GOT entry. */
973 #define R_390_JMP_SLOT 11 /* Create PLT entry. */
974 #define R_390_RELATIVE 12 /* Adjust by program base. */
975 #define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
976 #define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */
977 #define R_390_GOT16 15 /* 16 bit GOT offset. */
978 #define R_390_PC16 16 /* PC relative 16 bit. */
979 #define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */
980 #define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */
981 #define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */
982 #define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */
983 #define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */
984 #define R_390_64 22 /* Direct 64 bit. */
985 #define R_390_PC64 23 /* PC relative 64 bit. */
986 #define R_390_GOT64 24 /* 64 bit GOT offset. */
987 #define R_390_PLT64 25 /* 64 bit PC relative PLT address. */
988 #define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */
989 #define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */
990 #define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */
991 #define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */
992 #define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */
993 #define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */
994 #define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */
995 #define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */
996 #define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */
997 #define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */
998 #define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */
999 #define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */
1000 #define R_390_TLS_GDCALL 38 /* Tag for function call in general
1001 dynamic TLS code. */
1002 #define R_390_TLS_LDCALL 39 /* Tag for function call in local
1003 dynamic TLS code. */
1004 #define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic
1005 thread local data. */
1006 #define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic
1007 thread local data. */
1008 #define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS
1009 block offset. */
1010 #define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS
1011 block offset. */
1012 #define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS
1013 block offset. */
1014 #define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic
1015 thread local data in LD code. */
1016 #define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic
1017 thread local data in LD code. */
1018 #define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for
1019 negated static TLS block offset. */
1020 #define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for
1021 negated static TLS block offset. */
1022 #define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for
1023 negated static TLS block offset. */
1024 #define R_390_TLS_LE32 50 /* 32 bit negated offset relative to
1025 static TLS block. */
1026 #define R_390_TLS_LE64 51 /* 64 bit negated offset relative to
1027 static TLS block. */
1028 #define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS
1029 block. */
1030 #define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS
1031 block. */
1032 #define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */
1033 #define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */
1034 #define R_390_TLS_TPOFF 56 /* Negate offset in static TLS
1035 block. */
1036 #define R_390_20 57
1037 /* Keep this the last entry. */
1038 #define R_390_NUM 58
1039
1040 /* x86-64 relocation types */
1041 #define R_X86_64_NONE 0 /* No reloc */
1042 #define R_X86_64_64 1 /* Direct 64 bit */
1043 #define R_X86_64_PC32 2 /* PC relative 32 bit signed */
1044 #define R_X86_64_GOT32 3 /* 32 bit GOT entry */
1045 #define R_X86_64_PLT32 4 /* 32 bit PLT address */
1046 #define R_X86_64_COPY 5 /* Copy symbol at runtime */
1047 #define R_X86_64_GLOB_DAT 6 /* Create GOT entry */
1048 #define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */
1049 #define R_X86_64_RELATIVE 8 /* Adjust by program base */
1050 #define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative
1051 offset to GOT */
1052 #define R_X86_64_32 10 /* Direct 32 bit zero extended */
1053 #define R_X86_64_32S 11 /* Direct 32 bit sign extended */
1054 #define R_X86_64_16 12 /* Direct 16 bit zero extended */
1055 #define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
1056 #define R_X86_64_8 14 /* Direct 8 bit sign extended */
1057 #define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
1058
1059 #define R_X86_64_NUM 16
1060
1061 /* Legal values for e_flags field of Elf64_Ehdr. */
1062
1063 #define EF_ALPHA_32BIT 1 /* All addresses are below 2GB */
1064
1065 /* HPPA specific definitions. */
1066
1067 /* Legal values for e_flags field of Elf32_Ehdr. */
1068
1069 #define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
1070 #define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
1071 #define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
1072 #define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
1073 #define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
1074 prediction. */
1075 #define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
1076 #define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
1077
1078 /* Defined values for `e_flags & EF_PARISC_ARCH' are: */
1079
1080 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
1081 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
1082 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
1083
1084 /* Additional section indeces. */
1085
1086 #define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
1087 symbols in ANSI C. */
1088 #define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */
1089
1090 /* Legal values for sh_type field of Elf32_Shdr. */
1091
1092 #define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */
1093 #define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */
1094 #define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */
1095
1096 /* Legal values for sh_flags field of Elf32_Shdr. */
1097
1098 #define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */
1099 #define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */
1100 #define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */
1101
1102 /* Legal values for ST_TYPE subfield of st_info (symbol type). */
1103
1104 #define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */
1105
1106 #define STT_HP_OPAQUE (STT_LOOS + 0x1)
1107 #define STT_HP_STUB (STT_LOOS + 0x2)
1108
1109 /* HPPA relocs. */
1110
1111 #define R_PARISC_NONE 0 /* No reloc. */
1112 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
1113 #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
1114 #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
1115 #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
1116 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
1117 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
1118 #define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
1119 #define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
1120 #define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
1121 #define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
1122 #define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
1123 #define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
1124 #define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
1125 #define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
1126 #define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
1127 #define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
1128 #define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */
1129 #define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */
1130 #define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */
1131 #define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */
1132 #define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
1133 #define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
1134 #define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
1135 #define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
1136 #define R_PARISC_FPTR64 64 /* 64 bits function address. */
1137 #define R_PARISC_PLABEL32 65 /* 32 bits function address. */
1138 #define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
1139 #define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
1140 #define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
1141 #define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
1142 #define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
1143 #define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
1144 #define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
1145 #define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
1146 #define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
1147 #define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */
1148 #define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */
1149 #define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */
1150 #define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */
1151 #define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
1152 #define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
1153 #define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
1154 #define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
1155 #define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
1156 #define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
1157 #define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
1158 #define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
1159 #define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
1160 #define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
1161 #define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
1162 #define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
1163 #define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
1164 #define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
1165 #define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
1166 #define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
1167 #define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
1168 #define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
1169 #define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
1170 #define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
1171 #define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
1172 #define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
1173 #define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
1174 #define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
1175 #define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
1176 #define R_PARISC_LORESERVE 128
1177 #define R_PARISC_COPY 128 /* Copy relocation. */
1178 #define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
1179 #define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
1180 #define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
1181 #define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
1182 #define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
1183 #define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
1184 #define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
1185 #define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
1186 #define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
1187 #define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
1188 #define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
1189 #define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
1190 #define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
1191 #define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
1192 #define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
1193 #define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
1194 #define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
1195 #define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
1196 #define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
1197 #define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
1198 #define R_PARISC_HIRESERVE 255
1199
1200 /* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
1201
1202 #define PT_HP_TLS (PT_LOOS + 0x0)
1203 #define PT_HP_CORE_NONE (PT_LOOS + 0x1)
1204 #define PT_HP_CORE_VERSION (PT_LOOS + 0x2)
1205 #define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
1206 #define PT_HP_CORE_COMM (PT_LOOS + 0x4)
1207 #define PT_HP_CORE_PROC (PT_LOOS + 0x5)
1208 #define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6)
1209 #define PT_HP_CORE_STACK (PT_LOOS + 0x7)
1210 #define PT_HP_CORE_SHM (PT_LOOS + 0x8)
1211 #define PT_HP_CORE_MMF (PT_LOOS + 0x9)
1212 #define PT_HP_PARALLEL (PT_LOOS + 0x10)
1213 #define PT_HP_FASTBIND (PT_LOOS + 0x11)
1214 #define PT_HP_OPT_ANNOT (PT_LOOS + 0x12)
1215 #define PT_HP_HSL_ANNOT (PT_LOOS + 0x13)
1216 #define PT_HP_STACK (PT_LOOS + 0x14)
1217
1218 #define PT_PARISC_ARCHEXT 0x70000000
1219 #define PT_PARISC_UNWIND 0x70000001
1220
1221 /* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
1222
1223 #define PF_PARISC_SBP 0x08000000
1224
1225 #define PF_HP_PAGE_SIZE 0x00100000
1226 #define PF_HP_FAR_SHARED 0x00200000
1227 #define PF_HP_NEAR_SHARED 0x00400000
1228 #define PF_HP_CODE 0x01000000
1229 #define PF_HP_MODIFY 0x02000000
1230 #define PF_HP_LAZYSWAP 0x04000000
1231 #define PF_HP_SBP 0x08000000
1232
1233 /* IA-64 specific declarations. */
1234
1235 /* Processor specific flags for the Ehdr e_flags field. */
1236 #define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */
1237 #define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */
1238 #define EF_IA_64_ARCH 0xff000000 /* arch. version mask */
1239
1240 /* Processor specific values for the Phdr p_type field. */
1241 #define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */
1242 #define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */
1243
1244 /* Processor specific flags for the Phdr p_flags field. */
1245 #define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */
1246
1247 /* Processor specific values for the Shdr sh_type field. */
1248 #define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */
1249 #define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */
1250
1251 /* Processor specific flags for the Shdr sh_flags field. */
1252 #define SHF_IA_64_SHORT 0x10000000 /* section near gp */
1253 #define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */
1254
1255 /* Processor specific values for the Dyn d_tag field. */
1256 #define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0)
1257 #define DT_IA_64_NUM 1
1258
1259 /* IA-64 relocations. */
1260 #define R_IA64_NONE 0x00 /* none */
1261 #define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */
1262 #define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */
1263 #define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */
1264 #define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */
1265 #define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */
1266 #define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */
1267 #define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */
1268 #define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */
1269 #define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */
1270 #define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */
1271 #define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */
1272 #define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */
1273 #define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */
1274 #define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */
1275 #define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */
1276 #define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */
1277 #define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */
1278 #define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */
1279 #define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */
1280 #define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */
1281 #define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */
1282 #define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */
1283 #define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */
1284 #define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */
1285 #define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */
1286 #define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */
1287 #define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */
1288 #define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */
1289 #define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */
1290 #define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */
1291 #define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */
1292 #define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */
1293 #define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */
1294 #define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */
1295 #define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */
1296 #define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */
1297 #define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */
1298 #define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */
1299 #define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */
1300 #define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */
1301 #define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */
1302 #define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */
1303 #define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */
1304 #define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */
1305 #define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */
1306 #define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */
1307 #define R_IA64_REL32MSB 0x6c /* data 4 + REL */
1308 #define R_IA64_REL32LSB 0x6d /* data 4 + REL */
1309 #define R_IA64_REL64MSB 0x6e /* data 8 + REL */
1310 #define R_IA64_REL64LSB 0x6f /* data 8 + REL */
1311 #define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */
1312 #define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */
1313 #define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */
1314 #define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */
1315 #define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */
1316 #define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */
1317 #define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */
1318 #define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */
1319 #define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */
1320 #define R_IA64_COPY 0x84 /* copy relocation */
1321 #define R_IA64_SUB 0x85 /* Addend and symbol difference */
1322 #define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */
1323 #define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */
1324 #define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */
1325 #define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */
1326 #define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */
1327 #define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */
1328 #define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */
1329 #define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */
1330 #define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */
1331 #define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */
1332 #define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */
1333 #define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */
1334 #define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */
1335 #define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */
1336 #define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */
1337 #define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */
1338 #define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */
1339 #define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */
1340 #define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */
1341
1342 /* RISC-V relocations. */
1343 #define R_RISCV_NONE 0
1344 #define R_RISCV_32 1
1345 #define R_RISCV_64 2
1346 #define R_RISCV_RELATIVE 3
1347 #define R_RISCV_COPY 4
1348 #define R_RISCV_JUMP_SLOT 5
1349 #define R_RISCV_TLS_DTPMOD32 6
1350 #define R_RISCV_TLS_DTPMOD64 7
1351 #define R_RISCV_TLS_DTPREL32 8
1352 #define R_RISCV_TLS_DTPREL64 9
1353 #define R_RISCV_TLS_TPREL32 10
1354 #define R_RISCV_TLS_TPREL64 11
1355 #define R_RISCV_BRANCH 16
1356 #define R_RISCV_JAL 17
1357 #define R_RISCV_CALL 18
1358 #define R_RISCV_CALL_PLT 19
1359 #define R_RISCV_GOT_HI20 20
1360 #define R_RISCV_TLS_GOT_HI20 21
1361 #define R_RISCV_TLS_GD_HI20 22
1362 #define R_RISCV_PCREL_HI20 23
1363 #define R_RISCV_PCREL_LO12_I 24
1364 #define R_RISCV_PCREL_LO12_S 25
1365 #define R_RISCV_HI20 26
1366 #define R_RISCV_LO12_I 27
1367 #define R_RISCV_LO12_S 28
1368 #define R_RISCV_TPREL_HI20 29
1369 #define R_RISCV_TPREL_LO12_I 30
1370 #define R_RISCV_TPREL_LO12_S 31
1371 #define R_RISCV_TPREL_ADD 32
1372 #define R_RISCV_ADD8 33
1373 #define R_RISCV_ADD16 34
1374 #define R_RISCV_ADD32 35
1375 #define R_RISCV_ADD64 36
1376 #define R_RISCV_SUB8 37
1377 #define R_RISCV_SUB16 38
1378 #define R_RISCV_SUB32 39
1379 #define R_RISCV_SUB64 40
1380 #define R_RISCV_GNU_VTINHERIT 41
1381 #define R_RISCV_GNU_VTENTRY 42
1382 #define R_RISCV_ALIGN 43
1383 #define R_RISCV_RVC_BRANCH 44
1384 #define R_RISCV_RVC_JUMP 45
1385 #define R_RISCV_RVC_LUI 46
1386 #define R_RISCV_GPREL_I 47
1387 #define R_RISCV_GPREL_S 48
1388 #define R_RISCV_TPREL_I 49
1389 #define R_RISCV_TPREL_S 50
1390 #define R_RISCV_RELAX 51
1391 #define R_RISCV_SUB6 52
1392 #define R_RISCV_SET6 53
1393 #define R_RISCV_SET8 54
1394 #define R_RISCV_SET16 55
1395 #define R_RISCV_SET32 56
1396
1397 /* RISC-V ELF Flags. */
1398 #define EF_RISCV_RVC 0x0001
1399 #define EF_RISCV_FLOAT_ABI 0x0006
1400 #define EF_RISCV_FLOAT_ABI_SOFT 0x0000
1401 #define EF_RISCV_FLOAT_ABI_SINGLE 0x0002
1402 #define EF_RISCV_FLOAT_ABI_DOUBLE 0x0004
1403 #define EF_RISCV_FLOAT_ABI_QUAD 0x0006
1404 #define EF_RISCV_RVE 0x0008
1405 #define EF_RISCV_TSO 0x0010
1406
1407 typedef struct elf32_rel {
1408 Elf32_Addr r_offset;
1409 Elf32_Word r_info;
1410 } Elf32_Rel;
1411
1412 typedef struct elf64_rel {
1413 Elf64_Addr r_offset; /* Location at which to apply the action */
1414 Elf64_Xword r_info; /* index and type of relocation */
1415 } Elf64_Rel;
1416
1417 typedef struct elf32_rela{
1418 Elf32_Addr r_offset;
1419 Elf32_Word r_info;
1420 Elf32_Sword r_addend;
1421 } Elf32_Rela;
1422
1423 typedef struct elf64_rela {
1424 Elf64_Addr r_offset; /* Location at which to apply the action */
1425 Elf64_Xword r_info; /* index and type of relocation */
1426 Elf64_Sxword r_addend; /* Constant addend used to compute value */
1427 } Elf64_Rela;
1428
1429 typedef struct elf32_sym{
1430 Elf32_Word st_name;
1431 Elf32_Addr st_value;
1432 Elf32_Word st_size;
1433 unsigned char st_info;
1434 unsigned char st_other;
1435 Elf32_Half st_shndx;
1436 } Elf32_Sym;
1437
1438 typedef struct elf64_sym {
1439 Elf64_Word st_name; /* Symbol name, index in string tbl */
1440 unsigned char st_info; /* Type and binding attributes */
1441 unsigned char st_other; /* No defined meaning, 0 */
1442 Elf64_Half st_shndx; /* Associated section index */
1443 Elf64_Addr st_value; /* Value of the symbol */
1444 Elf64_Xword st_size; /* Associated symbol size */
1445 } Elf64_Sym;
1446
1447
1448 #define EI_NIDENT 16
1449
1450 /* Special value for e_phnum. This indicates that the real number of
1451 program headers is too large to fit into e_phnum. Instead the real
1452 value is in the field sh_info of section 0. */
1453 #define PN_XNUM 0xffff
1454
1455 typedef struct elf32_hdr{
1456 unsigned char e_ident[EI_NIDENT];
1457 Elf32_Half e_type;
1458 Elf32_Half e_machine;
1459 Elf32_Word e_version;
1460 Elf32_Addr e_entry; /* Entry point */
1461 Elf32_Off e_phoff;
1462 Elf32_Off e_shoff;
1463 Elf32_Word e_flags;
1464 Elf32_Half e_ehsize;
1465 Elf32_Half e_phentsize;
1466 Elf32_Half e_phnum;
1467 Elf32_Half e_shentsize;
1468 Elf32_Half e_shnum;
1469 Elf32_Half e_shstrndx;
1470 } Elf32_Ehdr;
1471
1472 typedef struct elf64_hdr {
1473 unsigned char e_ident[16]; /* ELF "magic number" */
1474 Elf64_Half e_type;
1475 Elf64_Half e_machine;
1476 Elf64_Word e_version;
1477 Elf64_Addr e_entry; /* Entry point virtual address */
1478 Elf64_Off e_phoff; /* Program header table file offset */
1479 Elf64_Off e_shoff; /* Section header table file offset */
1480 Elf64_Word e_flags;
1481 Elf64_Half e_ehsize;
1482 Elf64_Half e_phentsize;
1483 Elf64_Half e_phnum;
1484 Elf64_Half e_shentsize;
1485 Elf64_Half e_shnum;
1486 Elf64_Half e_shstrndx;
1487 } Elf64_Ehdr;
1488
1489 /* These constants define the permissions on sections in the program
1490 header, p_flags. */
1491 #define PF_R 0x4
1492 #define PF_W 0x2
1493 #define PF_X 0x1
1494
1495 typedef struct elf32_phdr{
1496 Elf32_Word p_type;
1497 Elf32_Off p_offset;
1498 Elf32_Addr p_vaddr;
1499 Elf32_Addr p_paddr;
1500 Elf32_Word p_filesz;
1501 Elf32_Word p_memsz;
1502 Elf32_Word p_flags;
1503 Elf32_Word p_align;
1504 } Elf32_Phdr;
1505
1506 typedef struct elf64_phdr {
1507 Elf64_Word p_type;
1508 Elf64_Word p_flags;
1509 Elf64_Off p_offset; /* Segment file offset */
1510 Elf64_Addr p_vaddr; /* Segment virtual address */
1511 Elf64_Addr p_paddr; /* Segment physical address */
1512 Elf64_Xword p_filesz; /* Segment size in file */
1513 Elf64_Xword p_memsz; /* Segment size in memory */
1514 Elf64_Xword p_align; /* Segment alignment, file & memory */
1515 } Elf64_Phdr;
1516
1517 /* sh_type */
1518 #define SHT_NULL 0
1519 #define SHT_PROGBITS 1
1520 #define SHT_SYMTAB 2
1521 #define SHT_STRTAB 3
1522 #define SHT_RELA 4
1523 #define SHT_HASH 5
1524 #define SHT_DYNAMIC 6
1525 #define SHT_NOTE 7
1526 #define SHT_NOBITS 8
1527 #define SHT_REL 9
1528 #define SHT_SHLIB 10
1529 #define SHT_DYNSYM 11
1530 #define SHT_NUM 12
1531 #define SHT_LOPROC 0x70000000
1532 #define SHT_HIPROC 0x7fffffff
1533 #define SHT_LOUSER 0x80000000
1534 #define SHT_HIUSER 0xffffffff
1535 #define SHT_MIPS_LIST 0x70000000
1536 #define SHT_MIPS_CONFLICT 0x70000002
1537 #define SHT_MIPS_GPTAB 0x70000003
1538 #define SHT_MIPS_UCODE 0x70000004
1539
1540 /* sh_flags */
1541 #define SHF_WRITE 0x1
1542 #define SHF_ALLOC 0x2
1543 #define SHF_EXECINSTR 0x4
1544 #define SHF_MASKPROC 0xf0000000
1545 #define SHF_MIPS_GPREL 0x10000000
1546
1547 /* special section indexes */
1548 #define SHN_UNDEF 0
1549 #define SHN_LORESERVE 0xff00
1550 #define SHN_LOPROC 0xff00
1551 #define SHN_HIPROC 0xff1f
1552 #define SHN_ABS 0xfff1
1553 #define SHN_COMMON 0xfff2
1554 #define SHN_HIRESERVE 0xffff
1555 #define SHN_MIPS_ACCOMON 0xff00
1556
1557 typedef struct elf32_shdr {
1558 Elf32_Word sh_name;
1559 Elf32_Word sh_type;
1560 Elf32_Word sh_flags;
1561 Elf32_Addr sh_addr;
1562 Elf32_Off sh_offset;
1563 Elf32_Word sh_size;
1564 Elf32_Word sh_link;
1565 Elf32_Word sh_info;
1566 Elf32_Word sh_addralign;
1567 Elf32_Word sh_entsize;
1568 } Elf32_Shdr;
1569
1570 typedef struct elf64_shdr {
1571 Elf64_Word sh_name; /* Section name, index in string tbl */
1572 Elf64_Word sh_type; /* Type of section */
1573 Elf64_Xword sh_flags; /* Miscellaneous section attributes */
1574 Elf64_Addr sh_addr; /* Section virtual addr at execution */
1575 Elf64_Off sh_offset; /* Section file offset */
1576 Elf64_Xword sh_size; /* Size of section in bytes */
1577 Elf64_Word sh_link; /* Index of another section */
1578 Elf64_Word sh_info; /* Additional section information */
1579 Elf64_Xword sh_addralign; /* Section alignment */
1580 Elf64_Xword sh_entsize; /* Entry size if section holds table */
1581 } Elf64_Shdr;
1582
1583 #define EI_MAG0 0 /* e_ident[] indexes */
1584 #define EI_MAG1 1
1585 #define EI_MAG2 2
1586 #define EI_MAG3 3
1587 #define EI_CLASS 4
1588 #define EI_DATA 5
1589 #define EI_VERSION 6
1590 #define EI_OSABI 7
1591 #define EI_PAD 8
1592
1593 #define ELFOSABI_NONE 0 /* UNIX System V ABI */
1594 #define ELFOSABI_SYSV 0 /* Alias. */
1595 #define ELFOSABI_HPUX 1 /* HP-UX */
1596 #define ELFOSABI_NETBSD 2 /* NetBSD. */
1597 #define ELFOSABI_LINUX 3 /* Linux. */
1598 #define ELFOSABI_SOLARIS 6 /* Sun Solaris. */
1599 #define ELFOSABI_AIX 7 /* IBM AIX. */
1600 #define ELFOSABI_IRIX 8 /* SGI Irix. */
1601 #define ELFOSABI_FREEBSD 9 /* FreeBSD. */
1602 #define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */
1603 #define ELFOSABI_MODESTO 11 /* Novell Modesto. */
1604 #define ELFOSABI_OPENBSD 12 /* OpenBSD. */
1605 #define ELFOSABI_ARM_FDPIC 65 /* ARM FDPIC */
1606 #define ELFOSABI_ARM 97 /* ARM */
1607 #define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
1608
1609 #define ELFMAG0 0x7f /* EI_MAG */
1610 #define ELFMAG1 'E'
1611 #define ELFMAG2 'L'
1612 #define ELFMAG3 'F'
1613 #define ELFMAG "\177ELF"
1614 #define SELFMAG 4
1615
1616 #define ELFCLASSNONE 0 /* EI_CLASS */
1617 #define ELFCLASS32 1
1618 #define ELFCLASS64 2
1619 #define ELFCLASSNUM 3
1620
1621 #define ELFDATANONE 0 /* e_ident[EI_DATA] */
1622 #define ELFDATA2LSB 1
1623 #define ELFDATA2MSB 2
1624
1625 #define EV_NONE 0 /* e_version, EI_VERSION */
1626 #define EV_CURRENT 1
1627 #define EV_NUM 2
1628
1629 /* Notes used in ET_CORE */
1630 #define NT_PRSTATUS 1
1631 #define NT_FPREGSET 2
1632 #define NT_PRFPREG 2
1633 #define NT_PRPSINFO 3
1634 #define NT_TASKSTRUCT 4
1635 #define NT_AUXV 6
1636 #define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */
1637 #define NT_S390_GS_CB 0x30b /* s390 guarded storage registers */
1638 #define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31 */
1639 #define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15 (lower half) */
1640 #define NT_S390_PREFIX 0x305 /* s390 prefix register */
1641 #define NT_S390_CTRS 0x304 /* s390 control registers */
1642 #define NT_S390_TODPREG 0x303 /* s390 TOD programmable register */
1643 #define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */
1644 #define NT_S390_TIMER 0x301 /* s390 timer register */
1645 #define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
1646 #define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
1647 #define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
1648 #define NT_ARM_VFP 0x400 /* ARM VFP/NEON registers */
1649 #define NT_ARM_TLS 0x401 /* ARM TLS register */
1650 #define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */
1651 #define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */
1652 #define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */
1653 #define NT_ARM_SVE 0x405 /* ARM Scalable Vector Extension regs */
1654
1655 /*
1656 * Physical entry point into the kernel.
1657 *
1658 * 32bit entry point into the kernel. When requested to launch the
1659 * guest kernel, use this entry point to launch the guest in 32-bit
1660 * protected mode with paging disabled.
1661 *
1662 * [ Corresponding definition in Linux kernel: include/xen/interface/elfnote.h ]
1663 */
1664 #define XEN_ELFNOTE_PHYS32_ENTRY 18 /* 0x12 */
1665
1666 /* Note header in a PT_NOTE section */
1667 typedef struct elf32_note {
1668 Elf32_Word n_namesz; /* Name size */
1669 Elf32_Word n_descsz; /* Content size */
1670 Elf32_Word n_type; /* Content type */
1671 } Elf32_Nhdr;
1672
1673 /* Note header in a PT_NOTE section */
1674 typedef struct elf64_note {
1675 Elf64_Word n_namesz; /* Name size */
1676 Elf64_Word n_descsz; /* Content size */
1677 Elf64_Word n_type; /* Content type */
1678 } Elf64_Nhdr;
1679
1680
1681 /* This data structure represents a PT_LOAD segment. */
1682 struct elf32_fdpic_loadseg {
1683 /* Core address to which the segment is mapped. */
1684 Elf32_Addr addr;
1685 /* VMA recorded in the program header. */
1686 Elf32_Addr p_vaddr;
1687 /* Size of this segment in memory. */
1688 Elf32_Word p_memsz;
1689 };
1690 struct elf32_fdpic_loadmap {
1691 /* Protocol version number, must be zero. */
1692 Elf32_Half version;
1693 /* Number of segments in this map. */
1694 Elf32_Half nsegs;
1695 /* The actual memory map. */
1696 struct elf32_fdpic_loadseg segs[/*nsegs*/];
1697 };
1698
1699 #ifdef ELF_CLASS
1700 #if ELF_CLASS == ELFCLASS32
1701
1702 #define elfhdr elf32_hdr
1703 #define elf_phdr elf32_phdr
1704 #define elf_note elf32_note
1705 #define elf_shdr elf32_shdr
1706 #define elf_sym elf32_sym
1707 #define elf_addr_t Elf32_Off
1708 #define elf_rela elf32_rela
1709
1710 #ifdef ELF_USES_RELOCA
1711 # define ELF_RELOC Elf32_Rela
1712 #else
1713 # define ELF_RELOC Elf32_Rel
1714 #endif
1715
1716 #else
1717
1718 #define elfhdr elf64_hdr
1719 #define elf_phdr elf64_phdr
1720 #define elf_note elf64_note
1721 #define elf_shdr elf64_shdr
1722 #define elf_sym elf64_sym
1723 #define elf_addr_t Elf64_Off
1724 #define elf_rela elf64_rela
1725
1726 #ifdef ELF_USES_RELOCA
1727 # define ELF_RELOC Elf64_Rela
1728 #else
1729 # define ELF_RELOC Elf64_Rel
1730 #endif
1731
1732 #endif /* ELF_CLASS */
1733
1734 #ifndef ElfW
1735 # if ELF_CLASS == ELFCLASS32
1736 # define ElfW(x) Elf32_ ## x
1737 # define ELFW(x) ELF32_ ## x
1738 # else
1739 # define ElfW(x) Elf64_ ## x
1740 # define ELFW(x) ELF64_ ## x
1741 # endif
1742 #endif
1743
1744 #endif /* ELF_CLASS */
1745
1746
1747 #endif /* QEMU_ELF_H */