pc: exit QEMU if number of slots more than supported 256
[qemu.git] / include / hw / acpi / acpi.h
1 #ifndef QEMU_HW_ACPI_H
2 #define QEMU_HW_ACPI_H
3 /*
4 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see
19 * <http://www.gnu.org/licenses/>.
20 */
21
22 #include "qapi/error.h"
23 #include "qemu/typedefs.h"
24 #include "qemu/notify.h"
25 #include "qemu/option.h"
26 #include "exec/memory.h"
27 #include "hw/irq.h"
28
29 /*
30 * current device naming scheme supports
31 * only upto 256 memory devices
32 */
33 #define ACPI_MAX_RAM_SLOTS 256
34
35 /* from linux include/acpi/actype.h */
36 /* Default ACPI register widths */
37
38 #define ACPI_GPE_REGISTER_WIDTH 8
39 #define ACPI_PM1_REGISTER_WIDTH 16
40 #define ACPI_PM2_REGISTER_WIDTH 8
41 #define ACPI_PM_TIMER_WIDTH 32
42
43 /* PM Timer ticks per second (HZ) */
44 #define PM_TIMER_FREQUENCY 3579545
45
46
47 /* ACPI fixed hardware registers */
48
49 /* from linux/drivers/acpi/acpica/aclocal.h */
50 /* Masks used to access the bit_registers */
51
52 /* PM1x_STS */
53 #define ACPI_BITMASK_TIMER_STATUS 0x0001
54 #define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010
55 #define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020
56 #define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100
57 #define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200
58 #define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400
59 #define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000 /* ACPI 3.0 */
60 #define ACPI_BITMASK_WAKE_STATUS 0x8000
61
62 #define ACPI_BITMASK_ALL_FIXED_STATUS (\
63 ACPI_BITMASK_TIMER_STATUS | \
64 ACPI_BITMASK_BUS_MASTER_STATUS | \
65 ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
66 ACPI_BITMASK_POWER_BUTTON_STATUS | \
67 ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
68 ACPI_BITMASK_RT_CLOCK_STATUS | \
69 ACPI_BITMASK_WAKE_STATUS)
70
71 /* PM1x_EN */
72 #define ACPI_BITMASK_TIMER_ENABLE 0x0001
73 #define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
74 #define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100
75 #define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200
76 #define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400
77 #define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000 /* ACPI 3.0 */
78
79 #define ACPI_BITMASK_PM1_COMMON_ENABLED ( \
80 ACPI_BITMASK_RT_CLOCK_ENABLE | \
81 ACPI_BITMASK_POWER_BUTTON_ENABLE | \
82 ACPI_BITMASK_GLOBAL_LOCK_ENABLE | \
83 ACPI_BITMASK_TIMER_ENABLE)
84
85 /* PM1x_CNT */
86 #define ACPI_BITMASK_SCI_ENABLE 0x0001
87 #define ACPI_BITMASK_BUS_MASTER_RLD 0x0002
88 #define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004
89 #define ACPI_BITMASK_SLEEP_TYPE 0x1C00
90 #define ACPI_BITMASK_SLEEP_ENABLE 0x2000
91
92 /* PM2_CNT */
93 #define ACPI_BITMASK_ARB_DISABLE 0x0001
94
95 /* structs */
96 typedef struct ACPIPMTimer ACPIPMTimer;
97 typedef struct ACPIPM1EVT ACPIPM1EVT;
98 typedef struct ACPIPM1CNT ACPIPM1CNT;
99 typedef struct ACPIGPE ACPIGPE;
100 typedef struct ACPIREGS ACPIREGS;
101
102 typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
103
104 struct ACPIPMTimer {
105 QEMUTimer *timer;
106 MemoryRegion io;
107 int64_t overflow_time;
108
109 acpi_update_sci_fn update_sci;
110 };
111
112 struct ACPIPM1EVT {
113 MemoryRegion io;
114 uint16_t sts;
115 uint16_t en;
116 acpi_update_sci_fn update_sci;
117 };
118
119 struct ACPIPM1CNT {
120 MemoryRegion io;
121 uint16_t cnt;
122 uint8_t s4_val;
123 };
124
125 struct ACPIGPE {
126 uint8_t len;
127
128 uint8_t *sts;
129 uint8_t *en;
130 };
131
132 struct ACPIREGS {
133 ACPIPMTimer tmr;
134 ACPIGPE gpe;
135 struct {
136 ACPIPM1EVT evt;
137 ACPIPM1CNT cnt;
138 } pm1;
139 Notifier wakeup;
140 };
141
142 /* PM_TMR */
143 void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
144 void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
145 void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
146 MemoryRegion *parent);
147 void acpi_pm_tmr_reset(ACPIREGS *ar);
148
149 #include "qemu/timer.h"
150 static inline int64_t acpi_pm_tmr_get_clock(void)
151 {
152 return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY,
153 get_ticks_per_sec());
154 }
155
156 /* PM1a_EVT: piix and ich9 don't implement PM1b. */
157 uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
158 void acpi_pm1_evt_power_down(ACPIREGS *ar);
159 void acpi_pm1_evt_reset(ACPIREGS *ar);
160 void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
161 MemoryRegion *parent);
162
163 /* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */
164 void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, uint8_t s4_val);
165 void acpi_pm1_cnt_update(ACPIREGS *ar,
166 bool sci_enable, bool sci_disable);
167 void acpi_pm1_cnt_reset(ACPIREGS *ar);
168
169 /* GPE0 */
170 void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
171 void acpi_gpe_reset(ACPIREGS *ar);
172
173 void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
174 uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
175
176 void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq);
177
178 /* acpi.c */
179 extern int acpi_enabled;
180 extern char unsigned *acpi_tables;
181 extern size_t acpi_tables_len;
182
183 uint8_t *acpi_table_first(void);
184 uint8_t *acpi_table_next(uint8_t *current);
185 unsigned acpi_table_len(void *current);
186 void acpi_table_add(const QemuOpts *opts, Error **errp);
187 void acpi_table_add_builtin(const QemuOpts *opts, Error **errp);
188
189 #endif /* !QEMU_HW_ACPI_H */