hw/arm/virt-acpi-build: name GIC CPU Interface Structure appropriately
[qemu.git] / include / hw / arm / allwinner-a10.h
1 #ifndef ALLWINNER_H_
2
3 #include "qemu-common.h"
4 #include "qemu/error-report.h"
5 #include "hw/char/serial.h"
6 #include "hw/arm/arm.h"
7 #include "hw/timer/allwinner-a10-pit.h"
8 #include "hw/intc/allwinner-a10-pic.h"
9 #include "hw/net/allwinner_emac.h"
10 #include "hw/ide/pci.h"
11 #include "hw/ide/ahci.h"
12
13 #include "sysemu/sysemu.h"
14 #include "exec/address-spaces.h"
15
16
17 #define AW_A10_PIC_REG_BASE 0x01c20400
18 #define AW_A10_PIT_REG_BASE 0x01c20c00
19 #define AW_A10_UART0_REG_BASE 0x01c28000
20 #define AW_A10_EMAC_BASE 0x01c0b000
21 #define AW_A10_SATA_BASE 0x01c18000
22
23 #define AW_A10_SDRAM_BASE 0x40000000
24
25 #define TYPE_AW_A10 "allwinner-a10"
26 #define AW_A10(obj) OBJECT_CHECK(AwA10State, (obj), TYPE_AW_A10)
27
28 typedef struct AwA10State {
29 /*< private >*/
30 DeviceState parent_obj;
31 /*< public >*/
32
33 ARMCPU cpu;
34 qemu_irq irq[AW_A10_PIC_INT_NR];
35 AwA10PITState timer;
36 AwA10PICState intc;
37 AwEmacState emac;
38 AllwinnerAHCIState sata;
39 } AwA10State;
40
41 #define ALLWINNER_H_
42 #endif