Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.2-pull-request...
[qemu.git] / include / hw / arm / npcm7xx.h
1 /*
2 * Nuvoton NPCM7xx SoC family.
3 *
4 * Copyright 2020 Google LLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 */
16 #ifndef NPCM7XX_H
17 #define NPCM7XX_H
18
19 #include "hw/boards.h"
20 #include "hw/adc/npcm7xx_adc.h"
21 #include "hw/core/split-irq.h"
22 #include "hw/cpu/a9mpcore.h"
23 #include "hw/gpio/npcm7xx_gpio.h"
24 #include "hw/i2c/npcm7xx_smbus.h"
25 #include "hw/mem/npcm7xx_mc.h"
26 #include "hw/misc/npcm7xx_clk.h"
27 #include "hw/misc/npcm7xx_gcr.h"
28 #include "hw/misc/npcm7xx_mft.h"
29 #include "hw/misc/npcm7xx_pwm.h"
30 #include "hw/misc/npcm7xx_rng.h"
31 #include "hw/net/npcm7xx_emc.h"
32 #include "hw/nvram/npcm7xx_otp.h"
33 #include "hw/timer/npcm7xx_timer.h"
34 #include "hw/ssi/npcm7xx_fiu.h"
35 #include "hw/usb/hcd-ehci.h"
36 #include "hw/usb/hcd-ohci.h"
37 #include "target/arm/cpu.h"
38
39 #define NPCM7XX_MAX_NUM_CPUS (2)
40
41 /* The first half of the address space is reserved for DDR4 DRAM. */
42 #define NPCM7XX_DRAM_BA (0x00000000)
43 #define NPCM7XX_DRAM_SZ (2 * GiB)
44
45 /* Magic addresses for setting up direct kernel booting and SMP boot stubs. */
46 #define NPCM7XX_LOADER_START (0x00000000) /* Start of SDRAM */
47 #define NPCM7XX_SMP_LOADER_START (0xffff0000) /* Boot ROM */
48 #define NPCM7XX_SMP_BOOTREG_ADDR (0xf080013c) /* GCR.SCRPAD */
49 #define NPCM7XX_GIC_CPU_IF_ADDR (0xf03fe100) /* GIC within A9 */
50 #define NPCM7XX_BOARD_SETUP_ADDR (0xffff1000) /* Boot ROM */
51
52 #define NPCM7XX_NR_PWM_MODULES 2
53
54 typedef struct NPCM7xxMachine {
55 MachineState parent;
56 /*
57 * PWM fan splitter. each splitter connects to one PWM output and
58 * multiple MFT inputs.
59 */
60 SplitIRQ fan_splitter[NPCM7XX_NR_PWM_MODULES *
61 NPCM7XX_PWM_PER_MODULE];
62 } NPCM7xxMachine;
63
64 #define TYPE_NPCM7XX_MACHINE MACHINE_TYPE_NAME("npcm7xx")
65 #define NPCM7XX_MACHINE(obj) \
66 OBJECT_CHECK(NPCM7xxMachine, (obj), TYPE_NPCM7XX_MACHINE)
67
68 typedef struct NPCM7xxMachineClass {
69 MachineClass parent;
70
71 const char *soc_type;
72 } NPCM7xxMachineClass;
73
74 #define NPCM7XX_MACHINE_CLASS(klass) \
75 OBJECT_CLASS_CHECK(NPCM7xxMachineClass, (klass), TYPE_NPCM7XX_MACHINE)
76 #define NPCM7XX_MACHINE_GET_CLASS(obj) \
77 OBJECT_GET_CLASS(NPCM7xxMachineClass, (obj), TYPE_NPCM7XX_MACHINE)
78
79 typedef struct NPCM7xxState {
80 DeviceState parent;
81
82 ARMCPU cpu[NPCM7XX_MAX_NUM_CPUS];
83 A9MPPrivState a9mpcore;
84
85 MemoryRegion sram;
86 MemoryRegion irom;
87 MemoryRegion ram3;
88 MemoryRegion *dram;
89
90 NPCM7xxGCRState gcr;
91 NPCM7xxCLKState clk;
92 NPCM7xxTimerCtrlState tim[3];
93 NPCM7xxADCState adc;
94 NPCM7xxPWMState pwm[NPCM7XX_NR_PWM_MODULES];
95 NPCM7xxMFTState mft[8];
96 NPCM7xxOTPState key_storage;
97 NPCM7xxOTPState fuse_array;
98 NPCM7xxMCState mc;
99 NPCM7xxRNGState rng;
100 NPCM7xxGPIOState gpio[8];
101 NPCM7xxSMBusState smbus[16];
102 EHCISysBusState ehci;
103 OHCISysBusState ohci;
104 NPCM7xxFIUState fiu[2];
105 NPCM7xxEMCState emc[2];
106 } NPCM7xxState;
107
108 #define TYPE_NPCM7XX "npcm7xx"
109 #define NPCM7XX(obj) OBJECT_CHECK(NPCM7xxState, (obj), TYPE_NPCM7XX)
110
111 #define TYPE_NPCM730 "npcm730"
112 #define TYPE_NPCM750 "npcm750"
113
114 typedef struct NPCM7xxClass {
115 DeviceClass parent;
116
117 /* Bitmask of modules that are permanently disabled on this chip. */
118 uint32_t disabled_modules;
119 /* Number of CPU cores enabled in this SoC class (may be 1 or 2). */
120 uint32_t num_cpus;
121 } NPCM7xxClass;
122
123 #define NPCM7XX_CLASS(klass) \
124 OBJECT_CLASS_CHECK(NPCM7xxClass, (klass), TYPE_NPCM7XX)
125 #define NPCM7XX_GET_CLASS(obj) \
126 OBJECT_GET_CLASS(NPCM7xxClass, (obj), TYPE_NPCM7XX)
127
128 /**
129 * npcm7xx_load_kernel - Loads memory with everything needed to boot
130 * @machine - The machine containing the SoC to be booted.
131 * @soc - The SoC containing the CPU to be booted.
132 *
133 * This will set up the ARM boot info structure for the specific NPCM7xx
134 * derivative and call arm_load_kernel() to set up loading of the kernel, etc.
135 * into memory, if requested by the user.
136 */
137 void npcm7xx_load_kernel(MachineState *machine, NPCM7xxState *soc);
138
139 #endif /* NPCM7XX_H */