Merge remote-tracking branch 'remotes/vivier/tags/trivial-branch-for-6.2-pull-request...
[qemu.git] / include / hw / arm / stm32f100_soc.h
1 /*
2 * STM32F100 SoC
3 *
4 * Copyright (c) 2021 Alexandre Iooss <erdnaxe@crans.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #ifndef HW_ARM_STM32F100_SOC_H
26 #define HW_ARM_STM32F100_SOC_H
27
28 #include "hw/char/stm32f2xx_usart.h"
29 #include "hw/ssi/stm32f2xx_spi.h"
30 #include "hw/arm/armv7m.h"
31 #include "qom/object.h"
32
33 #define TYPE_STM32F100_SOC "stm32f100-soc"
34 OBJECT_DECLARE_SIMPLE_TYPE(STM32F100State, STM32F100_SOC)
35
36 #define STM_NUM_USARTS 3
37 #define STM_NUM_SPIS 2
38
39 #define FLASH_BASE_ADDRESS 0x08000000
40 #define FLASH_SIZE (128 * 1024)
41 #define SRAM_BASE_ADDRESS 0x20000000
42 #define SRAM_SIZE (8 * 1024)
43
44 struct STM32F100State {
45 /*< private >*/
46 SysBusDevice parent_obj;
47
48 /*< public >*/
49 char *cpu_type;
50
51 ARMv7MState armv7m;
52
53 STM32F2XXUsartState usart[STM_NUM_USARTS];
54 STM32F2XXSPIState spi[STM_NUM_SPIS];
55 };
56
57 #endif