apic: move target-dependent definitions to cpu.h
[qemu.git] / include / hw / char / cadence_uart.h
1 /*
2 * Device model for Cadence UART
3 *
4 * Copyright (c) 2010 Xilinx Inc.
5 * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com)
6 * Copyright (c) 2012 PetaLogix Pty Ltd.
7 * Written by Haibing Ma
8 * M.Habib
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19 #ifndef CADENCE_UART_H
20
21 #include "hw/sysbus.h"
22 #include "sysemu/char.h"
23 #include "qemu/timer.h"
24
25 #define CADENCE_UART_RX_FIFO_SIZE 16
26 #define CADENCE_UART_TX_FIFO_SIZE 16
27
28 #define CADENCE_UART_R_MAX (0x48/4)
29
30 #define TYPE_CADENCE_UART "cadence_uart"
31 #define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \
32 TYPE_CADENCE_UART)
33
34 typedef struct {
35 /*< private >*/
36 SysBusDevice parent_obj;
37
38 /*< public >*/
39 MemoryRegion iomem;
40 uint32_t r[CADENCE_UART_R_MAX];
41 uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE];
42 uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE];
43 uint32_t rx_wpos;
44 uint32_t rx_count;
45 uint32_t tx_count;
46 uint64_t char_tx_time;
47 CharDriverState *chr;
48 qemu_irq irq;
49 QEMUTimer *fifo_trigger_handle;
50 } CadenceUARTState;
51
52 #define CADENCE_UART_H
53 #endif