Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-20211022...
[qemu.git] / include / hw / core / cpu.h
1 /*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20 #ifndef QEMU_CPU_H
21 #define QEMU_CPU_H
22
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/hwaddr.h"
26 #include "exec/memattrs.h"
27 #include "qapi/qapi-types-run-state.h"
28 #include "qemu/bitmap.h"
29 #include "qemu/rcu_queue.h"
30 #include "qemu/queue.h"
31 #include "qemu/thread.h"
32 #include "qemu/plugin.h"
33 #include "qom/object.h"
34
35 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
36 void *opaque);
37
38 /**
39 * vaddr:
40 * Type wide enough to contain any #target_ulong virtual address.
41 */
42 typedef uint64_t vaddr;
43 #define VADDR_PRId PRId64
44 #define VADDR_PRIu PRIu64
45 #define VADDR_PRIo PRIo64
46 #define VADDR_PRIx PRIx64
47 #define VADDR_PRIX PRIX64
48 #define VADDR_MAX UINT64_MAX
49
50 /**
51 * SECTION:cpu
52 * @section_id: QEMU-cpu
53 * @title: CPU Class
54 * @short_description: Base class for all CPUs
55 */
56
57 #define TYPE_CPU "cpu"
58
59 /* Since this macro is used a lot in hot code paths and in conjunction with
60 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
61 * an unchecked cast.
62 */
63 #define CPU(obj) ((CPUState *)(obj))
64
65 typedef struct CPUClass CPUClass;
66 DECLARE_CLASS_CHECKERS(CPUClass, CPU,
67 TYPE_CPU)
68
69 typedef enum MMUAccessType {
70 MMU_DATA_LOAD = 0,
71 MMU_DATA_STORE = 1,
72 MMU_INST_FETCH = 2
73 } MMUAccessType;
74
75 typedef struct CPUWatchpoint CPUWatchpoint;
76
77 /* see tcg-cpu-ops.h */
78 struct TCGCPUOps;
79
80 /* see accel-cpu.h */
81 struct AccelCPUClass;
82
83 /* see sysemu-cpu-ops.h */
84 struct SysemuCPUOps;
85
86 /**
87 * CPUClass:
88 * @class_by_name: Callback to map -cpu command line model name to an
89 * instantiatable CPU type.
90 * @parse_features: Callback to parse command line arguments.
91 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
92 * @has_work: Callback for checking if there is work to do.
93 * @memory_rw_debug: Callback for GDB memory access.
94 * @dump_state: Callback for dumping state.
95 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
96 * @set_pc: Callback for setting the Program Counter register. This
97 * should have the semantics used by the target architecture when
98 * setting the PC from a source such as an ELF file entry point;
99 * for example on Arm it will also set the Thumb mode bit based
100 * on the least significant bit of the new PC value.
101 * If the target behaviour here is anything other than "set
102 * the PC register to the value passed in" then the target must
103 * also implement the synchronize_from_tb hook.
104 * @gdb_read_register: Callback for letting GDB read a register.
105 * @gdb_write_register: Callback for letting GDB write a register.
106 * @gdb_adjust_breakpoint: Callback for adjusting the address of a
107 * breakpoint. Used by AVR to handle a gdb mis-feature with
108 * its Harvard architecture split code and data.
109 * @gdb_num_core_regs: Number of core registers accessible to GDB.
110 * @gdb_core_xml_file: File name for core registers GDB XML description.
111 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
112 * before the insn which triggers a watchpoint rather than after it.
113 * @gdb_arch_name: Optional callback that returns the architecture name known
114 * to GDB. The caller must free the returned string with g_free.
115 * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
116 * gdb stub. Returns a pointer to the XML contents for the specified XML file
117 * or NULL if the CPU doesn't have a dynamically generated content for it.
118 * @disas_set_info: Setup architecture specific components of disassembly info
119 * @adjust_watchpoint_address: Perform a target-specific adjustment to an
120 * address before attempting to match it against watchpoints.
121 * @deprecation_note: If this CPUClass is deprecated, this field provides
122 * related information.
123 *
124 * Represents a CPU family or model.
125 */
126 struct CPUClass {
127 /*< private >*/
128 DeviceClass parent_class;
129 /*< public >*/
130
131 ObjectClass *(*class_by_name)(const char *cpu_model);
132 void (*parse_features)(const char *typename, char *str, Error **errp);
133
134 int reset_dump_flags;
135 bool (*has_work)(CPUState *cpu);
136 int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
137 uint8_t *buf, int len, bool is_write);
138 void (*dump_state)(CPUState *cpu, FILE *, int flags);
139 int64_t (*get_arch_id)(CPUState *cpu);
140 void (*set_pc)(CPUState *cpu, vaddr value);
141 int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
142 int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
143 vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr);
144
145 const char *gdb_core_xml_file;
146 gchar * (*gdb_arch_name)(CPUState *cpu);
147 const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
148
149 void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
150
151 const char *deprecation_note;
152 /* Keep non-pointer data at the end to minimize holes. */
153 int gdb_num_core_regs;
154 bool gdb_stop_before_watchpoint;
155 struct AccelCPUClass *accel_cpu;
156
157 /* when system emulation is not available, this pointer is NULL */
158 const struct SysemuCPUOps *sysemu_ops;
159
160 /* when TCG is not available, this pointer is NULL */
161 const struct TCGCPUOps *tcg_ops;
162
163 /*
164 * if not NULL, this is called in order for the CPUClass to initialize
165 * class data that depends on the accelerator, see accel/accel-common.c.
166 */
167 void (*init_accel_cpu)(struct AccelCPUClass *accel_cpu, CPUClass *cc);
168 };
169
170 /*
171 * Low 16 bits: number of cycles left, used only in icount mode.
172 * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
173 * for this CPU and return to its top level loop (even in non-icount mode).
174 * This allows a single read-compare-cbranch-write sequence to test
175 * for both decrementer underflow and exceptions.
176 */
177 typedef union IcountDecr {
178 uint32_t u32;
179 struct {
180 #ifdef HOST_WORDS_BIGENDIAN
181 uint16_t high;
182 uint16_t low;
183 #else
184 uint16_t low;
185 uint16_t high;
186 #endif
187 } u16;
188 } IcountDecr;
189
190 typedef struct CPUBreakpoint {
191 vaddr pc;
192 int flags; /* BP_* */
193 QTAILQ_ENTRY(CPUBreakpoint) entry;
194 } CPUBreakpoint;
195
196 struct CPUWatchpoint {
197 vaddr vaddr;
198 vaddr len;
199 vaddr hitaddr;
200 MemTxAttrs hitattrs;
201 int flags; /* BP_* */
202 QTAILQ_ENTRY(CPUWatchpoint) entry;
203 };
204
205 #ifdef CONFIG_PLUGIN
206 /*
207 * For plugins we sometime need to save the resolved iotlb data before
208 * the memory regions get moved around by io_writex.
209 */
210 typedef struct SavedIOTLB {
211 hwaddr addr;
212 MemoryRegionSection *section;
213 hwaddr mr_offset;
214 } SavedIOTLB;
215 #endif
216
217 struct KVMState;
218 struct kvm_run;
219
220 struct hax_vcpu_state;
221 struct hvf_vcpu_state;
222
223 #define TB_JMP_CACHE_BITS 12
224 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
225
226 /* work queue */
227
228 /* The union type allows passing of 64 bit target pointers on 32 bit
229 * hosts in a single parameter
230 */
231 typedef union {
232 int host_int;
233 unsigned long host_ulong;
234 void *host_ptr;
235 vaddr target_ptr;
236 } run_on_cpu_data;
237
238 #define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
239 #define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
240 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
241 #define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
242 #define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
243
244 typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_cpu_data data);
245
246 struct qemu_work_item;
247
248 #define CPU_UNSET_NUMA_NODE_ID -1
249 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
250
251 /**
252 * CPUState:
253 * @cpu_index: CPU index (informative).
254 * @cluster_index: Identifies which cluster this CPU is in.
255 * For boards which don't define clusters or for "loose" CPUs not assigned
256 * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
257 * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
258 * QOM parent.
259 * @tcg_cflags: Pre-computed cflags for this cpu.
260 * @nr_cores: Number of cores within this CPU package.
261 * @nr_threads: Number of threads within this CPU.
262 * @running: #true if CPU is currently running (lockless).
263 * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
264 * valid under cpu_list_lock.
265 * @created: Indicates whether the CPU thread has been successfully created.
266 * @interrupt_request: Indicates a pending interrupt request.
267 * @halted: Nonzero if the CPU is in suspended state.
268 * @stop: Indicates a pending stop request.
269 * @stopped: Indicates the CPU has been artificially stopped.
270 * @unplug: Indicates a pending CPU unplug request.
271 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
272 * @singlestep_enabled: Flags for single-stepping.
273 * @icount_extra: Instructions until next timer event.
274 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
275 * requires that IO only be performed on the last instruction of a TB
276 * so that interrupts take effect immediately.
277 * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
278 * AddressSpaces this CPU has)
279 * @num_ases: number of CPUAddressSpaces in @cpu_ases
280 * @as: Pointer to the first AddressSpace, for the convenience of targets which
281 * only have a single AddressSpace
282 * @env_ptr: Pointer to subclass-specific CPUArchState field.
283 * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
284 * @gdb_regs: Additional GDB registers.
285 * @gdb_num_regs: Number of total registers accessible to GDB.
286 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
287 * @next_cpu: Next CPU sharing TB cache.
288 * @opaque: User data.
289 * @mem_io_pc: Host Program Counter at which the memory was accessed.
290 * @kvm_fd: vCPU file descriptor for KVM.
291 * @work_mutex: Lock to prevent multiple access to @work_list.
292 * @work_list: List of pending asynchronous work.
293 * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
294 * to @trace_dstate).
295 * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
296 * @plugin_mask: Plugin event bitmap. Modified only via async work.
297 * @ignore_memory_transaction_failures: Cached copy of the MachineState
298 * flag of the same name: allows the board to suppress calling of the
299 * CPU do_transaction_failed hook function.
300 * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
301 * ring is enabled.
302 * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
303 * dirty ring structure.
304 *
305 * State of one CPU core or thread.
306 */
307 struct CPUState {
308 /*< private >*/
309 DeviceState parent_obj;
310 /*< public >*/
311
312 int nr_cores;
313 int nr_threads;
314
315 struct QemuThread *thread;
316 #ifdef _WIN32
317 HANDLE hThread;
318 #endif
319 int thread_id;
320 bool running, has_waiter;
321 struct QemuCond *halt_cond;
322 bool thread_kicked;
323 bool created;
324 bool stop;
325 bool stopped;
326
327 /* Should CPU start in powered-off state? */
328 bool start_powered_off;
329
330 bool unplug;
331 bool crash_occurred;
332 bool exit_request;
333 bool in_exclusive_context;
334 uint32_t cflags_next_tb;
335 /* updates protected by BQL */
336 uint32_t interrupt_request;
337 int singlestep_enabled;
338 int64_t icount_budget;
339 int64_t icount_extra;
340 uint64_t random_seed;
341 sigjmp_buf jmp_env;
342
343 QemuMutex work_mutex;
344 QSIMPLEQ_HEAD(, qemu_work_item) work_list;
345
346 CPUAddressSpace *cpu_ases;
347 int num_ases;
348 AddressSpace *as;
349 MemoryRegion *memory;
350
351 void *env_ptr; /* CPUArchState */
352 IcountDecr *icount_decr_ptr;
353
354 /* Accessed in parallel; all accesses must be atomic */
355 TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
356
357 struct GDBRegisterState *gdb_regs;
358 int gdb_num_regs;
359 int gdb_num_g_regs;
360 QTAILQ_ENTRY(CPUState) node;
361
362 /* ice debug support */
363 QTAILQ_HEAD(, CPUBreakpoint) breakpoints;
364
365 QTAILQ_HEAD(, CPUWatchpoint) watchpoints;
366 CPUWatchpoint *watchpoint_hit;
367
368 void *opaque;
369
370 /* In order to avoid passing too many arguments to the MMIO helpers,
371 * we store some rarely used information in the CPU context.
372 */
373 uintptr_t mem_io_pc;
374
375 /* Only used in KVM */
376 int kvm_fd;
377 struct KVMState *kvm_state;
378 struct kvm_run *kvm_run;
379 struct kvm_dirty_gfn *kvm_dirty_gfns;
380 uint32_t kvm_fetch_index;
381
382 /* Used for events with 'vcpu' and *without* the 'disabled' properties */
383 DECLARE_BITMAP(trace_dstate_delayed, CPU_TRACE_DSTATE_MAX_EVENTS);
384 DECLARE_BITMAP(trace_dstate, CPU_TRACE_DSTATE_MAX_EVENTS);
385
386 DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX);
387
388 #ifdef CONFIG_PLUGIN
389 GArray *plugin_mem_cbs;
390 /* saved iotlb data from io_writex */
391 SavedIOTLB saved_iotlb;
392 #endif
393
394 /* TODO Move common fields from CPUArchState here. */
395 int cpu_index;
396 int cluster_index;
397 uint32_t tcg_cflags;
398 uint32_t halted;
399 uint32_t can_do_io;
400 int32_t exception_index;
401
402 /* shared by kvm, hax and hvf */
403 bool vcpu_dirty;
404
405 /* Used to keep track of an outstanding cpu throttle thread for migration
406 * autoconverge
407 */
408 bool throttle_thread_scheduled;
409
410 bool ignore_memory_transaction_failures;
411
412 struct hax_vcpu_state *hax_vcpu;
413
414 struct hvf_vcpu_state *hvf;
415
416 /* track IOMMUs whose translations we've cached in the TCG TLB */
417 GArray *iommu_notifiers;
418 };
419
420 typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
421 extern CPUTailQ cpus;
422
423 #define first_cpu QTAILQ_FIRST_RCU(&cpus)
424 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
425 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
426 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
427 QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
428
429 extern __thread CPUState *current_cpu;
430
431 static inline void cpu_tb_jmp_cache_clear(CPUState *cpu)
432 {
433 unsigned int i;
434
435 for (i = 0; i < TB_JMP_CACHE_SIZE; i++) {
436 qatomic_set(&cpu->tb_jmp_cache[i], NULL);
437 }
438 }
439
440 /**
441 * qemu_tcg_mttcg_enabled:
442 * Check whether we are running MultiThread TCG or not.
443 *
444 * Returns: %true if we are in MTTCG mode %false otherwise.
445 */
446 extern bool mttcg_enabled;
447 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
448
449 /**
450 * cpu_paging_enabled:
451 * @cpu: The CPU whose state is to be inspected.
452 *
453 * Returns: %true if paging is enabled, %false otherwise.
454 */
455 bool cpu_paging_enabled(const CPUState *cpu);
456
457 /**
458 * cpu_get_memory_mapping:
459 * @cpu: The CPU whose memory mappings are to be obtained.
460 * @list: Where to write the memory mappings to.
461 * @errp: Pointer for reporting an #Error.
462 */
463 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
464 Error **errp);
465
466 #if !defined(CONFIG_USER_ONLY)
467
468 /**
469 * cpu_write_elf64_note:
470 * @f: pointer to a function that writes memory to a file
471 * @cpu: The CPU whose memory is to be dumped
472 * @cpuid: ID number of the CPU
473 * @opaque: pointer to the CPUState struct
474 */
475 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
476 int cpuid, void *opaque);
477
478 /**
479 * cpu_write_elf64_qemunote:
480 * @f: pointer to a function that writes memory to a file
481 * @cpu: The CPU whose memory is to be dumped
482 * @cpuid: ID number of the CPU
483 * @opaque: pointer to the CPUState struct
484 */
485 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
486 void *opaque);
487
488 /**
489 * cpu_write_elf32_note:
490 * @f: pointer to a function that writes memory to a file
491 * @cpu: The CPU whose memory is to be dumped
492 * @cpuid: ID number of the CPU
493 * @opaque: pointer to the CPUState struct
494 */
495 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
496 int cpuid, void *opaque);
497
498 /**
499 * cpu_write_elf32_qemunote:
500 * @f: pointer to a function that writes memory to a file
501 * @cpu: The CPU whose memory is to be dumped
502 * @cpuid: ID number of the CPU
503 * @opaque: pointer to the CPUState struct
504 */
505 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
506 void *opaque);
507
508 /**
509 * cpu_get_crash_info:
510 * @cpu: The CPU to get crash information for
511 *
512 * Gets the previously saved crash information.
513 * Caller is responsible for freeing the data.
514 */
515 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu);
516
517 #endif /* !CONFIG_USER_ONLY */
518
519 /**
520 * CPUDumpFlags:
521 * @CPU_DUMP_CODE:
522 * @CPU_DUMP_FPU: dump FPU register state, not just integer
523 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
524 */
525 enum CPUDumpFlags {
526 CPU_DUMP_CODE = 0x00010000,
527 CPU_DUMP_FPU = 0x00020000,
528 CPU_DUMP_CCOP = 0x00040000,
529 };
530
531 /**
532 * cpu_dump_state:
533 * @cpu: The CPU whose state is to be dumped.
534 * @f: If non-null, dump to this stream, else to current print sink.
535 *
536 * Dumps CPU state.
537 */
538 void cpu_dump_state(CPUState *cpu, FILE *f, int flags);
539
540 #ifndef CONFIG_USER_ONLY
541 /**
542 * cpu_get_phys_page_attrs_debug:
543 * @cpu: The CPU to obtain the physical page address for.
544 * @addr: The virtual address.
545 * @attrs: Updated on return with the memory transaction attributes to use
546 * for this access.
547 *
548 * Obtains the physical page corresponding to a virtual one, together
549 * with the corresponding memory transaction attributes to use for the access.
550 * Use it only for debugging because no protection checks are done.
551 *
552 * Returns: Corresponding physical page address or -1 if no page found.
553 */
554 hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
555 MemTxAttrs *attrs);
556
557 /**
558 * cpu_get_phys_page_debug:
559 * @cpu: The CPU to obtain the physical page address for.
560 * @addr: The virtual address.
561 *
562 * Obtains the physical page corresponding to a virtual one.
563 * Use it only for debugging because no protection checks are done.
564 *
565 * Returns: Corresponding physical page address or -1 if no page found.
566 */
567 hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
568
569 /** cpu_asidx_from_attrs:
570 * @cpu: CPU
571 * @attrs: memory transaction attributes
572 *
573 * Returns the address space index specifying the CPU AddressSpace
574 * to use for a memory access with the given transaction attributes.
575 */
576 int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
577
578 /**
579 * cpu_virtio_is_big_endian:
580 * @cpu: CPU
581
582 * Returns %true if a CPU which supports runtime configurable endianness
583 * is currently big-endian.
584 */
585 bool cpu_virtio_is_big_endian(CPUState *cpu);
586
587 #endif /* CONFIG_USER_ONLY */
588
589 /**
590 * cpu_list_add:
591 * @cpu: The CPU to be added to the list of CPUs.
592 */
593 void cpu_list_add(CPUState *cpu);
594
595 /**
596 * cpu_list_remove:
597 * @cpu: The CPU to be removed from the list of CPUs.
598 */
599 void cpu_list_remove(CPUState *cpu);
600
601 /**
602 * cpu_reset:
603 * @cpu: The CPU whose state is to be reset.
604 */
605 void cpu_reset(CPUState *cpu);
606
607 /**
608 * cpu_class_by_name:
609 * @typename: The CPU base type.
610 * @cpu_model: The model string without any parameters.
611 *
612 * Looks up a CPU #ObjectClass matching name @cpu_model.
613 *
614 * Returns: A #CPUClass or %NULL if not matching class is found.
615 */
616 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
617
618 /**
619 * cpu_create:
620 * @typename: The CPU type.
621 *
622 * Instantiates a CPU and realizes the CPU.
623 *
624 * Returns: A #CPUState or %NULL if an error occurred.
625 */
626 CPUState *cpu_create(const char *typename);
627
628 /**
629 * parse_cpu_option:
630 * @cpu_option: The -cpu option including optional parameters.
631 *
632 * processes optional parameters and registers them as global properties
633 *
634 * Returns: type of CPU to create or prints error and terminates process
635 * if an error occurred.
636 */
637 const char *parse_cpu_option(const char *cpu_option);
638
639 /**
640 * cpu_has_work:
641 * @cpu: The vCPU to check.
642 *
643 * Checks whether the CPU has work to do.
644 *
645 * Returns: %true if the CPU has work, %false otherwise.
646 */
647 static inline bool cpu_has_work(CPUState *cpu)
648 {
649 CPUClass *cc = CPU_GET_CLASS(cpu);
650
651 g_assert(cc->has_work);
652 return cc->has_work(cpu);
653 }
654
655 /**
656 * qemu_cpu_is_self:
657 * @cpu: The vCPU to check against.
658 *
659 * Checks whether the caller is executing on the vCPU thread.
660 *
661 * Returns: %true if called from @cpu's thread, %false otherwise.
662 */
663 bool qemu_cpu_is_self(CPUState *cpu);
664
665 /**
666 * qemu_cpu_kick:
667 * @cpu: The vCPU to kick.
668 *
669 * Kicks @cpu's thread.
670 */
671 void qemu_cpu_kick(CPUState *cpu);
672
673 /**
674 * cpu_is_stopped:
675 * @cpu: The CPU to check.
676 *
677 * Checks whether the CPU is stopped.
678 *
679 * Returns: %true if run state is not running or if artificially stopped;
680 * %false otherwise.
681 */
682 bool cpu_is_stopped(CPUState *cpu);
683
684 /**
685 * do_run_on_cpu:
686 * @cpu: The vCPU to run on.
687 * @func: The function to be executed.
688 * @data: Data to pass to the function.
689 * @mutex: Mutex to release while waiting for @func to run.
690 *
691 * Used internally in the implementation of run_on_cpu.
692 */
693 void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
694 QemuMutex *mutex);
695
696 /**
697 * run_on_cpu:
698 * @cpu: The vCPU to run on.
699 * @func: The function to be executed.
700 * @data: Data to pass to the function.
701 *
702 * Schedules the function @func for execution on the vCPU @cpu.
703 */
704 void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
705
706 /**
707 * async_run_on_cpu:
708 * @cpu: The vCPU to run on.
709 * @func: The function to be executed.
710 * @data: Data to pass to the function.
711 *
712 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
713 */
714 void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
715
716 /**
717 * async_safe_run_on_cpu:
718 * @cpu: The vCPU to run on.
719 * @func: The function to be executed.
720 * @data: Data to pass to the function.
721 *
722 * Schedules the function @func for execution on the vCPU @cpu asynchronously,
723 * while all other vCPUs are sleeping.
724 *
725 * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
726 * BQL.
727 */
728 void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
729
730 /**
731 * cpu_in_exclusive_context()
732 * @cpu: The vCPU to check
733 *
734 * Returns true if @cpu is an exclusive context, for example running
735 * something which has previously been queued via async_safe_run_on_cpu().
736 */
737 static inline bool cpu_in_exclusive_context(const CPUState *cpu)
738 {
739 return cpu->in_exclusive_context;
740 }
741
742 /**
743 * qemu_get_cpu:
744 * @index: The CPUState@cpu_index value of the CPU to obtain.
745 *
746 * Gets a CPU matching @index.
747 *
748 * Returns: The CPU or %NULL if there is no matching CPU.
749 */
750 CPUState *qemu_get_cpu(int index);
751
752 /**
753 * cpu_exists:
754 * @id: Guest-exposed CPU ID to lookup.
755 *
756 * Search for CPU with specified ID.
757 *
758 * Returns: %true - CPU is found, %false - CPU isn't found.
759 */
760 bool cpu_exists(int64_t id);
761
762 /**
763 * cpu_by_arch_id:
764 * @id: Guest-exposed CPU ID of the CPU to obtain.
765 *
766 * Get a CPU with matching @id.
767 *
768 * Returns: The CPU or %NULL if there is no matching CPU.
769 */
770 CPUState *cpu_by_arch_id(int64_t id);
771
772 /**
773 * cpu_interrupt:
774 * @cpu: The CPU to set an interrupt on.
775 * @mask: The interrupts to set.
776 *
777 * Invokes the interrupt handler.
778 */
779
780 void cpu_interrupt(CPUState *cpu, int mask);
781
782 /**
783 * cpu_set_pc:
784 * @cpu: The CPU to set the program counter for.
785 * @addr: Program counter value.
786 *
787 * Sets the program counter for a CPU.
788 */
789 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
790 {
791 CPUClass *cc = CPU_GET_CLASS(cpu);
792
793 cc->set_pc(cpu, addr);
794 }
795
796 /**
797 * cpu_reset_interrupt:
798 * @cpu: The CPU to clear the interrupt on.
799 * @mask: The interrupt mask to clear.
800 *
801 * Resets interrupts on the vCPU @cpu.
802 */
803 void cpu_reset_interrupt(CPUState *cpu, int mask);
804
805 /**
806 * cpu_exit:
807 * @cpu: The CPU to exit.
808 *
809 * Requests the CPU @cpu to exit execution.
810 */
811 void cpu_exit(CPUState *cpu);
812
813 /**
814 * cpu_resume:
815 * @cpu: The CPU to resume.
816 *
817 * Resumes CPU, i.e. puts CPU into runnable state.
818 */
819 void cpu_resume(CPUState *cpu);
820
821 /**
822 * cpu_remove_sync:
823 * @cpu: The CPU to remove.
824 *
825 * Requests the CPU to be removed and waits till it is removed.
826 */
827 void cpu_remove_sync(CPUState *cpu);
828
829 /**
830 * process_queued_cpu_work() - process all items on CPU work queue
831 * @cpu: The CPU which work queue to process.
832 */
833 void process_queued_cpu_work(CPUState *cpu);
834
835 /**
836 * cpu_exec_start:
837 * @cpu: The CPU for the current thread.
838 *
839 * Record that a CPU has started execution and can be interrupted with
840 * cpu_exit.
841 */
842 void cpu_exec_start(CPUState *cpu);
843
844 /**
845 * cpu_exec_end:
846 * @cpu: The CPU for the current thread.
847 *
848 * Record that a CPU has stopped execution and exclusive sections
849 * can be executed without interrupting it.
850 */
851 void cpu_exec_end(CPUState *cpu);
852
853 /**
854 * start_exclusive:
855 *
856 * Wait for a concurrent exclusive section to end, and then start
857 * a section of work that is run while other CPUs are not running
858 * between cpu_exec_start and cpu_exec_end. CPUs that are running
859 * cpu_exec are exited immediately. CPUs that call cpu_exec_start
860 * during the exclusive section go to sleep until this CPU calls
861 * end_exclusive.
862 */
863 void start_exclusive(void);
864
865 /**
866 * end_exclusive:
867 *
868 * Concludes an exclusive execution section started by start_exclusive.
869 */
870 void end_exclusive(void);
871
872 /**
873 * qemu_init_vcpu:
874 * @cpu: The vCPU to initialize.
875 *
876 * Initializes a vCPU.
877 */
878 void qemu_init_vcpu(CPUState *cpu);
879
880 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
881 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
882 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
883
884 /**
885 * cpu_single_step:
886 * @cpu: CPU to the flags for.
887 * @enabled: Flags to enable.
888 *
889 * Enables or disables single-stepping for @cpu.
890 */
891 void cpu_single_step(CPUState *cpu, int enabled);
892
893 /* Breakpoint/watchpoint flags */
894 #define BP_MEM_READ 0x01
895 #define BP_MEM_WRITE 0x02
896 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
897 #define BP_STOP_BEFORE_ACCESS 0x04
898 /* 0x08 currently unused */
899 #define BP_GDB 0x10
900 #define BP_CPU 0x20
901 #define BP_ANY (BP_GDB | BP_CPU)
902 #define BP_WATCHPOINT_HIT_READ 0x40
903 #define BP_WATCHPOINT_HIT_WRITE 0x80
904 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
905
906 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
907 CPUBreakpoint **breakpoint);
908 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
909 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
910 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
911
912 /* Return true if PC matches an installed breakpoint. */
913 static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
914 {
915 CPUBreakpoint *bp;
916
917 if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
918 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
919 if (bp->pc == pc && (bp->flags & mask)) {
920 return true;
921 }
922 }
923 }
924 return false;
925 }
926
927 #ifdef CONFIG_USER_ONLY
928 static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
929 int flags, CPUWatchpoint **watchpoint)
930 {
931 return -ENOSYS;
932 }
933
934 static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
935 vaddr len, int flags)
936 {
937 return -ENOSYS;
938 }
939
940 static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
941 CPUWatchpoint *wp)
942 {
943 }
944
945 static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
946 {
947 }
948
949 static inline void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
950 MemTxAttrs atr, int fl, uintptr_t ra)
951 {
952 }
953
954 static inline int cpu_watchpoint_address_matches(CPUState *cpu,
955 vaddr addr, vaddr len)
956 {
957 return 0;
958 }
959 #else
960 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
961 int flags, CPUWatchpoint **watchpoint);
962 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
963 vaddr len, int flags);
964 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
965 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
966
967 /**
968 * cpu_check_watchpoint:
969 * @cpu: cpu context
970 * @addr: guest virtual address
971 * @len: access length
972 * @attrs: memory access attributes
973 * @flags: watchpoint access type
974 * @ra: unwind return address
975 *
976 * Check for a watchpoint hit in [addr, addr+len) of the type
977 * specified by @flags. Exit via exception with a hit.
978 */
979 void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
980 MemTxAttrs attrs, int flags, uintptr_t ra);
981
982 /**
983 * cpu_watchpoint_address_matches:
984 * @cpu: cpu context
985 * @addr: guest virtual address
986 * @len: access length
987 *
988 * Return the watchpoint flags that apply to [addr, addr+len).
989 * If no watchpoint is registered for the range, the result is 0.
990 */
991 int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len);
992 #endif
993
994 /**
995 * cpu_get_address_space:
996 * @cpu: CPU to get address space from
997 * @asidx: index identifying which address space to get
998 *
999 * Return the requested address space of this CPU. @asidx
1000 * specifies which address space to read.
1001 */
1002 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
1003
1004 void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
1005 GCC_FMT_ATTR(2, 3);
1006
1007 /* $(top_srcdir)/cpu.c */
1008 void cpu_exec_initfn(CPUState *cpu);
1009 void cpu_exec_realizefn(CPUState *cpu, Error **errp);
1010 void cpu_exec_unrealizefn(CPUState *cpu);
1011
1012 /**
1013 * target_words_bigendian:
1014 * Returns true if the (default) endianness of the target is big endian,
1015 * false otherwise. Note that in target-specific code, you can use
1016 * TARGET_WORDS_BIGENDIAN directly instead. On the other hand, common
1017 * code should normally never need to know about the endianness of the
1018 * target, so please do *not* use this function unless you know very well
1019 * what you are doing!
1020 */
1021 bool target_words_bigendian(void);
1022
1023 #ifdef NEED_CPU_H
1024
1025 #ifdef CONFIG_SOFTMMU
1026
1027 extern const VMStateDescription vmstate_cpu_common;
1028
1029 #define VMSTATE_CPU() { \
1030 .name = "parent_obj", \
1031 .size = sizeof(CPUState), \
1032 .vmsd = &vmstate_cpu_common, \
1033 .flags = VMS_STRUCT, \
1034 .offset = 0, \
1035 }
1036 #endif /* CONFIG_SOFTMMU */
1037
1038 #endif /* NEED_CPU_H */
1039
1040 #define UNASSIGNED_CPU_INDEX -1
1041 #define UNASSIGNED_CLUSTER_INDEX -1
1042
1043 #endif