sifive: Move QOM typedefs and add missing includes
[qemu.git] / include / hw / gpio / sifive_gpio.h
1 /*
2 * SiFive System-on-Chip general purpose input/output register definition
3 *
4 * Copyright 2019 AdaCore
5 *
6 * Base on nrf51_gpio.c:
7 *
8 * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
9 *
10 * This code is licensed under the GPL version 2 or later. See
11 * the COPYING file in the top-level directory.
12 */
13
14 #ifndef SIFIVE_GPIO_H
15 #define SIFIVE_GPIO_H
16
17 #include "hw/sysbus.h"
18 #include "qom/object.h"
19
20 #define TYPE_SIFIVE_GPIO "sifive_soc.gpio"
21 typedef struct SIFIVEGPIOState SIFIVEGPIOState;
22 #define SIFIVE_GPIO(obj) OBJECT_CHECK(SIFIVEGPIOState, (obj), TYPE_SIFIVE_GPIO)
23
24 #define SIFIVE_GPIO_PINS 32
25
26 #define SIFIVE_GPIO_SIZE 0x100
27
28 #define SIFIVE_GPIO_REG_VALUE 0x000
29 #define SIFIVE_GPIO_REG_INPUT_EN 0x004
30 #define SIFIVE_GPIO_REG_OUTPUT_EN 0x008
31 #define SIFIVE_GPIO_REG_PORT 0x00C
32 #define SIFIVE_GPIO_REG_PUE 0x010
33 #define SIFIVE_GPIO_REG_DS 0x014
34 #define SIFIVE_GPIO_REG_RISE_IE 0x018
35 #define SIFIVE_GPIO_REG_RISE_IP 0x01C
36 #define SIFIVE_GPIO_REG_FALL_IE 0x020
37 #define SIFIVE_GPIO_REG_FALL_IP 0x024
38 #define SIFIVE_GPIO_REG_HIGH_IE 0x028
39 #define SIFIVE_GPIO_REG_HIGH_IP 0x02C
40 #define SIFIVE_GPIO_REG_LOW_IE 0x030
41 #define SIFIVE_GPIO_REG_LOW_IP 0x034
42 #define SIFIVE_GPIO_REG_IOF_EN 0x038
43 #define SIFIVE_GPIO_REG_IOF_SEL 0x03C
44 #define SIFIVE_GPIO_REG_OUT_XOR 0x040
45
46 struct SIFIVEGPIOState {
47 SysBusDevice parent_obj;
48
49 MemoryRegion mmio;
50
51 qemu_irq irq[SIFIVE_GPIO_PINS];
52 qemu_irq output[SIFIVE_GPIO_PINS];
53
54 uint32_t value; /* Actual value of the pin */
55 uint32_t input_en;
56 uint32_t output_en;
57 uint32_t port; /* Pin value requested by the user */
58 uint32_t pue;
59 uint32_t ds;
60 uint32_t rise_ie;
61 uint32_t rise_ip;
62 uint32_t fall_ie;
63 uint32_t fall_ip;
64 uint32_t high_ie;
65 uint32_t high_ip;
66 uint32_t low_ie;
67 uint32_t low_ip;
68 uint32_t iof_en;
69 uint32_t iof_sel;
70 uint32_t out_xor;
71 uint32_t in;
72 uint32_t in_mask;
73
74 /* config */
75 uint32_t ngpio;
76 };
77
78 #endif /* SIFIVE_GPIO_H */