ppc/pnv: Add a HIOMAP erase command
[qemu.git] / include / hw / intc / allwinner-a10-pic.h
1 #ifndef ALLWINNER_A10_PIC_H
2 #define ALLWINNER_A10_PIC_H
3
4 #include "hw/sysbus.h"
5
6 #define TYPE_AW_A10_PIC "allwinner-a10-pic"
7 #define AW_A10_PIC(obj) OBJECT_CHECK(AwA10PICState, (obj), TYPE_AW_A10_PIC)
8
9 #define AW_A10_PIC_VECTOR 0
10 #define AW_A10_PIC_BASE_ADDR 4
11 #define AW_A10_PIC_PROTECT 8
12 #define AW_A10_PIC_NMI 0xc
13 #define AW_A10_PIC_IRQ_PENDING 0x10
14 #define AW_A10_PIC_FIQ_PENDING 0x20
15 #define AW_A10_PIC_SELECT 0x30
16 #define AW_A10_PIC_ENABLE 0x40
17 #define AW_A10_PIC_MASK 0x50
18
19 #define AW_A10_PIC_INT_NR 95
20 #define AW_A10_PIC_REG_NUM DIV_ROUND_UP(AW_A10_PIC_INT_NR, 32)
21
22 typedef struct AwA10PICState {
23 /*< private >*/
24 SysBusDevice parent_obj;
25 /*< public >*/
26 MemoryRegion iomem;
27 qemu_irq parent_fiq;
28 qemu_irq parent_irq;
29
30 uint32_t vector;
31 uint32_t base_addr;
32 uint32_t protect;
33 uint32_t nmi;
34 uint32_t irq_pending[AW_A10_PIC_REG_NUM];
35 uint32_t fiq_pending[AW_A10_PIC_REG_NUM];
36 uint32_t select[AW_A10_PIC_REG_NUM];
37 uint32_t enable[AW_A10_PIC_REG_NUM];
38 uint32_t mask[AW_A10_PIC_REG_NUM];
39 /*priority setting here*/
40 } AwA10PICState;
41
42 #endif