ppc/pnv: Add a HIOMAP erase command
[qemu.git] / include / hw / intc / rx_icu.h
1 /*
2 * RX Interrupt Control Unit
3 *
4 * Copyright (c) 2019 Yoshinori Sato
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2 or later, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #ifndef HW_INTC_RX_ICU_H
22 #define HW_INTC_RX_ICU_H
23
24 #include "hw/sysbus.h"
25
26 enum TRG_MODE {
27 TRG_LEVEL = 0,
28 TRG_NEDGE = 1, /* Falling */
29 TRG_PEDGE = 2, /* Raising */
30 TRG_BEDGE = 3, /* Both */
31 };
32
33 struct IRQSource {
34 enum TRG_MODE sense;
35 int level;
36 };
37
38 enum {
39 /* Software interrupt request */
40 SWI = 27,
41 NR_IRQS = 256
42 };
43
44 struct RXICUState {
45 /*< private >*/
46 SysBusDevice parent_obj;
47 /*< public >*/
48
49 MemoryRegion memory;
50 struct IRQSource src[NR_IRQS];
51 uint32_t nr_irqs;
52 uint8_t *map;
53 uint32_t nr_sense;
54 uint8_t *init_sense;
55
56 uint8_t ir[NR_IRQS];
57 uint8_t dtcer[NR_IRQS];
58 uint8_t ier[NR_IRQS / 8];
59 uint8_t ipr[142];
60 uint8_t dmasr[4];
61 uint16_t fir;
62 uint8_t nmisr;
63 uint8_t nmier;
64 uint8_t nmiclr;
65 uint8_t nmicr;
66 int16_t req_irq;
67 qemu_irq _irq;
68 qemu_irq _fir;
69 qemu_irq _swi;
70 };
71 typedef struct RXICUState RXICUState;
72
73 #define TYPE_RX_ICU "rx-icu"
74 #define RX_ICU(obj) OBJECT_CHECK(RXICUState, (obj), TYPE_RX_ICU)
75
76 #endif /* RX_ICU_H */