ppc/pnv: Add a HIOMAP erase command
[qemu.git] / include / hw / misc / iotkit-sysctl.h
1 /*
2 * ARM IoTKit system control element
3 *
4 * Copyright (c) 2018 Linaro Limited
5 * Written by Peter Maydell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
10 */
11
12 /*
13 * This is a model of the "system control element" which is part of the
14 * Arm IoTKit and documented in
15 * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ecm0601256/index.html
16 * Specifically, it implements the "system information block" and
17 * "system control register" blocks.
18 *
19 * QEMU interface:
20 * + QOM property "SYS_VERSION": value of the SYS_VERSION register of the
21 * system information block of the SSE
22 * (used to identify whether to provide SSE-200-only registers)
23 * + sysbus MMIO region 0: the system information register bank
24 * + sysbus MMIO region 1: the system control register bank
25 */
26
27 #ifndef HW_MISC_IOTKIT_SYSCTL_H
28 #define HW_MISC_IOTKIT_SYSCTL_H
29
30 #include "hw/sysbus.h"
31
32 #define TYPE_IOTKIT_SYSCTL "iotkit-sysctl"
33 #define IOTKIT_SYSCTL(obj) OBJECT_CHECK(IoTKitSysCtl, (obj), \
34 TYPE_IOTKIT_SYSCTL)
35
36 typedef struct IoTKitSysCtl {
37 /*< private >*/
38 SysBusDevice parent_obj;
39
40 /*< public >*/
41 MemoryRegion iomem;
42
43 uint32_t secure_debug;
44 uint32_t reset_syndrome;
45 uint32_t reset_mask;
46 uint32_t gretreg;
47 uint32_t initsvtor0;
48 uint32_t cpuwait;
49 uint32_t wicctrl;
50 uint32_t scsecctrl;
51 uint32_t fclk_div;
52 uint32_t sysclk_div;
53 uint32_t clock_force;
54 uint32_t initsvtor1;
55 uint32_t nmi_enable;
56 uint32_t ewctrl;
57 uint32_t pdcm_pd_sys_sense;
58 uint32_t pdcm_pd_sram0_sense;
59 uint32_t pdcm_pd_sram1_sense;
60 uint32_t pdcm_pd_sram2_sense;
61 uint32_t pdcm_pd_sram3_sense;
62
63 /* Properties */
64 uint32_t sys_version;
65 uint32_t cpuwait_rst;
66 uint32_t initsvtor0_rst;
67 uint32_t initsvtor1_rst;
68
69 bool is_sse200;
70 } IoTKitSysCtl;
71
72 #endif