sifive: Move QOM typedefs and add missing includes
[qemu.git] / include / hw / misc / mps2-fpgaio.h
1 /*
2 * ARM MPS2 FPGAIO emulation
3 *
4 * Copyright (c) 2018 Linaro Limited
5 * Written by Peter Maydell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
10 */
11
12 /* This is a model of the FPGAIO register block in the AN505
13 * FPGA image for the MPS2 dev board; it is documented in the
14 * application note:
15 * http://infocenter.arm.com/help/topic/com.arm.doc.dai0505b/index.html
16 *
17 * QEMU interface:
18 * + sysbus MMIO region 0: the register bank
19 */
20
21 #ifndef MPS2_FPGAIO_H
22 #define MPS2_FPGAIO_H
23
24 #include "hw/sysbus.h"
25 #include "qom/object.h"
26
27 #define TYPE_MPS2_FPGAIO "mps2-fpgaio"
28 typedef struct MPS2FPGAIO MPS2FPGAIO;
29 DECLARE_INSTANCE_CHECKER(MPS2FPGAIO, MPS2_FPGAIO,
30 TYPE_MPS2_FPGAIO)
31
32 struct MPS2FPGAIO {
33 /*< private >*/
34 SysBusDevice parent_obj;
35
36 /*< public >*/
37 MemoryRegion iomem;
38
39 uint32_t led0;
40 uint32_t prescale;
41 uint32_t misc;
42
43 /* QEMU_CLOCK_VIRTUAL time at which counter and pscntr were last synced */
44 int64_t pscntr_sync_ticks;
45 /* Values of COUNTER and PSCNTR at time pscntr_sync_ticks */
46 uint32_t counter;
47 uint32_t pscntr;
48
49 uint32_t prescale_clk;
50
51 /* These hold the CLOCK_VIRTUAL ns tick when the CLK1HZ/CLK100HZ was zero */
52 int64_t clk1hz_tick_offset;
53 int64_t clk100hz_tick_offset;
54 };
55
56 #endif