Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211016' into staging
[qemu.git] / include / hw / net / mii.h
1 /*
2 * Common network MII address and register definitions.
3 *
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5 *
6 * Allwinner EMAC register definitions from Linux kernel are:
7 * Copyright 2012 Stefan Roese <sr@denx.de>
8 * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
9 * Copyright 1997 Sten Wang
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 */
21 #ifndef MII_H
22 #define MII_H
23
24 /* PHY registers */
25 #define MII_BMCR 0 /* Basic mode control register */
26 #define MII_BMSR 1 /* Basic mode status register */
27 #define MII_PHYID1 2 /* ID register 1 */
28 #define MII_PHYID2 3 /* ID register 2 */
29 #define MII_ANAR 4 /* Autonegotiation advertisement */
30 #define MII_ANLPAR 5 /* Autonegotiation lnk partner abilities */
31 #define MII_ANER 6 /* Autonegotiation expansion */
32 #define MII_ANNP 7 /* Autonegotiation next page */
33 #define MII_ANLPRNP 8 /* Autonegotiation link partner rx next page */
34 #define MII_CTRL1000 9 /* 1000BASE-T control */
35 #define MII_STAT1000 10 /* 1000BASE-T status */
36 #define MII_MDDACR 13 /* MMD access control */
37 #define MII_MDDAADR 14 /* MMD access address data */
38 #define MII_EXTSTAT 15 /* Extended Status */
39 #define MII_NSR 16
40 #define MII_LBREMR 17
41 #define MII_REC 18
42 #define MII_SNRDR 19
43 #define MII_TEST 25
44
45 /* PHY registers fields */
46 #define MII_BMCR_RESET (1 << 15)
47 #define MII_BMCR_LOOPBACK (1 << 14)
48 #define MII_BMCR_SPEED100 (1 << 13) /* LSB of Speed (100) */
49 #define MII_BMCR_SPEED MII_BMCR_SPEED100
50 #define MII_BMCR_AUTOEN (1 << 12) /* Autonegotiation enable */
51 #define MII_BMCR_PDOWN (1 << 11) /* Enable low power state */
52 #define MII_BMCR_ISOLATE (1 << 10) /* Isolate data paths from MII */
53 #define MII_BMCR_ANRESTART (1 << 9) /* Auto negotiation restart */
54 #define MII_BMCR_FD (1 << 8) /* Set duplex mode */
55 #define MII_BMCR_CTST (1 << 7) /* Collision test */
56 #define MII_BMCR_SPEED1000 (1 << 6) /* MSB of Speed (1000) */
57
58 #define MII_BMSR_100TX_FD (1 << 14) /* Can do 100mbps, full-duplex */
59 #define MII_BMSR_100TX_HD (1 << 13) /* Can do 100mbps, half-duplex */
60 #define MII_BMSR_10T_FD (1 << 12) /* Can do 10mbps, full-duplex */
61 #define MII_BMSR_10T_HD (1 << 11) /* Can do 10mbps, half-duplex */
62 #define MII_BMSR_100T2_FD (1 << 10) /* Can do 100mbps T2, full-duplex */
63 #define MII_BMSR_100T2_HD (1 << 9) /* Can do 100mbps T2, half-duplex */
64 #define MII_BMSR_EXTSTAT (1 << 8) /* Extended status in register 15 */
65 #define MII_BMSR_MFPS (1 << 6) /* MII Frame Preamble Suppression */
66 #define MII_BMSR_AN_COMP (1 << 5) /* Auto-negotiation complete */
67 #define MII_BMSR_RFAULT (1 << 4) /* Remote fault */
68 #define MII_BMSR_AUTONEG (1 << 3) /* Able to do auto-negotiation */
69 #define MII_BMSR_LINK_ST (1 << 2) /* Link status */
70 #define MII_BMSR_JABBER (1 << 1) /* Jabber detected */
71 #define MII_BMSR_EXTCAP (1 << 0) /* Ext-reg capability */
72
73 #define MII_ANAR_PAUSE_ASYM (1 << 11) /* Try for asymetric pause */
74 #define MII_ANAR_PAUSE (1 << 10) /* Try for pause */
75 #define MII_ANAR_TXFD (1 << 8)
76 #define MII_ANAR_TX (1 << 7)
77 #define MII_ANAR_10FD (1 << 6)
78 #define MII_ANAR_10 (1 << 5)
79 #define MII_ANAR_CSMACD (1 << 0)
80
81 #define MII_ANLPAR_ACK (1 << 14)
82 #define MII_ANLPAR_PAUSEASY (1 << 11) /* can pause asymmetrically */
83 #define MII_ANLPAR_PAUSE (1 << 10) /* can pause */
84 #define MII_ANLPAR_TXFD (1 << 8)
85 #define MII_ANLPAR_TX (1 << 7)
86 #define MII_ANLPAR_10FD (1 << 6)
87 #define MII_ANLPAR_10 (1 << 5)
88 #define MII_ANLPAR_CSMACD (1 << 0)
89
90 #define MII_ANER_NWAY (1 << 0) /* Can do N-way auto-nego */
91
92 #define MII_CTRL1000_FULL (1 << 9) /* 1000BASE-T full duplex */
93 #define MII_CTRL1000_HALF (1 << 8) /* 1000BASE-T half duplex */
94
95 #define MII_STAT1000_FULL (1 << 11) /* 1000BASE-T full duplex */
96 #define MII_STAT1000_HALF (1 << 10) /* 1000BASE-T half duplex */
97
98 /* List of vendor identifiers */
99 /* RealTek 8201 */
100 #define RTL8201CP_PHYID1 0x0000
101 #define RTL8201CP_PHYID2 0x8201
102
103 /* RealTek 8211E */
104 #define RTL8211E_PHYID1 0x001c
105 #define RTL8211E_PHYID2 0xc915
106
107 /* National Semiconductor DP83840 */
108 #define DP83840_PHYID1 0x2000
109 #define DP83840_PHYID2 0x5c01
110
111 /* National Semiconductor DP83848 */
112 #define DP83848_PHYID1 0x2000
113 #define DP83848_PHYID2 0x5c90
114
115 #endif /* MII_H */