hw: Add support for LSI SAS1068 (mptsas) device
[qemu.git] / include / hw / pci / shpc.h
1 #ifndef SHPC_H
2 #define SHPC_H
3
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "migration/vmstate.h"
7 #include "qapi/error.h"
8 #include "hw/hotplug.h"
9 #include "hw/pci/pci.h"
10
11 struct SHPCDevice {
12 /* Capability offset in device's config space */
13 int cap;
14
15 /* # of hot-pluggable slots */
16 int nslots;
17
18 /* SHPC WRS: working register set */
19 uint8_t *config;
20
21 /* Used to enable checks on load. Note that writable bits are
22 * never checked even if set in cmask. */
23 uint8_t *cmask;
24
25 /* Used to implement R/W bytes */
26 uint8_t *wmask;
27
28 /* Used to implement RW1C(Write 1 to Clear) bytes */
29 uint8_t *w1cmask;
30
31 /* MMIO for the SHPC BAR */
32 MemoryRegion mmio;
33
34 /* Bus controlled by this SHPC */
35 PCIBus *sec_bus;
36
37 /* MSI already requested for this event */
38 int msi_requested;
39 };
40
41 void shpc_reset(PCIDevice *d);
42 int shpc_bar_size(PCIDevice *dev);
43 int shpc_init(PCIDevice *dev, PCIBus *sec_bus, MemoryRegion *bar, unsigned off);
44 void shpc_cleanup(PCIDevice *dev, MemoryRegion *bar);
45 void shpc_free(PCIDevice *dev);
46 void shpc_cap_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len);
47
48
49 void shpc_device_hotplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
50 Error **errp);
51 void shpc_device_hot_unplug_request_cb(HotplugHandler *hotplug_dev,
52 DeviceState *dev, Error **errp);
53
54 extern VMStateInfo shpc_vmstate_info;
55 #define SHPC_VMSTATE(_field, _type, _test) \
56 VMSTATE_BUFFER_UNSAFE_INFO_TEST(_field, _type, _test, 0, \
57 shpc_vmstate_info, 0)
58
59 static inline bool shpc_present(const PCIDevice *dev)
60 {
61 return dev->cap_present & QEMU_PCI_CAP_SHPC;
62 }
63
64 #endif