s390x/pci: create a header dedicated to PCI CLP
[qemu.git] / include / hw / s390x / s390-pci-clp.h
1 /*
2 * s390 CLP instruction definitions
3 *
4 * Copyright 2019 IBM Corp.
5 * Author(s): Pierre Morel <pmorel@de.ibm.com>
6 *
7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
8 * your option) any later version. See the COPYING file in the top-level
9 * directory.
10 */
11
12 #ifndef HW_S390_PCI_CLP
13 #define HW_S390_PCI_CLP
14
15 /* CLP common request & response block size */
16 #define CLP_BLK_SIZE 4096
17 #define PCI_BAR_COUNT 6
18 #define PCI_MAX_FUNCTIONS 4096
19
20 typedef struct ClpReqHdr {
21 uint16_t len;
22 uint16_t cmd;
23 } QEMU_PACKED ClpReqHdr;
24
25 typedef struct ClpRspHdr {
26 uint16_t len;
27 uint16_t rsp;
28 } QEMU_PACKED ClpRspHdr;
29
30 /* CLP Response Codes */
31 #define CLP_RC_OK 0x0010 /* Command request successfully */
32 #define CLP_RC_CMD 0x0020 /* Command code not recognized */
33 #define CLP_RC_PERM 0x0030 /* Command not authorized */
34 #define CLP_RC_FMT 0x0040 /* Invalid command request format */
35 #define CLP_RC_LEN 0x0050 /* Invalid command request length */
36 #define CLP_RC_8K 0x0060 /* Command requires 8K LPCB */
37 #define CLP_RC_RESNOT0 0x0070 /* Reserved field not zero */
38 #define CLP_RC_NODATA 0x0080 /* No data available */
39 #define CLP_RC_FC_UNKNOWN 0x0100 /* Function code not recognized */
40
41 /*
42 * Call Logical Processor - Command Codes
43 */
44 #define CLP_LIST_PCI 0x0002
45 #define CLP_QUERY_PCI_FN 0x0003
46 #define CLP_QUERY_PCI_FNGRP 0x0004
47 #define CLP_SET_PCI_FN 0x0005
48
49 /* PCI function handle list entry */
50 typedef struct ClpFhListEntry {
51 uint16_t device_id;
52 uint16_t vendor_id;
53 #define CLP_FHLIST_MASK_CONFIG 0x80000000
54 uint32_t config;
55 uint32_t fid;
56 uint32_t fh;
57 } QEMU_PACKED ClpFhListEntry;
58
59 #define CLP_RC_SETPCIFN_FH 0x0101 /* Invalid PCI fn handle */
60 #define CLP_RC_SETPCIFN_FHOP 0x0102 /* Fn handle not valid for op */
61 #define CLP_RC_SETPCIFN_DMAAS 0x0103 /* Invalid DMA addr space */
62 #define CLP_RC_SETPCIFN_RES 0x0104 /* Insufficient resources */
63 #define CLP_RC_SETPCIFN_ALRDY 0x0105 /* Fn already in requested state */
64 #define CLP_RC_SETPCIFN_ERR 0x0106 /* Fn in permanent error state */
65 #define CLP_RC_SETPCIFN_RECPND 0x0107 /* Error recovery pending */
66 #define CLP_RC_SETPCIFN_BUSY 0x0108 /* Fn busy */
67 #define CLP_RC_LISTPCI_BADRT 0x010a /* Resume token not recognized */
68 #define CLP_RC_QUERYPCIFG_PFGID 0x010b /* Unrecognized PFGID */
69
70 /* request or response block header length */
71 #define LIST_PCI_HDR_LEN 32
72
73 /* Number of function handles fitting in response block */
74 #define CLP_FH_LIST_NR_ENTRIES \
75 ((CLP_BLK_SIZE - 2 * LIST_PCI_HDR_LEN) \
76 / sizeof(ClpFhListEntry))
77
78 #define CLP_SET_ENABLE_PCI_FN 0 /* Yes, 0 enables it */
79 #define CLP_SET_DISABLE_PCI_FN 1 /* Yes, 1 disables it */
80
81 #define CLP_UTIL_STR_LEN 64
82
83 #define CLP_MASK_FMT 0xf0000000
84
85 /* List PCI functions request */
86 typedef struct ClpReqListPci {
87 ClpReqHdr hdr;
88 uint32_t fmt;
89 uint64_t reserved1;
90 uint64_t resume_token;
91 uint64_t reserved2;
92 } QEMU_PACKED ClpReqListPci;
93
94 /* List PCI functions response */
95 typedef struct ClpRspListPci {
96 ClpRspHdr hdr;
97 uint32_t fmt;
98 uint64_t reserved1;
99 uint64_t resume_token;
100 uint32_t mdd;
101 uint16_t max_fn;
102 uint8_t flags;
103 uint8_t entry_size;
104 ClpFhListEntry fh_list[CLP_FH_LIST_NR_ENTRIES];
105 } QEMU_PACKED ClpRspListPci;
106
107 /* Query PCI function request */
108 typedef struct ClpReqQueryPci {
109 ClpReqHdr hdr;
110 uint32_t fmt;
111 uint64_t reserved1;
112 uint32_t fh; /* function handle */
113 uint32_t reserved2;
114 uint64_t reserved3;
115 } QEMU_PACKED ClpReqQueryPci;
116
117 /* Query PCI function response */
118 typedef struct ClpRspQueryPci {
119 ClpRspHdr hdr;
120 uint32_t fmt;
121 uint64_t reserved1;
122 uint16_t vfn; /* virtual fn number */
123 #define CLP_RSP_QPCI_MASK_UTIL 0x100
124 #define CLP_RSP_QPCI_MASK_PFGID 0xff
125 uint16_t ug;
126 uint32_t fid; /* pci function id */
127 uint8_t bar_size[PCI_BAR_COUNT];
128 uint16_t pchid;
129 uint32_t bar[PCI_BAR_COUNT];
130 uint64_t reserved2;
131 uint64_t sdma; /* start dma as */
132 uint64_t edma; /* end dma as */
133 uint32_t reserved3[11];
134 uint32_t uid;
135 uint8_t util_str[CLP_UTIL_STR_LEN]; /* utility string */
136 } QEMU_PACKED ClpRspQueryPci;
137
138 /* Query PCI function group request */
139 typedef struct ClpReqQueryPciGrp {
140 ClpReqHdr hdr;
141 uint32_t fmt;
142 uint64_t reserved1;
143 #define CLP_REQ_QPCIG_MASK_PFGID 0xff
144 uint32_t g;
145 uint32_t reserved2;
146 uint64_t reserved3;
147 } QEMU_PACKED ClpReqQueryPciGrp;
148
149 /* Query PCI function group response */
150 typedef struct ClpRspQueryPciGrp {
151 ClpRspHdr hdr;
152 uint32_t fmt;
153 uint64_t reserved1;
154 #define CLP_RSP_QPCIG_MASK_NOI 0xfff
155 uint16_t i;
156 uint8_t version;
157 #define CLP_RSP_QPCIG_MASK_FRAME 0x2
158 #define CLP_RSP_QPCIG_MASK_REFRESH 0x1
159 uint8_t fr;
160 uint16_t maxstbl;
161 uint16_t mui;
162 uint64_t reserved3;
163 uint64_t dasm; /* dma address space mask */
164 uint64_t msia; /* MSI address */
165 uint64_t reserved4;
166 uint64_t reserved5;
167 } QEMU_PACKED ClpRspQueryPciGrp;
168
169 /* Set PCI function request */
170 typedef struct ClpReqSetPci {
171 ClpReqHdr hdr;
172 uint32_t fmt;
173 uint64_t reserved1;
174 uint32_t fh; /* function handle */
175 uint16_t reserved2;
176 uint8_t oc; /* operation controls */
177 uint8_t ndas; /* number of dma spaces */
178 uint64_t reserved3;
179 } QEMU_PACKED ClpReqSetPci;
180
181 /* Set PCI function response */
182 typedef struct ClpRspSetPci {
183 ClpRspHdr hdr;
184 uint32_t fmt;
185 uint64_t reserved1;
186 uint32_t fh; /* function handle */
187 uint32_t reserved3;
188 uint64_t reserved4;
189 } QEMU_PACKED ClpRspSetPci;
190
191 typedef struct ClpReqRspListPci {
192 ClpReqListPci request;
193 ClpRspListPci response;
194 } QEMU_PACKED ClpReqRspListPci;
195
196 typedef struct ClpReqRspSetPci {
197 ClpReqSetPci request;
198 ClpRspSetPci response;
199 } QEMU_PACKED ClpReqRspSetPci;
200
201 typedef struct ClpReqRspQueryPci {
202 ClpReqQueryPci request;
203 ClpRspQueryPci response;
204 } QEMU_PACKED ClpReqRspQueryPci;
205
206 typedef struct ClpReqRspQueryPciGrp {
207 ClpReqQueryPciGrp request;
208 ClpRspQueryPciGrp response;
209 } QEMU_PACKED ClpReqRspQueryPciGrp;
210
211 #endif