hw: Add support for LSI SAS1068 (mptsas) device
[qemu.git] / include / hw / s390x / sclp.h
1 /*
2 * SCLP Support
3 *
4 * Copyright IBM, Corp. 2012
5 *
6 * Authors:
7 * Christian Borntraeger <borntraeger@de.ibm.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or (at your
10 * option) any later version. See the COPYING file in the top-level directory.
11 *
12 */
13
14 #ifndef HW_S390_SCLP_H
15 #define HW_S390_SCLP_H
16
17 #include <hw/sysbus.h>
18 #include <hw/qdev.h>
19
20 #define SCLP_CMD_CODE_MASK 0xffff00ff
21
22 /* SCLP command codes */
23 #define SCLP_CMDW_READ_SCP_INFO 0x00020001
24 #define SCLP_CMDW_READ_SCP_INFO_FORCED 0x00120001
25 #define SCLP_READ_STORAGE_ELEMENT_INFO 0x00040001
26 #define SCLP_ATTACH_STORAGE_ELEMENT 0x00080001
27 #define SCLP_ASSIGN_STORAGE 0x000D0001
28 #define SCLP_UNASSIGN_STORAGE 0x000C0001
29 #define SCLP_CMD_READ_EVENT_DATA 0x00770005
30 #define SCLP_CMD_WRITE_EVENT_DATA 0x00760005
31 #define SCLP_CMD_WRITE_EVENT_MASK 0x00780005
32
33 /* SCLP Memory hotplug codes */
34 #define SCLP_FC_ASSIGN_ATTACH_READ_STOR 0xE00000000000ULL
35 #define SCLP_STARTING_SUBINCREMENT_ID 0x10001
36 #define SCLP_INCREMENT_UNIT 0x10000
37 #define MAX_AVAIL_SLOTS 32
38 #define MAX_STORAGE_INCREMENTS 1020
39
40 /* CPU hotplug SCLP codes */
41 #define SCLP_HAS_CPU_INFO 0x0C00000000000000ULL
42 #define SCLP_CMDW_READ_CPU_INFO 0x00010001
43 #define SCLP_CMDW_CONFIGURE_CPU 0x00110001
44 #define SCLP_CMDW_DECONFIGURE_CPU 0x00100001
45
46 /* SCLP PCI codes */
47 #define SCLP_HAS_PCI_RECONFIG 0x0000000040000000ULL
48 #define SCLP_CMDW_CONFIGURE_PCI 0x001a0001
49 #define SCLP_CMDW_DECONFIGURE_PCI 0x001b0001
50 #define SCLP_RECONFIG_PCI_ATPYE 2
51
52 /* SCLP response codes */
53 #define SCLP_RC_NORMAL_READ_COMPLETION 0x0010
54 #define SCLP_RC_NORMAL_COMPLETION 0x0020
55 #define SCLP_RC_SCCB_BOUNDARY_VIOLATION 0x0100
56 #define SCLP_RC_NO_ACTION_REQUIRED 0x0120
57 #define SCLP_RC_INVALID_SCLP_COMMAND 0x01f0
58 #define SCLP_RC_CONTAINED_EQUIPMENT_CHECK 0x0340
59 #define SCLP_RC_INSUFFICIENT_SCCB_LENGTH 0x0300
60 #define SCLP_RC_STANDBY_READ_COMPLETION 0x0410
61 #define SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED 0x09f0
62 #define SCLP_RC_INVALID_FUNCTION 0x40f0
63 #define SCLP_RC_NO_EVENT_BUFFERS_STORED 0x60f0
64 #define SCLP_RC_INVALID_SELECTION_MASK 0x70f0
65 #define SCLP_RC_INCONSISTENT_LENGTHS 0x72f0
66 #define SCLP_RC_EVENT_BUFFER_SYNTAX_ERROR 0x73f0
67 #define SCLP_RC_INVALID_MASK_LENGTH 0x74f0
68
69
70 /* Service Call Control Block (SCCB) and its elements */
71
72 #define SCCB_SIZE 4096
73
74 #define SCLP_VARIABLE_LENGTH_RESPONSE 0x80
75 #define SCLP_EVENT_BUFFER_ACCEPTED 0x80
76
77 #define SCLP_FC_NORMAL_WRITE 0
78
79 /*
80 * Normally packed structures are not the right thing to do, since all code
81 * must take care of endianness. We cannot use ldl_phys and friends for two
82 * reasons, though:
83 * - some of the embedded structures below the SCCB can appear multiple times
84 * at different locations, so there is no fixed offset
85 * - we work on a private copy of the SCCB, since there are several length
86 * fields, that would cause a security nightmare if we allow the guest to
87 * alter the structure while we parse it. We cannot use ldl_p and friends
88 * either without doing pointer arithmetics
89 * So we have to double check that all users of sclp data structures use the
90 * right endianness wrappers.
91 */
92 typedef struct SCCBHeader {
93 uint16_t length;
94 uint8_t function_code;
95 uint8_t control_mask[3];
96 uint16_t response_code;
97 } QEMU_PACKED SCCBHeader;
98
99 #define SCCB_DATA_LEN (SCCB_SIZE - sizeof(SCCBHeader))
100
101 /* CPU information */
102 typedef struct CPUEntry {
103 uint8_t address;
104 uint8_t reserved0[13];
105 uint8_t type;
106 uint8_t reserved1;
107 } QEMU_PACKED CPUEntry;
108
109 typedef struct ReadInfo {
110 SCCBHeader h;
111 uint16_t rnmax;
112 uint8_t rnsize;
113 uint8_t _reserved1[16 - 11]; /* 11-15 */
114 uint16_t entries_cpu; /* 16-17 */
115 uint16_t offset_cpu; /* 18-19 */
116 uint8_t _reserved2[24 - 20]; /* 20-23 */
117 uint8_t loadparm[8]; /* 24-31 */
118 uint8_t _reserved3[48 - 32]; /* 32-47 */
119 uint64_t facilities; /* 48-55 */
120 uint8_t _reserved0[100 - 56];
121 uint32_t rnsize2;
122 uint64_t rnmax2;
123 uint8_t _reserved4[120-112]; /* 112-119 */
124 uint16_t highest_cpu;
125 uint8_t _reserved5[128 - 122]; /* 122-127 */
126 struct CPUEntry entries[0];
127 } QEMU_PACKED ReadInfo;
128
129 typedef struct ReadCpuInfo {
130 SCCBHeader h;
131 uint16_t nr_configured; /* 8-9 */
132 uint16_t offset_configured; /* 10-11 */
133 uint16_t nr_standby; /* 12-13 */
134 uint16_t offset_standby; /* 14-15 */
135 uint8_t reserved0[24-16]; /* 16-23 */
136 struct CPUEntry entries[0];
137 } QEMU_PACKED ReadCpuInfo;
138
139 typedef struct ReadStorageElementInfo {
140 SCCBHeader h;
141 uint16_t max_id;
142 uint16_t assigned;
143 uint16_t standby;
144 uint8_t _reserved0[16 - 14]; /* 14-15 */
145 uint32_t entries[0];
146 } QEMU_PACKED ReadStorageElementInfo;
147
148 typedef struct AttachStorageElement {
149 SCCBHeader h;
150 uint8_t _reserved0[10 - 8]; /* 8-9 */
151 uint16_t assigned;
152 uint8_t _reserved1[16 - 12]; /* 12-15 */
153 uint32_t entries[0];
154 } QEMU_PACKED AttachStorageElement;
155
156 typedef struct AssignStorage {
157 SCCBHeader h;
158 uint16_t rn;
159 } QEMU_PACKED AssignStorage;
160
161 typedef struct SCCB {
162 SCCBHeader h;
163 char data[SCCB_DATA_LEN];
164 } QEMU_PACKED SCCB;
165
166 #define TYPE_SCLP "sclp"
167 #define SCLP(obj) OBJECT_CHECK(SCLPDevice, (obj), TYPE_SCLP)
168 #define SCLP_CLASS(oc) OBJECT_CLASS_CHECK(SCLPDeviceClass, (oc), TYPE_SCLP)
169 #define SCLP_GET_CLASS(obj) OBJECT_GET_CLASS(SCLPDeviceClass, (obj), TYPE_SCLP)
170
171 typedef struct SCLPEventFacility SCLPEventFacility;
172
173 typedef struct SCLPDevice {
174 /* private */
175 DeviceState parent_obj;
176 SCLPEventFacility *event_facility;
177 int increment_size;
178
179 /* public */
180 } SCLPDevice;
181
182 typedef struct SCLPDeviceClass {
183 /* private */
184 DeviceClass parent_class;
185 void (*read_SCP_info)(SCLPDevice *sclp, SCCB *sccb);
186 void (*read_storage_element0_info)(SCLPDevice *sclp, SCCB *sccb);
187 void (*read_storage_element1_info)(SCLPDevice *sclp, SCCB *sccb);
188 void (*attach_storage_element)(SCLPDevice *sclp, SCCB *sccb,
189 uint16_t element);
190 void (*assign_storage)(SCLPDevice *sclp, SCCB *sccb);
191 void (*unassign_storage)(SCLPDevice *sclp, SCCB *sccb);
192 void (*read_cpu_info)(SCLPDevice *sclp, SCCB *sccb);
193
194 /* public */
195 void (*execute)(SCLPDevice *sclp, SCCB *sccb, uint32_t code);
196 void (*service_interrupt)(SCLPDevice *sclp, uint32_t sccb);
197 } SCLPDeviceClass;
198
199 typedef struct sclpMemoryHotplugDev sclpMemoryHotplugDev;
200
201 #define TYPE_SCLP_MEMORY_HOTPLUG_DEV "sclp-memory-hotplug-dev"
202 #define SCLP_MEMORY_HOTPLUG_DEV(obj) \
203 OBJECT_CHECK(sclpMemoryHotplugDev, (obj), TYPE_SCLP_MEMORY_HOTPLUG_DEV)
204
205 struct sclpMemoryHotplugDev {
206 SysBusDevice parent;
207 ram_addr_t standby_mem_size;
208 ram_addr_t padded_ram_size;
209 ram_addr_t pad_size;
210 ram_addr_t standby_subregion_size;
211 ram_addr_t rzm;
212 int increment_size;
213 char *standby_state_map;
214 };
215
216 static inline int sccb_data_len(SCCB *sccb)
217 {
218 return be16_to_cpu(sccb->h.length) - sizeof(sccb->h);
219 }
220
221
222 void s390_sclp_init(void);
223 sclpMemoryHotplugDev *init_sclp_memory_hotplug_dev(void);
224 sclpMemoryHotplugDev *get_sclp_memory_hotplug_dev(void);
225 void sclp_service_interrupt(uint32_t sccb);
226 void raise_irq_cpu_hotplug(void);
227
228 #endif