hw/intc/armv7m_nvic: Provide default "reset the system" behaviour for SYSRESETREQ
[qemu.git] / include / hw / timer / nrf51_timer.h
1 /*
2 * nRF51 System-on-Chip Timer peripheral
3 *
4 * QEMU interface:
5 * + sysbus MMIO regions 0: GPIO registers
6 * + sysbus irq
7 *
8 * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
9 *
10 * This code is licensed under the GPL version 2 or later. See
11 * the COPYING file in the top-level directory.
12 */
13 #ifndef NRF51_TIMER_H
14 #define NRF51_TIMER_H
15
16 #include "hw/sysbus.h"
17 #include "qemu/timer.h"
18 #define TYPE_NRF51_TIMER "nrf51_soc.timer"
19 #define NRF51_TIMER(obj) OBJECT_CHECK(NRF51TimerState, (obj), TYPE_NRF51_TIMER)
20
21 #define NRF51_TIMER_REG_COUNT 4
22
23 #define NRF51_TIMER_TASK_START 0x000
24 #define NRF51_TIMER_TASK_STOP 0x004
25 #define NRF51_TIMER_TASK_COUNT 0x008
26 #define NRF51_TIMER_TASK_CLEAR 0x00C
27 #define NRF51_TIMER_TASK_SHUTDOWN 0x010
28 #define NRF51_TIMER_TASK_CAPTURE_0 0x040
29 #define NRF51_TIMER_TASK_CAPTURE_3 0x04C
30
31 #define NRF51_TIMER_EVENT_COMPARE_0 0x140
32 #define NRF51_TIMER_EVENT_COMPARE_1 0x144
33 #define NRF51_TIMER_EVENT_COMPARE_2 0x148
34 #define NRF51_TIMER_EVENT_COMPARE_3 0x14C
35
36 #define NRF51_TIMER_REG_SHORTS 0x200
37 #define NRF51_TIMER_REG_SHORTS_MASK 0xf0f
38 #define NRF51_TIMER_REG_INTENSET 0x304
39 #define NRF51_TIMER_REG_INTENCLR 0x308
40 #define NRF51_TIMER_REG_INTEN_MASK 0xf0000
41 #define NRF51_TIMER_REG_MODE 0x504
42 #define NRF51_TIMER_REG_MODE_MASK 0x01
43 #define NRF51_TIMER_TIMER 0
44 #define NRF51_TIMER_COUNTER 1
45 #define NRF51_TIMER_REG_BITMODE 0x508
46 #define NRF51_TIMER_REG_BITMODE_MASK 0x03
47 #define NRF51_TIMER_WIDTH_16 0
48 #define NRF51_TIMER_WIDTH_8 1
49 #define NRF51_TIMER_WIDTH_24 2
50 #define NRF51_TIMER_WIDTH_32 3
51 #define NRF51_TIMER_REG_PRESCALER 0x510
52 #define NRF51_TIMER_REG_PRESCALER_MASK 0x0F
53 #define NRF51_TIMER_REG_CC0 0x540
54 #define NRF51_TIMER_REG_CC3 0x54C
55
56 typedef struct NRF51TimerState {
57 SysBusDevice parent_obj;
58
59 MemoryRegion iomem;
60 qemu_irq irq;
61
62 uint8_t id;
63 QEMUTimer timer;
64 int64_t timer_start_ns;
65 int64_t update_counter_ns;
66 uint32_t counter;
67
68 bool running;
69
70 uint8_t events_compare[NRF51_TIMER_REG_COUNT];
71 uint32_t cc[NRF51_TIMER_REG_COUNT];
72 uint32_t shorts;
73 uint32_t inten;
74 uint32_t mode;
75 uint32_t bitmode;
76 uint32_t prescaler;
77
78 } NRF51TimerState;
79
80
81 #endif