ppc/pnv: Add a HIOMAP erase command
[qemu.git] / include / hw / virtio / virtio-gpu.h
1 /*
2 * Virtio GPU Device
3 *
4 * Copyright Red Hat, Inc. 2013-2014
5 *
6 * Authors:
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2.
11 * See the COPYING file in the top-level directory.
12 */
13
14 #ifndef HW_VIRTIO_GPU_H
15 #define HW_VIRTIO_GPU_H
16
17 #include "qemu/queue.h"
18 #include "ui/qemu-pixman.h"
19 #include "ui/console.h"
20 #include "hw/virtio/virtio.h"
21 #include "qemu/log.h"
22 #include "sysemu/vhost-user-backend.h"
23
24 #include "standard-headers/linux/virtio_gpu.h"
25
26 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base"
27 #define VIRTIO_GPU_BASE(obj) \
28 OBJECT_CHECK(VirtIOGPUBase, (obj), TYPE_VIRTIO_GPU_BASE)
29 #define VIRTIO_GPU_BASE_GET_CLASS(obj) \
30 OBJECT_GET_CLASS(VirtIOGPUBaseClass, obj, TYPE_VIRTIO_GPU_BASE)
31 #define VIRTIO_GPU_BASE_CLASS(klass) \
32 OBJECT_CLASS_CHECK(VirtIOGPUBaseClass, klass, TYPE_VIRTIO_GPU_BASE)
33
34 #define TYPE_VIRTIO_GPU "virtio-gpu-device"
35 #define VIRTIO_GPU(obj) \
36 OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU)
37
38 #define TYPE_VHOST_USER_GPU "vhost-user-gpu"
39 #define VHOST_USER_GPU(obj) \
40 OBJECT_CHECK(VhostUserGPU, (obj), TYPE_VHOST_USER_GPU)
41
42 #define VIRTIO_ID_GPU 16
43
44 struct virtio_gpu_simple_resource {
45 uint32_t resource_id;
46 uint32_t width;
47 uint32_t height;
48 uint32_t format;
49 uint64_t *addrs;
50 struct iovec *iov;
51 unsigned int iov_cnt;
52 uint32_t scanout_bitmask;
53 pixman_image_t *image;
54 uint64_t hostmem;
55 QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
56 };
57
58 struct virtio_gpu_scanout {
59 QemuConsole *con;
60 DisplaySurface *ds;
61 uint32_t width, height;
62 int x, y;
63 int invalidate;
64 uint32_t resource_id;
65 struct virtio_gpu_update_cursor cursor;
66 QEMUCursor *current_cursor;
67 };
68
69 struct virtio_gpu_requested_state {
70 uint32_t width, height;
71 int x, y;
72 };
73
74 enum virtio_gpu_base_conf_flags {
75 VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,
76 VIRTIO_GPU_FLAG_STATS_ENABLED,
77 VIRTIO_GPU_FLAG_EDID_ENABLED,
78 };
79
80 #define virtio_gpu_virgl_enabled(_cfg) \
81 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
82 #define virtio_gpu_stats_enabled(_cfg) \
83 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
84 #define virtio_gpu_edid_enabled(_cfg) \
85 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED))
86
87 struct virtio_gpu_base_conf {
88 uint32_t max_outputs;
89 uint32_t flags;
90 uint32_t xres;
91 uint32_t yres;
92 };
93
94 struct virtio_gpu_ctrl_command {
95 VirtQueueElement elem;
96 VirtQueue *vq;
97 struct virtio_gpu_ctrl_hdr cmd_hdr;
98 uint32_t error;
99 bool finished;
100 QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
101 };
102
103 typedef struct VirtIOGPUBase {
104 VirtIODevice parent_obj;
105
106 Error *migration_blocker;
107
108 struct virtio_gpu_base_conf conf;
109 struct virtio_gpu_config virtio_config;
110
111 bool use_virgl_renderer;
112 int renderer_blocked;
113 int enable;
114
115 struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
116
117 int enabled_output_bitmask;
118 struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS];
119 } VirtIOGPUBase;
120
121 typedef struct VirtIOGPUBaseClass {
122 VirtioDeviceClass parent;
123
124 void (*gl_unblock)(VirtIOGPUBase *g);
125 } VirtIOGPUBaseClass;
126
127 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \
128 DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \
129 DEFINE_PROP_BIT("edid", _state, _conf.flags, \
130 VIRTIO_GPU_FLAG_EDID_ENABLED, true), \
131 DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \
132 DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768)
133
134 typedef struct VirtIOGPU {
135 VirtIOGPUBase parent_obj;
136
137 uint64_t conf_max_hostmem;
138
139 VirtQueue *ctrl_vq;
140 VirtQueue *cursor_vq;
141
142 QEMUBH *ctrl_bh;
143 QEMUBH *cursor_bh;
144
145 QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
146 QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;
147 QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
148
149 uint64_t hostmem;
150
151 bool renderer_inited;
152 bool renderer_reset;
153 QEMUTimer *fence_poll;
154 QEMUTimer *print_stats;
155
156 uint32_t inflight;
157 struct {
158 uint32_t max_inflight;
159 uint32_t requests;
160 uint32_t req_3d;
161 uint32_t bytes_3d;
162 } stats;
163 } VirtIOGPU;
164
165 typedef struct VhostUserGPU {
166 VirtIOGPUBase parent_obj;
167
168 VhostUserBackend *vhost;
169 int vhost_gpu_fd; /* closed by the chardev */
170 CharBackend vhost_chr;
171 QemuDmaBuf dmabuf[VIRTIO_GPU_MAX_SCANOUTS];
172 bool backend_blocked;
173 } VhostUserGPU;
174
175 extern const GraphicHwOps virtio_gpu_ops;
176
177 #define VIRTIO_GPU_FILL_CMD(out) do { \
178 size_t s; \
179 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \
180 &out, sizeof(out)); \
181 if (s != sizeof(out)) { \
182 qemu_log_mask(LOG_GUEST_ERROR, \
183 "%s: command size incorrect %zu vs %zu\n", \
184 __func__, s, sizeof(out)); \
185 return; \
186 } \
187 } while (0)
188
189 /* virtio-gpu-base.c */
190 bool virtio_gpu_base_device_realize(DeviceState *qdev,
191 VirtIOHandleOutput ctrl_cb,
192 VirtIOHandleOutput cursor_cb,
193 Error **errp);
194 void virtio_gpu_base_reset(VirtIOGPUBase *g);
195 void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g,
196 struct virtio_gpu_resp_display_info *dpy_info);
197
198 /* virtio-gpu.c */
199 void virtio_gpu_ctrl_response(VirtIOGPU *g,
200 struct virtio_gpu_ctrl_command *cmd,
201 struct virtio_gpu_ctrl_hdr *resp,
202 size_t resp_len);
203 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
204 struct virtio_gpu_ctrl_command *cmd,
205 enum virtio_gpu_ctrl_type type);
206 void virtio_gpu_get_display_info(VirtIOGPU *g,
207 struct virtio_gpu_ctrl_command *cmd);
208 void virtio_gpu_get_edid(VirtIOGPU *g,
209 struct virtio_gpu_ctrl_command *cmd);
210 int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
211 struct virtio_gpu_resource_attach_backing *ab,
212 struct virtio_gpu_ctrl_command *cmd,
213 uint64_t **addr, struct iovec **iov);
214 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
215 struct iovec *iov, uint32_t count);
216 void virtio_gpu_process_cmdq(VirtIOGPU *g);
217
218 /* virtio-gpu-3d.c */
219 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
220 struct virtio_gpu_ctrl_command *cmd);
221 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);
222 void virtio_gpu_virgl_reset(VirtIOGPU *g);
223 int virtio_gpu_virgl_init(VirtIOGPU *g);
224 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g);
225
226 #endif