Merge remote-tracking branch 'remotes/vivier/tags/trivial-branch-for-6.2-pull-request...
[qemu.git] / include / hw / watchdog / cmsdk-apb-watchdog.h
1 /*
2 * ARM CMSDK APB watchdog emulation
3 *
4 * Copyright (c) 2018 Linaro Limited
5 * Written by Peter Maydell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
10 */
11
12 /*
13 * This is a model of the "APB watchdog" which is part of the Cortex-M
14 * System Design Kit (CMSDK) and documented in the Cortex-M System
15 * Design Kit Technical Reference Manual (ARM DDI0479C):
16 * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit
17 *
18 * QEMU interface:
19 * + Clock input "WDOGCLK": clock for the watchdog's timer
20 * + sysbus MMIO region 0: the register bank
21 * + sysbus IRQ 0: watchdog interrupt
22 *
23 * In real hardware the watchdog's reset output is just a GPIO line
24 * which can then be masked by the board or treated as a simple interrupt.
25 * (For instance the IoTKit does this with the non-secure watchdog, so that
26 * secure code can control whether non-secure code can perform a system
27 * reset via its watchdog.) In QEMU, we just wire up the watchdog reset
28 * to watchdog_perform_action(), at least for the moment.
29 */
30
31 #ifndef CMSDK_APB_WATCHDOG_H
32 #define CMSDK_APB_WATCHDOG_H
33
34 #include "hw/sysbus.h"
35 #include "hw/ptimer.h"
36 #include "hw/clock.h"
37 #include "qom/object.h"
38
39 #define TYPE_CMSDK_APB_WATCHDOG "cmsdk-apb-watchdog"
40 OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBWatchdog, CMSDK_APB_WATCHDOG)
41
42 /*
43 * This shares the same struct (and cast macro) as the base
44 * cmsdk-apb-watchdog device.
45 */
46 #define TYPE_LUMINARY_WATCHDOG "luminary-watchdog"
47
48 struct CMSDKAPBWatchdog {
49 /*< private >*/
50 SysBusDevice parent_obj;
51
52 /*< public >*/
53 MemoryRegion iomem;
54 qemu_irq wdogint;
55 bool is_luminary;
56 struct ptimer_state *timer;
57 Clock *wdogclk;
58
59 uint32_t control;
60 uint32_t intstatus;
61 uint32_t lock;
62 uint32_t itcr;
63 uint32_t itop;
64 uint32_t resetstatus;
65 const uint32_t *id;
66 };
67
68 #endif