cpu: Move icount_extra field from CPU_COMMON to CPUState
[qemu.git] / include / qom / cpu.h
1 /*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20 #ifndef QEMU_CPU_H
21 #define QEMU_CPU_H
22
23 #include <signal.h>
24 #include "hw/qdev-core.h"
25 #include "exec/hwaddr.h"
26 #include "qemu/queue.h"
27 #include "qemu/thread.h"
28 #include "qemu/tls.h"
29 #include "qemu/typedefs.h"
30
31 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
32 void *opaque);
33
34 /**
35 * vaddr:
36 * Type wide enough to contain any #target_ulong virtual address.
37 */
38 typedef uint64_t vaddr;
39 #define VADDR_PRId PRId64
40 #define VADDR_PRIu PRIu64
41 #define VADDR_PRIo PRIo64
42 #define VADDR_PRIx PRIx64
43 #define VADDR_PRIX PRIX64
44 #define VADDR_MAX UINT64_MAX
45
46 /**
47 * SECTION:cpu
48 * @section_id: QEMU-cpu
49 * @title: CPU Class
50 * @short_description: Base class for all CPUs
51 */
52
53 #define TYPE_CPU "cpu"
54
55 #define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU)
56 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
57 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
58
59 typedef struct CPUState CPUState;
60
61 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
62 bool is_write, bool is_exec, int opaque,
63 unsigned size);
64
65 struct TranslationBlock;
66
67 /**
68 * CPUClass:
69 * @class_by_name: Callback to map -cpu command line model name to an
70 * instantiatable CPU type.
71 * @parse_features: Callback to parse command line arguments.
72 * @reset: Callback to reset the #CPUState to its initial state.
73 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
74 * @has_work: Callback for checking if there is work to do.
75 * @do_interrupt: Callback for interrupt handling.
76 * @do_unassigned_access: Callback for unassigned access handling.
77 * @memory_rw_debug: Callback for GDB memory access.
78 * @dump_state: Callback for dumping state.
79 * @dump_statistics: Callback for dumping statistics.
80 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
81 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
82 * @get_memory_mapping: Callback for obtaining the memory mappings.
83 * @set_pc: Callback for setting the Program Counter register.
84 * @synchronize_from_tb: Callback for synchronizing state from a TCG
85 * #TranslationBlock.
86 * @handle_mmu_fault: Callback for handling an MMU fault.
87 * @get_phys_page_debug: Callback for obtaining a physical address.
88 * @gdb_read_register: Callback for letting GDB read a register.
89 * @gdb_write_register: Callback for letting GDB write a register.
90 * @vmsd: State description for migration.
91 * @gdb_num_core_regs: Number of core registers accessible to GDB.
92 * @gdb_core_xml_file: File name for core registers GDB XML description.
93 *
94 * Represents a CPU family or model.
95 */
96 typedef struct CPUClass {
97 /*< private >*/
98 DeviceClass parent_class;
99 /*< public >*/
100
101 ObjectClass *(*class_by_name)(const char *cpu_model);
102 void (*parse_features)(CPUState *cpu, char *str, Error **errp);
103
104 void (*reset)(CPUState *cpu);
105 int reset_dump_flags;
106 bool (*has_work)(CPUState *cpu);
107 void (*do_interrupt)(CPUState *cpu);
108 CPUUnassignedAccess do_unassigned_access;
109 int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
110 uint8_t *buf, int len, bool is_write);
111 void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
112 int flags);
113 void (*dump_statistics)(CPUState *cpu, FILE *f,
114 fprintf_function cpu_fprintf, int flags);
115 int64_t (*get_arch_id)(CPUState *cpu);
116 bool (*get_paging_enabled)(const CPUState *cpu);
117 void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
118 Error **errp);
119 void (*set_pc)(CPUState *cpu, vaddr value);
120 void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
121 int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
122 int mmu_index);
123 hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
124 int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
125 int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
126
127 int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
128 int cpuid, void *opaque);
129 int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
130 void *opaque);
131 int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
132 int cpuid, void *opaque);
133 int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
134 void *opaque);
135
136 const struct VMStateDescription *vmsd;
137 int gdb_num_core_regs;
138 const char *gdb_core_xml_file;
139 } CPUClass;
140
141 struct KVMState;
142 struct kvm_run;
143
144 /**
145 * CPUState:
146 * @cpu_index: CPU index (informative).
147 * @nr_cores: Number of cores within this CPU package.
148 * @nr_threads: Number of threads within this CPU.
149 * @numa_node: NUMA node this CPU is belonging to.
150 * @host_tid: Host thread ID.
151 * @running: #true if CPU is currently running (usermode).
152 * @created: Indicates whether the CPU thread has been successfully created.
153 * @interrupt_request: Indicates a pending interrupt request.
154 * @halted: Nonzero if the CPU is in suspended state.
155 * @stop: Indicates a pending stop request.
156 * @stopped: Indicates the CPU has been artificially stopped.
157 * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
158 * CPU and return to its top level loop.
159 * @singlestep_enabled: Flags for single-stepping.
160 * @icount_extra: Instructions until next timer event.
161 * @can_do_io: Nonzero if memory-mapped IO is safe.
162 * @env_ptr: Pointer to subclass-specific CPUArchState field.
163 * @current_tb: Currently executing TB.
164 * @gdb_regs: Additional GDB registers.
165 * @gdb_num_regs: Number of total registers accessible to GDB.
166 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
167 * @next_cpu: Next CPU sharing TB cache.
168 * @mem_io_pc: Host Program Counter at which the memory was accessed.
169 * @mem_io_vaddr: Target virtual address at which the memory was accessed.
170 * @kvm_fd: vCPU file descriptor for KVM.
171 *
172 * State of one CPU core or thread.
173 */
174 struct CPUState {
175 /*< private >*/
176 DeviceState parent_obj;
177 /*< public >*/
178
179 int nr_cores;
180 int nr_threads;
181 int numa_node;
182
183 struct QemuThread *thread;
184 #ifdef _WIN32
185 HANDLE hThread;
186 #endif
187 int thread_id;
188 uint32_t host_tid;
189 bool running;
190 struct QemuCond *halt_cond;
191 struct qemu_work_item *queued_work_first, *queued_work_last;
192 bool thread_kicked;
193 bool created;
194 bool stop;
195 bool stopped;
196 volatile sig_atomic_t exit_request;
197 volatile sig_atomic_t tcg_exit_req;
198 uint32_t interrupt_request;
199 int singlestep_enabled;
200 int64_t icount_extra;
201
202 AddressSpace *as;
203 MemoryListener *tcg_as_listener;
204
205 void *env_ptr; /* CPUArchState */
206 struct TranslationBlock *current_tb;
207 struct GDBRegisterState *gdb_regs;
208 int gdb_num_regs;
209 int gdb_num_g_regs;
210 QTAILQ_ENTRY(CPUState) node;
211
212 /* In order to avoid passing too many arguments to the MMIO helpers,
213 * we store some rarely used information in the CPU context.
214 */
215 uintptr_t mem_io_pc;
216 vaddr mem_io_vaddr;
217
218 int kvm_fd;
219 bool kvm_vcpu_dirty;
220 struct KVMState *kvm_state;
221 struct kvm_run *kvm_run;
222
223 /* TODO Move common fields from CPUArchState here. */
224 int cpu_index; /* used by alpha TCG */
225 uint32_t halted; /* used by alpha, cris, ppc TCG */
226 uint32_t can_do_io;
227 };
228
229 QTAILQ_HEAD(CPUTailQ, CPUState);
230 extern struct CPUTailQ cpus;
231 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
232 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
233 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
234 QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
235 #define first_cpu QTAILQ_FIRST(&cpus)
236
237 DECLARE_TLS(CPUState *, current_cpu);
238 #define current_cpu tls_var(current_cpu)
239
240 /**
241 * cpu_paging_enabled:
242 * @cpu: The CPU whose state is to be inspected.
243 *
244 * Returns: %true if paging is enabled, %false otherwise.
245 */
246 bool cpu_paging_enabled(const CPUState *cpu);
247
248 /**
249 * cpu_get_memory_mapping:
250 * @cpu: The CPU whose memory mappings are to be obtained.
251 * @list: Where to write the memory mappings to.
252 * @errp: Pointer for reporting an #Error.
253 */
254 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
255 Error **errp);
256
257 /**
258 * cpu_write_elf64_note:
259 * @f: pointer to a function that writes memory to a file
260 * @cpu: The CPU whose memory is to be dumped
261 * @cpuid: ID number of the CPU
262 * @opaque: pointer to the CPUState struct
263 */
264 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
265 int cpuid, void *opaque);
266
267 /**
268 * cpu_write_elf64_qemunote:
269 * @f: pointer to a function that writes memory to a file
270 * @cpu: The CPU whose memory is to be dumped
271 * @cpuid: ID number of the CPU
272 * @opaque: pointer to the CPUState struct
273 */
274 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
275 void *opaque);
276
277 /**
278 * cpu_write_elf32_note:
279 * @f: pointer to a function that writes memory to a file
280 * @cpu: The CPU whose memory is to be dumped
281 * @cpuid: ID number of the CPU
282 * @opaque: pointer to the CPUState struct
283 */
284 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
285 int cpuid, void *opaque);
286
287 /**
288 * cpu_write_elf32_qemunote:
289 * @f: pointer to a function that writes memory to a file
290 * @cpu: The CPU whose memory is to be dumped
291 * @cpuid: ID number of the CPU
292 * @opaque: pointer to the CPUState struct
293 */
294 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
295 void *opaque);
296
297 /**
298 * CPUDumpFlags:
299 * @CPU_DUMP_CODE:
300 * @CPU_DUMP_FPU: dump FPU register state, not just integer
301 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
302 */
303 enum CPUDumpFlags {
304 CPU_DUMP_CODE = 0x00010000,
305 CPU_DUMP_FPU = 0x00020000,
306 CPU_DUMP_CCOP = 0x00040000,
307 };
308
309 /**
310 * cpu_dump_state:
311 * @cpu: The CPU whose state is to be dumped.
312 * @f: File to dump to.
313 * @cpu_fprintf: Function to dump with.
314 * @flags: Flags what to dump.
315 *
316 * Dumps CPU state.
317 */
318 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
319 int flags);
320
321 /**
322 * cpu_dump_statistics:
323 * @cpu: The CPU whose state is to be dumped.
324 * @f: File to dump to.
325 * @cpu_fprintf: Function to dump with.
326 * @flags: Flags what to dump.
327 *
328 * Dumps CPU statistics.
329 */
330 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
331 int flags);
332
333 #ifndef CONFIG_USER_ONLY
334 /**
335 * cpu_get_phys_page_debug:
336 * @cpu: The CPU to obtain the physical page address for.
337 * @addr: The virtual address.
338 *
339 * Obtains the physical page corresponding to a virtual one.
340 * Use it only for debugging because no protection checks are done.
341 *
342 * Returns: Corresponding physical page address or -1 if no page found.
343 */
344 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
345 {
346 CPUClass *cc = CPU_GET_CLASS(cpu);
347
348 return cc->get_phys_page_debug(cpu, addr);
349 }
350 #endif
351
352 /**
353 * cpu_reset:
354 * @cpu: The CPU whose state is to be reset.
355 */
356 void cpu_reset(CPUState *cpu);
357
358 /**
359 * cpu_class_by_name:
360 * @typename: The CPU base type.
361 * @cpu_model: The model string without any parameters.
362 *
363 * Looks up a CPU #ObjectClass matching name @cpu_model.
364 *
365 * Returns: A #CPUClass or %NULL if not matching class is found.
366 */
367 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
368
369 /**
370 * cpu_generic_init:
371 * @typename: The CPU base type.
372 * @cpu_model: The model string including optional parameters.
373 *
374 * Instantiates a CPU, processes optional parameters and realizes the CPU.
375 *
376 * Returns: A #CPUState or %NULL if an error occurred.
377 */
378 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
379
380 /**
381 * cpu_has_work:
382 * @cpu: The vCPU to check.
383 *
384 * Checks whether the CPU has work to do.
385 *
386 * Returns: %true if the CPU has work, %false otherwise.
387 */
388 static inline bool cpu_has_work(CPUState *cpu)
389 {
390 CPUClass *cc = CPU_GET_CLASS(cpu);
391
392 g_assert(cc->has_work);
393 return cc->has_work(cpu);
394 }
395
396 /**
397 * qemu_cpu_is_self:
398 * @cpu: The vCPU to check against.
399 *
400 * Checks whether the caller is executing on the vCPU thread.
401 *
402 * Returns: %true if called from @cpu's thread, %false otherwise.
403 */
404 bool qemu_cpu_is_self(CPUState *cpu);
405
406 /**
407 * qemu_cpu_kick:
408 * @cpu: The vCPU to kick.
409 *
410 * Kicks @cpu's thread.
411 */
412 void qemu_cpu_kick(CPUState *cpu);
413
414 /**
415 * cpu_is_stopped:
416 * @cpu: The CPU to check.
417 *
418 * Checks whether the CPU is stopped.
419 *
420 * Returns: %true if run state is not running or if artificially stopped;
421 * %false otherwise.
422 */
423 bool cpu_is_stopped(CPUState *cpu);
424
425 /**
426 * run_on_cpu:
427 * @cpu: The vCPU to run on.
428 * @func: The function to be executed.
429 * @data: Data to pass to the function.
430 *
431 * Schedules the function @func for execution on the vCPU @cpu.
432 */
433 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
434
435 /**
436 * async_run_on_cpu:
437 * @cpu: The vCPU to run on.
438 * @func: The function to be executed.
439 * @data: Data to pass to the function.
440 *
441 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
442 */
443 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
444
445 /**
446 * qemu_get_cpu:
447 * @index: The CPUState@cpu_index value of the CPU to obtain.
448 *
449 * Gets a CPU matching @index.
450 *
451 * Returns: The CPU or %NULL if there is no matching CPU.
452 */
453 CPUState *qemu_get_cpu(int index);
454
455 /**
456 * cpu_exists:
457 * @id: Guest-exposed CPU ID to lookup.
458 *
459 * Search for CPU with specified ID.
460 *
461 * Returns: %true - CPU is found, %false - CPU isn't found.
462 */
463 bool cpu_exists(int64_t id);
464
465 #ifndef CONFIG_USER_ONLY
466
467 typedef void (*CPUInterruptHandler)(CPUState *, int);
468
469 extern CPUInterruptHandler cpu_interrupt_handler;
470
471 /**
472 * cpu_interrupt:
473 * @cpu: The CPU to set an interrupt on.
474 * @mask: The interupts to set.
475 *
476 * Invokes the interrupt handler.
477 */
478 static inline void cpu_interrupt(CPUState *cpu, int mask)
479 {
480 cpu_interrupt_handler(cpu, mask);
481 }
482
483 #else /* USER_ONLY */
484
485 void cpu_interrupt(CPUState *cpu, int mask);
486
487 #endif /* USER_ONLY */
488
489 #ifndef CONFIG_USER_ONLY
490
491 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
492 bool is_write, bool is_exec,
493 int opaque, unsigned size)
494 {
495 CPUClass *cc = CPU_GET_CLASS(cpu);
496
497 if (cc->do_unassigned_access) {
498 cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
499 }
500 }
501
502 #endif
503
504 /**
505 * cpu_reset_interrupt:
506 * @cpu: The CPU to clear the interrupt on.
507 * @mask: The interrupt mask to clear.
508 *
509 * Resets interrupts on the vCPU @cpu.
510 */
511 void cpu_reset_interrupt(CPUState *cpu, int mask);
512
513 /**
514 * cpu_exit:
515 * @cpu: The CPU to exit.
516 *
517 * Requests the CPU @cpu to exit execution.
518 */
519 void cpu_exit(CPUState *cpu);
520
521 /**
522 * cpu_resume:
523 * @cpu: The CPU to resume.
524 *
525 * Resumes CPU, i.e. puts CPU into runnable state.
526 */
527 void cpu_resume(CPUState *cpu);
528
529 /**
530 * qemu_init_vcpu:
531 * @cpu: The vCPU to initialize.
532 *
533 * Initializes a vCPU.
534 */
535 void qemu_init_vcpu(CPUState *cpu);
536
537 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
538 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
539 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
540
541 /**
542 * cpu_single_step:
543 * @cpu: CPU to the flags for.
544 * @enabled: Flags to enable.
545 *
546 * Enables or disables single-stepping for @cpu.
547 */
548 void cpu_single_step(CPUState *cpu, int enabled);
549
550 #ifdef CONFIG_SOFTMMU
551 extern const struct VMStateDescription vmstate_cpu_common;
552 #else
553 #define vmstate_cpu_common vmstate_dummy
554 #endif
555
556 #define VMSTATE_CPU() { \
557 .name = "parent_obj", \
558 .size = sizeof(CPUState), \
559 .vmsd = &vmstate_cpu_common, \
560 .flags = VMS_STRUCT, \
561 .offset = 0, \
562 }
563
564 #endif