numa: add -numa node,memdev= option
[qemu.git] / include / sysemu / dma.h
1 /*
2 * DMA helper functions
3 *
4 * Copyright (c) 2009 Red Hat
5 *
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
8 */
9
10 #ifndef DMA_H
11 #define DMA_H
12
13 #include <stdio.h>
14 #include "exec/memory.h"
15 #include "exec/address-spaces.h"
16 #include "hw/hw.h"
17 #include "block/block.h"
18 #include "sysemu/kvm.h"
19
20 typedef struct ScatterGatherEntry ScatterGatherEntry;
21
22 typedef enum {
23 DMA_DIRECTION_TO_DEVICE = 0,
24 DMA_DIRECTION_FROM_DEVICE = 1,
25 } DMADirection;
26
27 struct QEMUSGList {
28 ScatterGatherEntry *sg;
29 int nsg;
30 int nalloc;
31 size_t size;
32 DeviceState *dev;
33 AddressSpace *as;
34 };
35
36 #ifndef CONFIG_USER_ONLY
37
38 /*
39 * When an IOMMU is present, bus addresses become distinct from
40 * CPU/memory physical addresses and may be a different size. Because
41 * the IOVA size depends more on the bus than on the platform, we more
42 * or less have to treat these as 64-bit always to cover all (or at
43 * least most) cases.
44 */
45 typedef uint64_t dma_addr_t;
46
47 #define DMA_ADDR_BITS 64
48 #define DMA_ADDR_FMT "%" PRIx64
49
50 static inline void dma_barrier(AddressSpace *as, DMADirection dir)
51 {
52 /*
53 * This is called before DMA read and write operations
54 * unless the _relaxed form is used and is responsible
55 * for providing some sane ordering of accesses vs
56 * concurrently running VCPUs.
57 *
58 * Users of map(), unmap() or lower level st/ld_*
59 * operations are responsible for providing their own
60 * ordering via barriers.
61 *
62 * This primitive implementation does a simple smp_mb()
63 * before each operation which provides pretty much full
64 * ordering.
65 *
66 * A smarter implementation can be devised if needed to
67 * use lighter barriers based on the direction of the
68 * transfer, the DMA context, etc...
69 */
70 if (kvm_enabled()) {
71 smp_mb();
72 }
73 }
74
75 /* Checks that the given range of addresses is valid for DMA. This is
76 * useful for certain cases, but usually you should just use
77 * dma_memory_{read,write}() and check for errors */
78 static inline bool dma_memory_valid(AddressSpace *as,
79 dma_addr_t addr, dma_addr_t len,
80 DMADirection dir)
81 {
82 return address_space_access_valid(as, addr, len,
83 dir == DMA_DIRECTION_FROM_DEVICE);
84 }
85
86 static inline int dma_memory_rw_relaxed(AddressSpace *as, dma_addr_t addr,
87 void *buf, dma_addr_t len,
88 DMADirection dir)
89 {
90 return address_space_rw(as, addr, buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
91 }
92
93 static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr,
94 void *buf, dma_addr_t len)
95 {
96 return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
97 }
98
99 static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr,
100 const void *buf, dma_addr_t len)
101 {
102 return dma_memory_rw_relaxed(as, addr, (void *)buf, len,
103 DMA_DIRECTION_FROM_DEVICE);
104 }
105
106 static inline int dma_memory_rw(AddressSpace *as, dma_addr_t addr,
107 void *buf, dma_addr_t len,
108 DMADirection dir)
109 {
110 dma_barrier(as, dir);
111
112 return dma_memory_rw_relaxed(as, addr, buf, len, dir);
113 }
114
115 static inline int dma_memory_read(AddressSpace *as, dma_addr_t addr,
116 void *buf, dma_addr_t len)
117 {
118 return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
119 }
120
121 static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
122 const void *buf, dma_addr_t len)
123 {
124 return dma_memory_rw(as, addr, (void *)buf, len,
125 DMA_DIRECTION_FROM_DEVICE);
126 }
127
128 int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len);
129
130 static inline void *dma_memory_map(AddressSpace *as,
131 dma_addr_t addr, dma_addr_t *len,
132 DMADirection dir)
133 {
134 hwaddr xlen = *len;
135 void *p;
136
137 p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE);
138 *len = xlen;
139 return p;
140 }
141
142 static inline void dma_memory_unmap(AddressSpace *as,
143 void *buffer, dma_addr_t len,
144 DMADirection dir, dma_addr_t access_len)
145 {
146 address_space_unmap(as, buffer, (hwaddr)len,
147 dir == DMA_DIRECTION_FROM_DEVICE, access_len);
148 }
149
150 #define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \
151 static inline uint##_bits##_t ld##_lname##_##_end##_dma(AddressSpace *as, \
152 dma_addr_t addr) \
153 { \
154 uint##_bits##_t val; \
155 dma_memory_read(as, addr, &val, (_bits) / 8); \
156 return _end##_bits##_to_cpu(val); \
157 } \
158 static inline void st##_sname##_##_end##_dma(AddressSpace *as, \
159 dma_addr_t addr, \
160 uint##_bits##_t val) \
161 { \
162 val = cpu_to_##_end##_bits(val); \
163 dma_memory_write(as, addr, &val, (_bits) / 8); \
164 }
165
166 static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr)
167 {
168 uint8_t val;
169
170 dma_memory_read(as, addr, &val, 1);
171 return val;
172 }
173
174 static inline void stb_dma(AddressSpace *as, dma_addr_t addr, uint8_t val)
175 {
176 dma_memory_write(as, addr, &val, 1);
177 }
178
179 DEFINE_LDST_DMA(uw, w, 16, le);
180 DEFINE_LDST_DMA(l, l, 32, le);
181 DEFINE_LDST_DMA(q, q, 64, le);
182 DEFINE_LDST_DMA(uw, w, 16, be);
183 DEFINE_LDST_DMA(l, l, 32, be);
184 DEFINE_LDST_DMA(q, q, 64, be);
185
186 #undef DEFINE_LDST_DMA
187
188 struct ScatterGatherEntry {
189 dma_addr_t base;
190 dma_addr_t len;
191 };
192
193 void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
194 AddressSpace *as);
195 void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len);
196 void qemu_sglist_destroy(QEMUSGList *qsg);
197 #endif
198
199 typedef BlockDriverAIOCB *DMAIOFunc(BlockDriverState *bs, int64_t sector_num,
200 QEMUIOVector *iov, int nb_sectors,
201 BlockDriverCompletionFunc *cb, void *opaque);
202
203 BlockDriverAIOCB *dma_bdrv_io(BlockDriverState *bs,
204 QEMUSGList *sg, uint64_t sector_num,
205 DMAIOFunc *io_func, BlockDriverCompletionFunc *cb,
206 void *opaque, DMADirection dir);
207 BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs,
208 QEMUSGList *sg, uint64_t sector,
209 BlockDriverCompletionFunc *cb, void *opaque);
210 BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs,
211 QEMUSGList *sg, uint64_t sector,
212 BlockDriverCompletionFunc *cb, void *opaque);
213 uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg);
214 uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg);
215
216 void dma_acct_start(BlockDriverState *bs, BlockAcctCookie *cookie,
217 QEMUSGList *sg, enum BlockAcctType type);
218
219 #endif