tmp105: Correct handling of temperature limit checks
[qemu.git] / linux-user / arm / nwfpe / fpa11.c
1 /*
2 NetWinder Floating Point Emulator
3 (c) Rebel.COM, 1998,1999
4
5 Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include "qemu/osdep.h"
22 #include "fpa11.h"
23
24 #include "fpopcode.h"
25
26 //#include "fpmodule.h"
27 //#include "fpmodule.inl"
28
29 //#include <asm/system.h>
30
31
32 FPA11* qemufpa = NULL;
33 CPUARMState* user_registers;
34
35 /* Reset the FPA11 chip. Called to initialize and reset the emulator. */
36 void resetFPA11(void)
37 {
38 int i;
39 FPA11 *fpa11 = GET_FPA11();
40
41 /* initialize the register type array */
42 for (i=0;i<=7;i++)
43 {
44 fpa11->fType[i] = typeNone;
45 }
46
47 /* FPSR: set system id to FP_EMULATOR, set AC, clear all other bits */
48 fpa11->fpsr = FP_EMULATOR | BIT_AC;
49
50 /* FPCR: set SB, AB and DA bits, clear all others */
51 #ifdef MAINTAIN_FPCR
52 fpa11->fpcr = MASK_RESET;
53 #endif
54 }
55
56 void SetRoundingMode(const unsigned int opcode)
57 {
58 int rounding_mode;
59 FPA11 *fpa11 = GET_FPA11();
60
61 #ifdef MAINTAIN_FPCR
62 fpa11->fpcr &= ~MASK_ROUNDING_MODE;
63 #endif
64 switch (opcode & MASK_ROUNDING_MODE)
65 {
66 default:
67 case ROUND_TO_NEAREST:
68 rounding_mode = float_round_nearest_even;
69 #ifdef MAINTAIN_FPCR
70 fpa11->fpcr |= ROUND_TO_NEAREST;
71 #endif
72 break;
73
74 case ROUND_TO_PLUS_INFINITY:
75 rounding_mode = float_round_up;
76 #ifdef MAINTAIN_FPCR
77 fpa11->fpcr |= ROUND_TO_PLUS_INFINITY;
78 #endif
79 break;
80
81 case ROUND_TO_MINUS_INFINITY:
82 rounding_mode = float_round_down;
83 #ifdef MAINTAIN_FPCR
84 fpa11->fpcr |= ROUND_TO_MINUS_INFINITY;
85 #endif
86 break;
87
88 case ROUND_TO_ZERO:
89 rounding_mode = float_round_to_zero;
90 #ifdef MAINTAIN_FPCR
91 fpa11->fpcr |= ROUND_TO_ZERO;
92 #endif
93 break;
94 }
95 set_float_rounding_mode(rounding_mode, &fpa11->fp_status);
96 }
97
98 void SetRoundingPrecision(const unsigned int opcode)
99 {
100 int rounding_precision;
101 FPA11 *fpa11 = GET_FPA11();
102 #ifdef MAINTAIN_FPCR
103 fpa11->fpcr &= ~MASK_ROUNDING_PRECISION;
104 #endif
105 switch (opcode & MASK_ROUNDING_PRECISION)
106 {
107 case ROUND_SINGLE:
108 rounding_precision = 32;
109 #ifdef MAINTAIN_FPCR
110 fpa11->fpcr |= ROUND_SINGLE;
111 #endif
112 break;
113
114 case ROUND_DOUBLE:
115 rounding_precision = 64;
116 #ifdef MAINTAIN_FPCR
117 fpa11->fpcr |= ROUND_DOUBLE;
118 #endif
119 break;
120
121 case ROUND_EXTENDED:
122 rounding_precision = 80;
123 #ifdef MAINTAIN_FPCR
124 fpa11->fpcr |= ROUND_EXTENDED;
125 #endif
126 break;
127
128 default: rounding_precision = 80;
129 }
130 set_floatx80_rounding_precision(rounding_precision, &fpa11->fp_status);
131 }
132
133 /* Emulate the instruction in the opcode. */
134 /* ??? This is not thread safe. */
135 unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs)
136 {
137 unsigned int nRc = 0;
138 // unsigned long flags;
139 FPA11 *fpa11;
140 unsigned int cp;
141 // save_flags(flags); sti();
142
143 /* Check that this is really an FPA11 instruction: the coprocessor
144 * field in bits [11:8] must be 1 or 2.
145 */
146 cp = (opcode >> 8) & 0xf;
147 if (cp != 1 && cp != 2) {
148 return 0;
149 }
150
151 qemufpa=qfpa;
152 user_registers=qregs;
153
154 #if 0
155 fprintf(stderr,"emulating FP insn 0x%08x, PC=0x%08x\n",
156 opcode, qregs[ARM_REG_PC]);
157 #endif
158 fpa11 = GET_FPA11();
159
160 if (fpa11->initflag == 0) /* good place for __builtin_expect */
161 {
162 resetFPA11();
163 SetRoundingMode(ROUND_TO_NEAREST);
164 SetRoundingPrecision(ROUND_EXTENDED);
165 fpa11->initflag = 1;
166 }
167
168 set_float_exception_flags(0, &fpa11->fp_status);
169
170 if (TEST_OPCODE(opcode,MASK_CPRT))
171 {
172 //fprintf(stderr,"emulating CPRT\n");
173 /* Emulate conversion opcodes. */
174 /* Emulate register transfer opcodes. */
175 /* Emulate comparison opcodes. */
176 nRc = EmulateCPRT(opcode);
177 }
178 else if (TEST_OPCODE(opcode,MASK_CPDO))
179 {
180 //fprintf(stderr,"emulating CPDO\n");
181 /* Emulate monadic arithmetic opcodes. */
182 /* Emulate dyadic arithmetic opcodes. */
183 nRc = EmulateCPDO(opcode);
184 }
185 else if (TEST_OPCODE(opcode,MASK_CPDT))
186 {
187 //fprintf(stderr,"emulating CPDT\n");
188 /* Emulate load/store opcodes. */
189 /* Emulate load/store multiple opcodes. */
190 nRc = EmulateCPDT(opcode);
191 }
192 else
193 {
194 /* Invalid instruction detected. Return FALSE. */
195 nRc = 0;
196 }
197
198 // restore_flags(flags);
199 if(nRc == 1 && get_float_exception_flags(&fpa11->fp_status))
200 {
201 //printf("fef 0x%x\n",float_exception_flags);
202 nRc = -get_float_exception_flags(&fpa11->fp_status);
203 }
204
205 //printf("returning %d\n",nRc);
206 return(nRc);
207 }
208
209 #if 0
210 unsigned int EmulateAll1(unsigned int opcode)
211 {
212 switch ((opcode >> 24) & 0xf)
213 {
214 case 0xc:
215 case 0xd:
216 if ((opcode >> 20) & 0x1)
217 {
218 switch ((opcode >> 8) & 0xf)
219 {
220 case 0x1: return PerformLDF(opcode); break;
221 case 0x2: return PerformLFM(opcode); break;
222 default: return 0;
223 }
224 }
225 else
226 {
227 switch ((opcode >> 8) & 0xf)
228 {
229 case 0x1: return PerformSTF(opcode); break;
230 case 0x2: return PerformSFM(opcode); break;
231 default: return 0;
232 }
233 }
234 break;
235
236 case 0xe:
237 if (opcode & 0x10)
238 return EmulateCPDO(opcode);
239 else
240 return EmulateCPRT(opcode);
241 break;
242
243 default: return 0;
244 }
245 }
246 #endif