Delete unused tb_invalidate_page_range
[qemu.git] / linux-user / main.c
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19 #include <stdlib.h>
20 #include <stdio.h>
21 #include <stdarg.h>
22 #include <string.h>
23 #include <errno.h>
24 #include <unistd.h>
25 #include <sys/mman.h>
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
28
29 #include "qemu.h"
30 #include "qemu-common.h"
31 #include "cache-utils.h"
32 /* For tb_lock */
33 #include "exec-all.h"
34 #include "tcg.h"
35 #include "qemu-timer.h"
36 #include "envlist.h"
37
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
39
40 char *exec_path;
41
42 int singlestep;
43 unsigned long mmap_min_addr;
44 #if defined(CONFIG_USE_GUEST_BASE)
45 unsigned long guest_base;
46 int have_guest_base;
47 unsigned long reserved_va;
48 #endif
49
50 static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
51 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
52
53 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
54 we allocate a bigger stack. Need a better solution, for example
55 by remapping the process stack directly at the right place */
56 unsigned long guest_stack_size = 8 * 1024 * 1024UL;
57
58 void gemu_log(const char *fmt, ...)
59 {
60 va_list ap;
61
62 va_start(ap, fmt);
63 vfprintf(stderr, fmt, ap);
64 va_end(ap);
65 }
66
67 #if defined(TARGET_I386)
68 int cpu_get_pic_interrupt(CPUState *env)
69 {
70 return -1;
71 }
72 #endif
73
74 /* timers for rdtsc */
75
76 #if 0
77
78 static uint64_t emu_time;
79
80 int64_t cpu_get_real_ticks(void)
81 {
82 return emu_time++;
83 }
84
85 #endif
86
87 #if defined(CONFIG_USE_NPTL)
88 /***********************************************************/
89 /* Helper routines for implementing atomic operations. */
90
91 /* To implement exclusive operations we force all cpus to syncronise.
92 We don't require a full sync, only that no cpus are executing guest code.
93 The alternative is to map target atomic ops onto host equivalents,
94 which requires quite a lot of per host/target work. */
95 static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
96 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
97 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
98 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
99 static int pending_cpus;
100
101 /* Make sure everything is in a consistent state for calling fork(). */
102 void fork_start(void)
103 {
104 pthread_mutex_lock(&tb_lock);
105 pthread_mutex_lock(&exclusive_lock);
106 mmap_fork_start();
107 }
108
109 void fork_end(int child)
110 {
111 mmap_fork_end(child);
112 if (child) {
113 /* Child processes created by fork() only have a single thread.
114 Discard information about the parent threads. */
115 first_cpu = thread_env;
116 thread_env->next_cpu = NULL;
117 pending_cpus = 0;
118 pthread_mutex_init(&exclusive_lock, NULL);
119 pthread_mutex_init(&cpu_list_mutex, NULL);
120 pthread_cond_init(&exclusive_cond, NULL);
121 pthread_cond_init(&exclusive_resume, NULL);
122 pthread_mutex_init(&tb_lock, NULL);
123 gdbserver_fork(thread_env);
124 } else {
125 pthread_mutex_unlock(&exclusive_lock);
126 pthread_mutex_unlock(&tb_lock);
127 }
128 }
129
130 /* Wait for pending exclusive operations to complete. The exclusive lock
131 must be held. */
132 static inline void exclusive_idle(void)
133 {
134 while (pending_cpus) {
135 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
136 }
137 }
138
139 /* Start an exclusive operation.
140 Must only be called from outside cpu_arm_exec. */
141 static inline void start_exclusive(void)
142 {
143 CPUState *other;
144 pthread_mutex_lock(&exclusive_lock);
145 exclusive_idle();
146
147 pending_cpus = 1;
148 /* Make all other cpus stop executing. */
149 for (other = first_cpu; other; other = other->next_cpu) {
150 if (other->running) {
151 pending_cpus++;
152 cpu_exit(other);
153 }
154 }
155 if (pending_cpus > 1) {
156 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
157 }
158 }
159
160 /* Finish an exclusive operation. */
161 static inline void end_exclusive(void)
162 {
163 pending_cpus = 0;
164 pthread_cond_broadcast(&exclusive_resume);
165 pthread_mutex_unlock(&exclusive_lock);
166 }
167
168 /* Wait for exclusive ops to finish, and begin cpu execution. */
169 static inline void cpu_exec_start(CPUState *env)
170 {
171 pthread_mutex_lock(&exclusive_lock);
172 exclusive_idle();
173 env->running = 1;
174 pthread_mutex_unlock(&exclusive_lock);
175 }
176
177 /* Mark cpu as not executing, and release pending exclusive ops. */
178 static inline void cpu_exec_end(CPUState *env)
179 {
180 pthread_mutex_lock(&exclusive_lock);
181 env->running = 0;
182 if (pending_cpus > 1) {
183 pending_cpus--;
184 if (pending_cpus == 1) {
185 pthread_cond_signal(&exclusive_cond);
186 }
187 }
188 exclusive_idle();
189 pthread_mutex_unlock(&exclusive_lock);
190 }
191
192 void cpu_list_lock(void)
193 {
194 pthread_mutex_lock(&cpu_list_mutex);
195 }
196
197 void cpu_list_unlock(void)
198 {
199 pthread_mutex_unlock(&cpu_list_mutex);
200 }
201 #else /* if !CONFIG_USE_NPTL */
202 /* These are no-ops because we are not threadsafe. */
203 static inline void cpu_exec_start(CPUState *env)
204 {
205 }
206
207 static inline void cpu_exec_end(CPUState *env)
208 {
209 }
210
211 static inline void start_exclusive(void)
212 {
213 }
214
215 static inline void end_exclusive(void)
216 {
217 }
218
219 void fork_start(void)
220 {
221 }
222
223 void fork_end(int child)
224 {
225 if (child) {
226 gdbserver_fork(thread_env);
227 }
228 }
229
230 void cpu_list_lock(void)
231 {
232 }
233
234 void cpu_list_unlock(void)
235 {
236 }
237 #endif
238
239
240 #ifdef TARGET_I386
241 /***********************************************************/
242 /* CPUX86 core interface */
243
244 void cpu_smm_update(CPUState *env)
245 {
246 }
247
248 uint64_t cpu_get_tsc(CPUX86State *env)
249 {
250 return cpu_get_real_ticks();
251 }
252
253 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
254 int flags)
255 {
256 unsigned int e1, e2;
257 uint32_t *p;
258 e1 = (addr << 16) | (limit & 0xffff);
259 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
260 e2 |= flags;
261 p = ptr;
262 p[0] = tswap32(e1);
263 p[1] = tswap32(e2);
264 }
265
266 static uint64_t *idt_table;
267 #ifdef TARGET_X86_64
268 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
269 uint64_t addr, unsigned int sel)
270 {
271 uint32_t *p, e1, e2;
272 e1 = (addr & 0xffff) | (sel << 16);
273 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
274 p = ptr;
275 p[0] = tswap32(e1);
276 p[1] = tswap32(e2);
277 p[2] = tswap32(addr >> 32);
278 p[3] = 0;
279 }
280 /* only dpl matters as we do only user space emulation */
281 static void set_idt(int n, unsigned int dpl)
282 {
283 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
284 }
285 #else
286 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
287 uint32_t addr, unsigned int sel)
288 {
289 uint32_t *p, e1, e2;
290 e1 = (addr & 0xffff) | (sel << 16);
291 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
292 p = ptr;
293 p[0] = tswap32(e1);
294 p[1] = tswap32(e2);
295 }
296
297 /* only dpl matters as we do only user space emulation */
298 static void set_idt(int n, unsigned int dpl)
299 {
300 set_gate(idt_table + n, 0, dpl, 0, 0);
301 }
302 #endif
303
304 void cpu_loop(CPUX86State *env)
305 {
306 int trapnr;
307 abi_ulong pc;
308 target_siginfo_t info;
309
310 for(;;) {
311 trapnr = cpu_x86_exec(env);
312 switch(trapnr) {
313 case 0x80:
314 /* linux syscall from int $0x80 */
315 env->regs[R_EAX] = do_syscall(env,
316 env->regs[R_EAX],
317 env->regs[R_EBX],
318 env->regs[R_ECX],
319 env->regs[R_EDX],
320 env->regs[R_ESI],
321 env->regs[R_EDI],
322 env->regs[R_EBP]);
323 break;
324 #ifndef TARGET_ABI32
325 case EXCP_SYSCALL:
326 /* linux syscall from syscall instruction */
327 env->regs[R_EAX] = do_syscall(env,
328 env->regs[R_EAX],
329 env->regs[R_EDI],
330 env->regs[R_ESI],
331 env->regs[R_EDX],
332 env->regs[10],
333 env->regs[8],
334 env->regs[9]);
335 env->eip = env->exception_next_eip;
336 break;
337 #endif
338 case EXCP0B_NOSEG:
339 case EXCP0C_STACK:
340 info.si_signo = SIGBUS;
341 info.si_errno = 0;
342 info.si_code = TARGET_SI_KERNEL;
343 info._sifields._sigfault._addr = 0;
344 queue_signal(env, info.si_signo, &info);
345 break;
346 case EXCP0D_GPF:
347 /* XXX: potential problem if ABI32 */
348 #ifndef TARGET_X86_64
349 if (env->eflags & VM_MASK) {
350 handle_vm86_fault(env);
351 } else
352 #endif
353 {
354 info.si_signo = SIGSEGV;
355 info.si_errno = 0;
356 info.si_code = TARGET_SI_KERNEL;
357 info._sifields._sigfault._addr = 0;
358 queue_signal(env, info.si_signo, &info);
359 }
360 break;
361 case EXCP0E_PAGE:
362 info.si_signo = SIGSEGV;
363 info.si_errno = 0;
364 if (!(env->error_code & 1))
365 info.si_code = TARGET_SEGV_MAPERR;
366 else
367 info.si_code = TARGET_SEGV_ACCERR;
368 info._sifields._sigfault._addr = env->cr[2];
369 queue_signal(env, info.si_signo, &info);
370 break;
371 case EXCP00_DIVZ:
372 #ifndef TARGET_X86_64
373 if (env->eflags & VM_MASK) {
374 handle_vm86_trap(env, trapnr);
375 } else
376 #endif
377 {
378 /* division by zero */
379 info.si_signo = SIGFPE;
380 info.si_errno = 0;
381 info.si_code = TARGET_FPE_INTDIV;
382 info._sifields._sigfault._addr = env->eip;
383 queue_signal(env, info.si_signo, &info);
384 }
385 break;
386 case EXCP01_DB:
387 case EXCP03_INT3:
388 #ifndef TARGET_X86_64
389 if (env->eflags & VM_MASK) {
390 handle_vm86_trap(env, trapnr);
391 } else
392 #endif
393 {
394 info.si_signo = SIGTRAP;
395 info.si_errno = 0;
396 if (trapnr == EXCP01_DB) {
397 info.si_code = TARGET_TRAP_BRKPT;
398 info._sifields._sigfault._addr = env->eip;
399 } else {
400 info.si_code = TARGET_SI_KERNEL;
401 info._sifields._sigfault._addr = 0;
402 }
403 queue_signal(env, info.si_signo, &info);
404 }
405 break;
406 case EXCP04_INTO:
407 case EXCP05_BOUND:
408 #ifndef TARGET_X86_64
409 if (env->eflags & VM_MASK) {
410 handle_vm86_trap(env, trapnr);
411 } else
412 #endif
413 {
414 info.si_signo = SIGSEGV;
415 info.si_errno = 0;
416 info.si_code = TARGET_SI_KERNEL;
417 info._sifields._sigfault._addr = 0;
418 queue_signal(env, info.si_signo, &info);
419 }
420 break;
421 case EXCP06_ILLOP:
422 info.si_signo = SIGILL;
423 info.si_errno = 0;
424 info.si_code = TARGET_ILL_ILLOPN;
425 info._sifields._sigfault._addr = env->eip;
426 queue_signal(env, info.si_signo, &info);
427 break;
428 case EXCP_INTERRUPT:
429 /* just indicate that signals should be handled asap */
430 break;
431 case EXCP_DEBUG:
432 {
433 int sig;
434
435 sig = gdb_handlesig (env, TARGET_SIGTRAP);
436 if (sig)
437 {
438 info.si_signo = sig;
439 info.si_errno = 0;
440 info.si_code = TARGET_TRAP_BRKPT;
441 queue_signal(env, info.si_signo, &info);
442 }
443 }
444 break;
445 default:
446 pc = env->segs[R_CS].base + env->eip;
447 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
448 (long)pc, trapnr);
449 abort();
450 }
451 process_pending_signals(env);
452 }
453 }
454 #endif
455
456 #ifdef TARGET_ARM
457
458 /* Handle a jump to the kernel code page. */
459 static int
460 do_kernel_trap(CPUARMState *env)
461 {
462 uint32_t addr;
463 uint32_t cpsr;
464 uint32_t val;
465
466 switch (env->regs[15]) {
467 case 0xffff0fa0: /* __kernel_memory_barrier */
468 /* ??? No-op. Will need to do better for SMP. */
469 break;
470 case 0xffff0fc0: /* __kernel_cmpxchg */
471 /* XXX: This only works between threads, not between processes.
472 It's probably possible to implement this with native host
473 operations. However things like ldrex/strex are much harder so
474 there's not much point trying. */
475 start_exclusive();
476 cpsr = cpsr_read(env);
477 addr = env->regs[2];
478 /* FIXME: This should SEGV if the access fails. */
479 if (get_user_u32(val, addr))
480 val = ~env->regs[0];
481 if (val == env->regs[0]) {
482 val = env->regs[1];
483 /* FIXME: Check for segfaults. */
484 put_user_u32(val, addr);
485 env->regs[0] = 0;
486 cpsr |= CPSR_C;
487 } else {
488 env->regs[0] = -1;
489 cpsr &= ~CPSR_C;
490 }
491 cpsr_write(env, cpsr, CPSR_C);
492 end_exclusive();
493 break;
494 case 0xffff0fe0: /* __kernel_get_tls */
495 env->regs[0] = env->cp15.c13_tls2;
496 break;
497 default:
498 return 1;
499 }
500 /* Jump back to the caller. */
501 addr = env->regs[14];
502 if (addr & 1) {
503 env->thumb = 1;
504 addr &= ~1;
505 }
506 env->regs[15] = addr;
507
508 return 0;
509 }
510
511 static int do_strex(CPUARMState *env)
512 {
513 uint32_t val;
514 int size;
515 int rc = 1;
516 int segv = 0;
517 uint32_t addr;
518 start_exclusive();
519 addr = env->exclusive_addr;
520 if (addr != env->exclusive_test) {
521 goto fail;
522 }
523 size = env->exclusive_info & 0xf;
524 switch (size) {
525 case 0:
526 segv = get_user_u8(val, addr);
527 break;
528 case 1:
529 segv = get_user_u16(val, addr);
530 break;
531 case 2:
532 case 3:
533 segv = get_user_u32(val, addr);
534 break;
535 default:
536 abort();
537 }
538 if (segv) {
539 env->cp15.c6_data = addr;
540 goto done;
541 }
542 if (val != env->exclusive_val) {
543 goto fail;
544 }
545 if (size == 3) {
546 segv = get_user_u32(val, addr + 4);
547 if (segv) {
548 env->cp15.c6_data = addr + 4;
549 goto done;
550 }
551 if (val != env->exclusive_high) {
552 goto fail;
553 }
554 }
555 val = env->regs[(env->exclusive_info >> 8) & 0xf];
556 switch (size) {
557 case 0:
558 segv = put_user_u8(val, addr);
559 break;
560 case 1:
561 segv = put_user_u16(val, addr);
562 break;
563 case 2:
564 case 3:
565 segv = put_user_u32(val, addr);
566 break;
567 }
568 if (segv) {
569 env->cp15.c6_data = addr;
570 goto done;
571 }
572 if (size == 3) {
573 val = env->regs[(env->exclusive_info >> 12) & 0xf];
574 segv = put_user_u32(val, addr + 4);
575 if (segv) {
576 env->cp15.c6_data = addr + 4;
577 goto done;
578 }
579 }
580 rc = 0;
581 fail:
582 env->regs[15] += 4;
583 env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
584 done:
585 end_exclusive();
586 return segv;
587 }
588
589 void cpu_loop(CPUARMState *env)
590 {
591 int trapnr;
592 unsigned int n, insn;
593 target_siginfo_t info;
594 uint32_t addr;
595
596 for(;;) {
597 cpu_exec_start(env);
598 trapnr = cpu_arm_exec(env);
599 cpu_exec_end(env);
600 switch(trapnr) {
601 case EXCP_UDEF:
602 {
603 TaskState *ts = env->opaque;
604 uint32_t opcode;
605 int rc;
606
607 /* we handle the FPU emulation here, as Linux */
608 /* we get the opcode */
609 /* FIXME - what to do if get_user() fails? */
610 get_user_u32(opcode, env->regs[15]);
611
612 rc = EmulateAll(opcode, &ts->fpa, env);
613 if (rc == 0) { /* illegal instruction */
614 info.si_signo = SIGILL;
615 info.si_errno = 0;
616 info.si_code = TARGET_ILL_ILLOPN;
617 info._sifields._sigfault._addr = env->regs[15];
618 queue_signal(env, info.si_signo, &info);
619 } else if (rc < 0) { /* FP exception */
620 int arm_fpe=0;
621
622 /* translate softfloat flags to FPSR flags */
623 if (-rc & float_flag_invalid)
624 arm_fpe |= BIT_IOC;
625 if (-rc & float_flag_divbyzero)
626 arm_fpe |= BIT_DZC;
627 if (-rc & float_flag_overflow)
628 arm_fpe |= BIT_OFC;
629 if (-rc & float_flag_underflow)
630 arm_fpe |= BIT_UFC;
631 if (-rc & float_flag_inexact)
632 arm_fpe |= BIT_IXC;
633
634 FPSR fpsr = ts->fpa.fpsr;
635 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
636
637 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
638 info.si_signo = SIGFPE;
639 info.si_errno = 0;
640
641 /* ordered by priority, least first */
642 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
643 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
644 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
645 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
646 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
647
648 info._sifields._sigfault._addr = env->regs[15];
649 queue_signal(env, info.si_signo, &info);
650 } else {
651 env->regs[15] += 4;
652 }
653
654 /* accumulate unenabled exceptions */
655 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
656 fpsr |= BIT_IXC;
657 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
658 fpsr |= BIT_UFC;
659 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
660 fpsr |= BIT_OFC;
661 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
662 fpsr |= BIT_DZC;
663 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
664 fpsr |= BIT_IOC;
665 ts->fpa.fpsr=fpsr;
666 } else { /* everything OK */
667 /* increment PC */
668 env->regs[15] += 4;
669 }
670 }
671 break;
672 case EXCP_SWI:
673 case EXCP_BKPT:
674 {
675 env->eabi = 1;
676 /* system call */
677 if (trapnr == EXCP_BKPT) {
678 if (env->thumb) {
679 /* FIXME - what to do if get_user() fails? */
680 get_user_u16(insn, env->regs[15]);
681 n = insn & 0xff;
682 env->regs[15] += 2;
683 } else {
684 /* FIXME - what to do if get_user() fails? */
685 get_user_u32(insn, env->regs[15]);
686 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
687 env->regs[15] += 4;
688 }
689 } else {
690 if (env->thumb) {
691 /* FIXME - what to do if get_user() fails? */
692 get_user_u16(insn, env->regs[15] - 2);
693 n = insn & 0xff;
694 } else {
695 /* FIXME - what to do if get_user() fails? */
696 get_user_u32(insn, env->regs[15] - 4);
697 n = insn & 0xffffff;
698 }
699 }
700
701 if (n == ARM_NR_cacheflush) {
702 /* nop */
703 } else if (n == ARM_NR_semihosting
704 || n == ARM_NR_thumb_semihosting) {
705 env->regs[0] = do_arm_semihosting (env);
706 } else if (n == 0 || n >= ARM_SYSCALL_BASE
707 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
708 /* linux syscall */
709 if (env->thumb || n == 0) {
710 n = env->regs[7];
711 } else {
712 n -= ARM_SYSCALL_BASE;
713 env->eabi = 0;
714 }
715 if ( n > ARM_NR_BASE) {
716 switch (n) {
717 case ARM_NR_cacheflush:
718 /* nop */
719 break;
720 case ARM_NR_set_tls:
721 cpu_set_tls(env, env->regs[0]);
722 env->regs[0] = 0;
723 break;
724 default:
725 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
726 n);
727 env->regs[0] = -TARGET_ENOSYS;
728 break;
729 }
730 } else {
731 env->regs[0] = do_syscall(env,
732 n,
733 env->regs[0],
734 env->regs[1],
735 env->regs[2],
736 env->regs[3],
737 env->regs[4],
738 env->regs[5]);
739 }
740 } else {
741 goto error;
742 }
743 }
744 break;
745 case EXCP_INTERRUPT:
746 /* just indicate that signals should be handled asap */
747 break;
748 case EXCP_PREFETCH_ABORT:
749 addr = env->cp15.c6_insn;
750 goto do_segv;
751 case EXCP_DATA_ABORT:
752 addr = env->cp15.c6_data;
753 goto do_segv;
754 do_segv:
755 {
756 info.si_signo = SIGSEGV;
757 info.si_errno = 0;
758 /* XXX: check env->error_code */
759 info.si_code = TARGET_SEGV_MAPERR;
760 info._sifields._sigfault._addr = addr;
761 queue_signal(env, info.si_signo, &info);
762 }
763 break;
764 case EXCP_DEBUG:
765 {
766 int sig;
767
768 sig = gdb_handlesig (env, TARGET_SIGTRAP);
769 if (sig)
770 {
771 info.si_signo = sig;
772 info.si_errno = 0;
773 info.si_code = TARGET_TRAP_BRKPT;
774 queue_signal(env, info.si_signo, &info);
775 }
776 }
777 break;
778 case EXCP_KERNEL_TRAP:
779 if (do_kernel_trap(env))
780 goto error;
781 break;
782 case EXCP_STREX:
783 if (do_strex(env)) {
784 addr = env->cp15.c6_data;
785 goto do_segv;
786 }
787 break;
788 default:
789 error:
790 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
791 trapnr);
792 cpu_dump_state(env, stderr, fprintf, 0);
793 abort();
794 }
795 process_pending_signals(env);
796 }
797 }
798
799 #endif
800
801 #ifdef TARGET_UNICORE32
802
803 void cpu_loop(CPUState *env)
804 {
805 int trapnr;
806 unsigned int n, insn;
807 target_siginfo_t info;
808
809 for (;;) {
810 cpu_exec_start(env);
811 trapnr = uc32_cpu_exec(env);
812 cpu_exec_end(env);
813 switch (trapnr) {
814 case UC32_EXCP_PRIV:
815 {
816 /* system call */
817 get_user_u32(insn, env->regs[31] - 4);
818 n = insn & 0xffffff;
819
820 if (n >= UC32_SYSCALL_BASE) {
821 /* linux syscall */
822 n -= UC32_SYSCALL_BASE;
823 if (n == UC32_SYSCALL_NR_set_tls) {
824 cpu_set_tls(env, env->regs[0]);
825 env->regs[0] = 0;
826 } else {
827 env->regs[0] = do_syscall(env,
828 n,
829 env->regs[0],
830 env->regs[1],
831 env->regs[2],
832 env->regs[3],
833 env->regs[4],
834 env->regs[5]);
835 }
836 } else {
837 goto error;
838 }
839 }
840 break;
841 case UC32_EXCP_TRAP:
842 info.si_signo = SIGSEGV;
843 info.si_errno = 0;
844 /* XXX: check env->error_code */
845 info.si_code = TARGET_SEGV_MAPERR;
846 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
847 queue_signal(env, info.si_signo, &info);
848 break;
849 case EXCP_INTERRUPT:
850 /* just indicate that signals should be handled asap */
851 break;
852 case EXCP_DEBUG:
853 {
854 int sig;
855
856 sig = gdb_handlesig(env, TARGET_SIGTRAP);
857 if (sig) {
858 info.si_signo = sig;
859 info.si_errno = 0;
860 info.si_code = TARGET_TRAP_BRKPT;
861 queue_signal(env, info.si_signo, &info);
862 }
863 }
864 break;
865 default:
866 goto error;
867 }
868 process_pending_signals(env);
869 }
870
871 error:
872 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
873 cpu_dump_state(env, stderr, fprintf, 0);
874 abort();
875 }
876 #endif
877
878 #ifdef TARGET_SPARC
879 #define SPARC64_STACK_BIAS 2047
880
881 //#define DEBUG_WIN
882
883 /* WARNING: dealing with register windows _is_ complicated. More info
884 can be found at http://www.sics.se/~psm/sparcstack.html */
885 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
886 {
887 index = (index + cwp * 16) % (16 * env->nwindows);
888 /* wrap handling : if cwp is on the last window, then we use the
889 registers 'after' the end */
890 if (index < 8 && env->cwp == env->nwindows - 1)
891 index += 16 * env->nwindows;
892 return index;
893 }
894
895 /* save the register window 'cwp1' */
896 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
897 {
898 unsigned int i;
899 abi_ulong sp_ptr;
900
901 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
902 #ifdef TARGET_SPARC64
903 if (sp_ptr & 3)
904 sp_ptr += SPARC64_STACK_BIAS;
905 #endif
906 #if defined(DEBUG_WIN)
907 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
908 sp_ptr, cwp1);
909 #endif
910 for(i = 0; i < 16; i++) {
911 /* FIXME - what to do if put_user() fails? */
912 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
913 sp_ptr += sizeof(abi_ulong);
914 }
915 }
916
917 static void save_window(CPUSPARCState *env)
918 {
919 #ifndef TARGET_SPARC64
920 unsigned int new_wim;
921 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
922 ((1LL << env->nwindows) - 1);
923 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
924 env->wim = new_wim;
925 #else
926 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
927 env->cansave++;
928 env->canrestore--;
929 #endif
930 }
931
932 static void restore_window(CPUSPARCState *env)
933 {
934 #ifndef TARGET_SPARC64
935 unsigned int new_wim;
936 #endif
937 unsigned int i, cwp1;
938 abi_ulong sp_ptr;
939
940 #ifndef TARGET_SPARC64
941 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
942 ((1LL << env->nwindows) - 1);
943 #endif
944
945 /* restore the invalid window */
946 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
947 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
948 #ifdef TARGET_SPARC64
949 if (sp_ptr & 3)
950 sp_ptr += SPARC64_STACK_BIAS;
951 #endif
952 #if defined(DEBUG_WIN)
953 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
954 sp_ptr, cwp1);
955 #endif
956 for(i = 0; i < 16; i++) {
957 /* FIXME - what to do if get_user() fails? */
958 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
959 sp_ptr += sizeof(abi_ulong);
960 }
961 #ifdef TARGET_SPARC64
962 env->canrestore++;
963 if (env->cleanwin < env->nwindows - 1)
964 env->cleanwin++;
965 env->cansave--;
966 #else
967 env->wim = new_wim;
968 #endif
969 }
970
971 static void flush_windows(CPUSPARCState *env)
972 {
973 int offset, cwp1;
974
975 offset = 1;
976 for(;;) {
977 /* if restore would invoke restore_window(), then we can stop */
978 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
979 #ifndef TARGET_SPARC64
980 if (env->wim & (1 << cwp1))
981 break;
982 #else
983 if (env->canrestore == 0)
984 break;
985 env->cansave++;
986 env->canrestore--;
987 #endif
988 save_window_offset(env, cwp1);
989 offset++;
990 }
991 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
992 #ifndef TARGET_SPARC64
993 /* set wim so that restore will reload the registers */
994 env->wim = 1 << cwp1;
995 #endif
996 #if defined(DEBUG_WIN)
997 printf("flush_windows: nb=%d\n", offset - 1);
998 #endif
999 }
1000
1001 void cpu_loop (CPUSPARCState *env)
1002 {
1003 int trapnr;
1004 abi_long ret;
1005 target_siginfo_t info;
1006
1007 while (1) {
1008 trapnr = cpu_sparc_exec (env);
1009
1010 switch (trapnr) {
1011 #ifndef TARGET_SPARC64
1012 case 0x88:
1013 case 0x90:
1014 #else
1015 case 0x110:
1016 case 0x16d:
1017 #endif
1018 ret = do_syscall (env, env->gregs[1],
1019 env->regwptr[0], env->regwptr[1],
1020 env->regwptr[2], env->regwptr[3],
1021 env->regwptr[4], env->regwptr[5]);
1022 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
1023 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1024 env->xcc |= PSR_CARRY;
1025 #else
1026 env->psr |= PSR_CARRY;
1027 #endif
1028 ret = -ret;
1029 } else {
1030 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1031 env->xcc &= ~PSR_CARRY;
1032 #else
1033 env->psr &= ~PSR_CARRY;
1034 #endif
1035 }
1036 env->regwptr[0] = ret;
1037 /* next instruction */
1038 env->pc = env->npc;
1039 env->npc = env->npc + 4;
1040 break;
1041 case 0x83: /* flush windows */
1042 #ifdef TARGET_ABI32
1043 case 0x103:
1044 #endif
1045 flush_windows(env);
1046 /* next instruction */
1047 env->pc = env->npc;
1048 env->npc = env->npc + 4;
1049 break;
1050 #ifndef TARGET_SPARC64
1051 case TT_WIN_OVF: /* window overflow */
1052 save_window(env);
1053 break;
1054 case TT_WIN_UNF: /* window underflow */
1055 restore_window(env);
1056 break;
1057 case TT_TFAULT:
1058 case TT_DFAULT:
1059 {
1060 info.si_signo = SIGSEGV;
1061 info.si_errno = 0;
1062 /* XXX: check env->error_code */
1063 info.si_code = TARGET_SEGV_MAPERR;
1064 info._sifields._sigfault._addr = env->mmuregs[4];
1065 queue_signal(env, info.si_signo, &info);
1066 }
1067 break;
1068 #else
1069 case TT_SPILL: /* window overflow */
1070 save_window(env);
1071 break;
1072 case TT_FILL: /* window underflow */
1073 restore_window(env);
1074 break;
1075 case TT_TFAULT:
1076 case TT_DFAULT:
1077 {
1078 info.si_signo = SIGSEGV;
1079 info.si_errno = 0;
1080 /* XXX: check env->error_code */
1081 info.si_code = TARGET_SEGV_MAPERR;
1082 if (trapnr == TT_DFAULT)
1083 info._sifields._sigfault._addr = env->dmmuregs[4];
1084 else
1085 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
1086 queue_signal(env, info.si_signo, &info);
1087 }
1088 break;
1089 #ifndef TARGET_ABI32
1090 case 0x16e:
1091 flush_windows(env);
1092 sparc64_get_context(env);
1093 break;
1094 case 0x16f:
1095 flush_windows(env);
1096 sparc64_set_context(env);
1097 break;
1098 #endif
1099 #endif
1100 case EXCP_INTERRUPT:
1101 /* just indicate that signals should be handled asap */
1102 break;
1103 case EXCP_DEBUG:
1104 {
1105 int sig;
1106
1107 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1108 if (sig)
1109 {
1110 info.si_signo = sig;
1111 info.si_errno = 0;
1112 info.si_code = TARGET_TRAP_BRKPT;
1113 queue_signal(env, info.si_signo, &info);
1114 }
1115 }
1116 break;
1117 default:
1118 printf ("Unhandled trap: 0x%x\n", trapnr);
1119 cpu_dump_state(env, stderr, fprintf, 0);
1120 exit (1);
1121 }
1122 process_pending_signals (env);
1123 }
1124 }
1125
1126 #endif
1127
1128 #ifdef TARGET_PPC
1129 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1130 {
1131 /* TO FIX */
1132 return 0;
1133 }
1134
1135 uint64_t cpu_ppc_load_tbl (CPUState *env)
1136 {
1137 return cpu_ppc_get_tb(env);
1138 }
1139
1140 uint32_t cpu_ppc_load_tbu (CPUState *env)
1141 {
1142 return cpu_ppc_get_tb(env) >> 32;
1143 }
1144
1145 uint64_t cpu_ppc_load_atbl (CPUState *env)
1146 {
1147 return cpu_ppc_get_tb(env);
1148 }
1149
1150 uint32_t cpu_ppc_load_atbu (CPUState *env)
1151 {
1152 return cpu_ppc_get_tb(env) >> 32;
1153 }
1154
1155 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1156 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1157
1158 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1159 {
1160 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1161 }
1162
1163 /* XXX: to be fixed */
1164 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
1165 {
1166 return -1;
1167 }
1168
1169 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
1170 {
1171 return -1;
1172 }
1173
1174 #define EXCP_DUMP(env, fmt, ...) \
1175 do { \
1176 fprintf(stderr, fmt , ## __VA_ARGS__); \
1177 cpu_dump_state(env, stderr, fprintf, 0); \
1178 qemu_log(fmt, ## __VA_ARGS__); \
1179 if (logfile) \
1180 log_cpu_state(env, 0); \
1181 } while (0)
1182
1183 static int do_store_exclusive(CPUPPCState *env)
1184 {
1185 target_ulong addr;
1186 target_ulong page_addr;
1187 target_ulong val;
1188 int flags;
1189 int segv = 0;
1190
1191 addr = env->reserve_ea;
1192 page_addr = addr & TARGET_PAGE_MASK;
1193 start_exclusive();
1194 mmap_lock();
1195 flags = page_get_flags(page_addr);
1196 if ((flags & PAGE_READ) == 0) {
1197 segv = 1;
1198 } else {
1199 int reg = env->reserve_info & 0x1f;
1200 int size = (env->reserve_info >> 5) & 0xf;
1201 int stored = 0;
1202
1203 if (addr == env->reserve_addr) {
1204 switch (size) {
1205 case 1: segv = get_user_u8(val, addr); break;
1206 case 2: segv = get_user_u16(val, addr); break;
1207 case 4: segv = get_user_u32(val, addr); break;
1208 #if defined(TARGET_PPC64)
1209 case 8: segv = get_user_u64(val, addr); break;
1210 #endif
1211 default: abort();
1212 }
1213 if (!segv && val == env->reserve_val) {
1214 val = env->gpr[reg];
1215 switch (size) {
1216 case 1: segv = put_user_u8(val, addr); break;
1217 case 2: segv = put_user_u16(val, addr); break;
1218 case 4: segv = put_user_u32(val, addr); break;
1219 #if defined(TARGET_PPC64)
1220 case 8: segv = put_user_u64(val, addr); break;
1221 #endif
1222 default: abort();
1223 }
1224 if (!segv) {
1225 stored = 1;
1226 }
1227 }
1228 }
1229 env->crf[0] = (stored << 1) | xer_so;
1230 env->reserve_addr = (target_ulong)-1;
1231 }
1232 if (!segv) {
1233 env->nip += 4;
1234 }
1235 mmap_unlock();
1236 end_exclusive();
1237 return segv;
1238 }
1239
1240 void cpu_loop(CPUPPCState *env)
1241 {
1242 target_siginfo_t info;
1243 int trapnr;
1244 uint32_t ret;
1245
1246 for(;;) {
1247 cpu_exec_start(env);
1248 trapnr = cpu_ppc_exec(env);
1249 cpu_exec_end(env);
1250 switch(trapnr) {
1251 case POWERPC_EXCP_NONE:
1252 /* Just go on */
1253 break;
1254 case POWERPC_EXCP_CRITICAL: /* Critical input */
1255 cpu_abort(env, "Critical interrupt while in user mode. "
1256 "Aborting\n");
1257 break;
1258 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1259 cpu_abort(env, "Machine check exception while in user mode. "
1260 "Aborting\n");
1261 break;
1262 case POWERPC_EXCP_DSI: /* Data storage exception */
1263 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n",
1264 env->spr[SPR_DAR]);
1265 /* XXX: check this. Seems bugged */
1266 switch (env->error_code & 0xFF000000) {
1267 case 0x40000000:
1268 info.si_signo = TARGET_SIGSEGV;
1269 info.si_errno = 0;
1270 info.si_code = TARGET_SEGV_MAPERR;
1271 break;
1272 case 0x04000000:
1273 info.si_signo = TARGET_SIGILL;
1274 info.si_errno = 0;
1275 info.si_code = TARGET_ILL_ILLADR;
1276 break;
1277 case 0x08000000:
1278 info.si_signo = TARGET_SIGSEGV;
1279 info.si_errno = 0;
1280 info.si_code = TARGET_SEGV_ACCERR;
1281 break;
1282 default:
1283 /* Let's send a regular segfault... */
1284 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1285 env->error_code);
1286 info.si_signo = TARGET_SIGSEGV;
1287 info.si_errno = 0;
1288 info.si_code = TARGET_SEGV_MAPERR;
1289 break;
1290 }
1291 info._sifields._sigfault._addr = env->nip;
1292 queue_signal(env, info.si_signo, &info);
1293 break;
1294 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1295 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1296 "\n", env->spr[SPR_SRR0]);
1297 /* XXX: check this */
1298 switch (env->error_code & 0xFF000000) {
1299 case 0x40000000:
1300 info.si_signo = TARGET_SIGSEGV;
1301 info.si_errno = 0;
1302 info.si_code = TARGET_SEGV_MAPERR;
1303 break;
1304 case 0x10000000:
1305 case 0x08000000:
1306 info.si_signo = TARGET_SIGSEGV;
1307 info.si_errno = 0;
1308 info.si_code = TARGET_SEGV_ACCERR;
1309 break;
1310 default:
1311 /* Let's send a regular segfault... */
1312 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1313 env->error_code);
1314 info.si_signo = TARGET_SIGSEGV;
1315 info.si_errno = 0;
1316 info.si_code = TARGET_SEGV_MAPERR;
1317 break;
1318 }
1319 info._sifields._sigfault._addr = env->nip - 4;
1320 queue_signal(env, info.si_signo, &info);
1321 break;
1322 case POWERPC_EXCP_EXTERNAL: /* External input */
1323 cpu_abort(env, "External interrupt while in user mode. "
1324 "Aborting\n");
1325 break;
1326 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1327 EXCP_DUMP(env, "Unaligned memory access\n");
1328 /* XXX: check this */
1329 info.si_signo = TARGET_SIGBUS;
1330 info.si_errno = 0;
1331 info.si_code = TARGET_BUS_ADRALN;
1332 info._sifields._sigfault._addr = env->nip - 4;
1333 queue_signal(env, info.si_signo, &info);
1334 break;
1335 case POWERPC_EXCP_PROGRAM: /* Program exception */
1336 /* XXX: check this */
1337 switch (env->error_code & ~0xF) {
1338 case POWERPC_EXCP_FP:
1339 EXCP_DUMP(env, "Floating point program exception\n");
1340 info.si_signo = TARGET_SIGFPE;
1341 info.si_errno = 0;
1342 switch (env->error_code & 0xF) {
1343 case POWERPC_EXCP_FP_OX:
1344 info.si_code = TARGET_FPE_FLTOVF;
1345 break;
1346 case POWERPC_EXCP_FP_UX:
1347 info.si_code = TARGET_FPE_FLTUND;
1348 break;
1349 case POWERPC_EXCP_FP_ZX:
1350 case POWERPC_EXCP_FP_VXZDZ:
1351 info.si_code = TARGET_FPE_FLTDIV;
1352 break;
1353 case POWERPC_EXCP_FP_XX:
1354 info.si_code = TARGET_FPE_FLTRES;
1355 break;
1356 case POWERPC_EXCP_FP_VXSOFT:
1357 info.si_code = TARGET_FPE_FLTINV;
1358 break;
1359 case POWERPC_EXCP_FP_VXSNAN:
1360 case POWERPC_EXCP_FP_VXISI:
1361 case POWERPC_EXCP_FP_VXIDI:
1362 case POWERPC_EXCP_FP_VXIMZ:
1363 case POWERPC_EXCP_FP_VXVC:
1364 case POWERPC_EXCP_FP_VXSQRT:
1365 case POWERPC_EXCP_FP_VXCVI:
1366 info.si_code = TARGET_FPE_FLTSUB;
1367 break;
1368 default:
1369 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1370 env->error_code);
1371 break;
1372 }
1373 break;
1374 case POWERPC_EXCP_INVAL:
1375 EXCP_DUMP(env, "Invalid instruction\n");
1376 info.si_signo = TARGET_SIGILL;
1377 info.si_errno = 0;
1378 switch (env->error_code & 0xF) {
1379 case POWERPC_EXCP_INVAL_INVAL:
1380 info.si_code = TARGET_ILL_ILLOPC;
1381 break;
1382 case POWERPC_EXCP_INVAL_LSWX:
1383 info.si_code = TARGET_ILL_ILLOPN;
1384 break;
1385 case POWERPC_EXCP_INVAL_SPR:
1386 info.si_code = TARGET_ILL_PRVREG;
1387 break;
1388 case POWERPC_EXCP_INVAL_FP:
1389 info.si_code = TARGET_ILL_COPROC;
1390 break;
1391 default:
1392 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1393 env->error_code & 0xF);
1394 info.si_code = TARGET_ILL_ILLADR;
1395 break;
1396 }
1397 break;
1398 case POWERPC_EXCP_PRIV:
1399 EXCP_DUMP(env, "Privilege violation\n");
1400 info.si_signo = TARGET_SIGILL;
1401 info.si_errno = 0;
1402 switch (env->error_code & 0xF) {
1403 case POWERPC_EXCP_PRIV_OPC:
1404 info.si_code = TARGET_ILL_PRVOPC;
1405 break;
1406 case POWERPC_EXCP_PRIV_REG:
1407 info.si_code = TARGET_ILL_PRVREG;
1408 break;
1409 default:
1410 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1411 env->error_code & 0xF);
1412 info.si_code = TARGET_ILL_PRVOPC;
1413 break;
1414 }
1415 break;
1416 case POWERPC_EXCP_TRAP:
1417 cpu_abort(env, "Tried to call a TRAP\n");
1418 break;
1419 default:
1420 /* Should not happen ! */
1421 cpu_abort(env, "Unknown program exception (%02x)\n",
1422 env->error_code);
1423 break;
1424 }
1425 info._sifields._sigfault._addr = env->nip - 4;
1426 queue_signal(env, info.si_signo, &info);
1427 break;
1428 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1429 EXCP_DUMP(env, "No floating point allowed\n");
1430 info.si_signo = TARGET_SIGILL;
1431 info.si_errno = 0;
1432 info.si_code = TARGET_ILL_COPROC;
1433 info._sifields._sigfault._addr = env->nip - 4;
1434 queue_signal(env, info.si_signo, &info);
1435 break;
1436 case POWERPC_EXCP_SYSCALL: /* System call exception */
1437 cpu_abort(env, "Syscall exception while in user mode. "
1438 "Aborting\n");
1439 break;
1440 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1441 EXCP_DUMP(env, "No APU instruction allowed\n");
1442 info.si_signo = TARGET_SIGILL;
1443 info.si_errno = 0;
1444 info.si_code = TARGET_ILL_COPROC;
1445 info._sifields._sigfault._addr = env->nip - 4;
1446 queue_signal(env, info.si_signo, &info);
1447 break;
1448 case POWERPC_EXCP_DECR: /* Decrementer exception */
1449 cpu_abort(env, "Decrementer interrupt while in user mode. "
1450 "Aborting\n");
1451 break;
1452 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1453 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1454 "Aborting\n");
1455 break;
1456 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1457 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1458 "Aborting\n");
1459 break;
1460 case POWERPC_EXCP_DTLB: /* Data TLB error */
1461 cpu_abort(env, "Data TLB exception while in user mode. "
1462 "Aborting\n");
1463 break;
1464 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1465 cpu_abort(env, "Instruction TLB exception while in user mode. "
1466 "Aborting\n");
1467 break;
1468 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1469 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1470 info.si_signo = TARGET_SIGILL;
1471 info.si_errno = 0;
1472 info.si_code = TARGET_ILL_COPROC;
1473 info._sifields._sigfault._addr = env->nip - 4;
1474 queue_signal(env, info.si_signo, &info);
1475 break;
1476 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1477 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1478 break;
1479 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1480 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1481 break;
1482 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1483 cpu_abort(env, "Performance monitor exception not handled\n");
1484 break;
1485 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1486 cpu_abort(env, "Doorbell interrupt while in user mode. "
1487 "Aborting\n");
1488 break;
1489 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1490 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1491 "Aborting\n");
1492 break;
1493 case POWERPC_EXCP_RESET: /* System reset exception */
1494 cpu_abort(env, "Reset interrupt while in user mode. "
1495 "Aborting\n");
1496 break;
1497 case POWERPC_EXCP_DSEG: /* Data segment exception */
1498 cpu_abort(env, "Data segment exception while in user mode. "
1499 "Aborting\n");
1500 break;
1501 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1502 cpu_abort(env, "Instruction segment exception "
1503 "while in user mode. Aborting\n");
1504 break;
1505 /* PowerPC 64 with hypervisor mode support */
1506 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1507 cpu_abort(env, "Hypervisor decrementer interrupt "
1508 "while in user mode. Aborting\n");
1509 break;
1510 case POWERPC_EXCP_TRACE: /* Trace exception */
1511 /* Nothing to do:
1512 * we use this exception to emulate step-by-step execution mode.
1513 */
1514 break;
1515 /* PowerPC 64 with hypervisor mode support */
1516 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1517 cpu_abort(env, "Hypervisor data storage exception "
1518 "while in user mode. Aborting\n");
1519 break;
1520 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1521 cpu_abort(env, "Hypervisor instruction storage exception "
1522 "while in user mode. Aborting\n");
1523 break;
1524 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1525 cpu_abort(env, "Hypervisor data segment exception "
1526 "while in user mode. Aborting\n");
1527 break;
1528 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1529 cpu_abort(env, "Hypervisor instruction segment exception "
1530 "while in user mode. Aborting\n");
1531 break;
1532 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1533 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1534 info.si_signo = TARGET_SIGILL;
1535 info.si_errno = 0;
1536 info.si_code = TARGET_ILL_COPROC;
1537 info._sifields._sigfault._addr = env->nip - 4;
1538 queue_signal(env, info.si_signo, &info);
1539 break;
1540 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1541 cpu_abort(env, "Programable interval timer interrupt "
1542 "while in user mode. Aborting\n");
1543 break;
1544 case POWERPC_EXCP_IO: /* IO error exception */
1545 cpu_abort(env, "IO error exception while in user mode. "
1546 "Aborting\n");
1547 break;
1548 case POWERPC_EXCP_RUNM: /* Run mode exception */
1549 cpu_abort(env, "Run mode exception while in user mode. "
1550 "Aborting\n");
1551 break;
1552 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1553 cpu_abort(env, "Emulation trap exception not handled\n");
1554 break;
1555 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1556 cpu_abort(env, "Instruction fetch TLB exception "
1557 "while in user-mode. Aborting");
1558 break;
1559 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1560 cpu_abort(env, "Data load TLB exception while in user-mode. "
1561 "Aborting");
1562 break;
1563 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1564 cpu_abort(env, "Data store TLB exception while in user-mode. "
1565 "Aborting");
1566 break;
1567 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1568 cpu_abort(env, "Floating-point assist exception not handled\n");
1569 break;
1570 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1571 cpu_abort(env, "Instruction address breakpoint exception "
1572 "not handled\n");
1573 break;
1574 case POWERPC_EXCP_SMI: /* System management interrupt */
1575 cpu_abort(env, "System management interrupt while in user mode. "
1576 "Aborting\n");
1577 break;
1578 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1579 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1580 "Aborting\n");
1581 break;
1582 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1583 cpu_abort(env, "Performance monitor exception not handled\n");
1584 break;
1585 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1586 cpu_abort(env, "Vector assist exception not handled\n");
1587 break;
1588 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1589 cpu_abort(env, "Soft patch exception not handled\n");
1590 break;
1591 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1592 cpu_abort(env, "Maintenance exception while in user mode. "
1593 "Aborting\n");
1594 break;
1595 case POWERPC_EXCP_STOP: /* stop translation */
1596 /* We did invalidate the instruction cache. Go on */
1597 break;
1598 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1599 /* We just stopped because of a branch. Go on */
1600 break;
1601 case POWERPC_EXCP_SYSCALL_USER:
1602 /* system call in user-mode emulation */
1603 /* WARNING:
1604 * PPC ABI uses overflow flag in cr0 to signal an error
1605 * in syscalls.
1606 */
1607 #if 0
1608 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1609 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1610 #endif
1611 env->crf[0] &= ~0x1;
1612 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1613 env->gpr[5], env->gpr[6], env->gpr[7],
1614 env->gpr[8]);
1615 if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
1616 /* Returning from a successful sigreturn syscall.
1617 Avoid corrupting register state. */
1618 break;
1619 }
1620 if (ret > (uint32_t)(-515)) {
1621 env->crf[0] |= 0x1;
1622 ret = -ret;
1623 }
1624 env->gpr[3] = ret;
1625 #if 0
1626 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1627 #endif
1628 break;
1629 case POWERPC_EXCP_STCX:
1630 if (do_store_exclusive(env)) {
1631 info.si_signo = TARGET_SIGSEGV;
1632 info.si_errno = 0;
1633 info.si_code = TARGET_SEGV_MAPERR;
1634 info._sifields._sigfault._addr = env->nip;
1635 queue_signal(env, info.si_signo, &info);
1636 }
1637 break;
1638 case EXCP_DEBUG:
1639 {
1640 int sig;
1641
1642 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1643 if (sig) {
1644 info.si_signo = sig;
1645 info.si_errno = 0;
1646 info.si_code = TARGET_TRAP_BRKPT;
1647 queue_signal(env, info.si_signo, &info);
1648 }
1649 }
1650 break;
1651 case EXCP_INTERRUPT:
1652 /* just indicate that signals should be handled asap */
1653 break;
1654 default:
1655 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1656 break;
1657 }
1658 process_pending_signals(env);
1659 }
1660 }
1661 #endif
1662
1663 #ifdef TARGET_MIPS
1664
1665 #define MIPS_SYS(name, args) args,
1666
1667 static const uint8_t mips_syscall_args[] = {
1668 MIPS_SYS(sys_syscall , 0) /* 4000 */
1669 MIPS_SYS(sys_exit , 1)
1670 MIPS_SYS(sys_fork , 0)
1671 MIPS_SYS(sys_read , 3)
1672 MIPS_SYS(sys_write , 3)
1673 MIPS_SYS(sys_open , 3) /* 4005 */
1674 MIPS_SYS(sys_close , 1)
1675 MIPS_SYS(sys_waitpid , 3)
1676 MIPS_SYS(sys_creat , 2)
1677 MIPS_SYS(sys_link , 2)
1678 MIPS_SYS(sys_unlink , 1) /* 4010 */
1679 MIPS_SYS(sys_execve , 0)
1680 MIPS_SYS(sys_chdir , 1)
1681 MIPS_SYS(sys_time , 1)
1682 MIPS_SYS(sys_mknod , 3)
1683 MIPS_SYS(sys_chmod , 2) /* 4015 */
1684 MIPS_SYS(sys_lchown , 3)
1685 MIPS_SYS(sys_ni_syscall , 0)
1686 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1687 MIPS_SYS(sys_lseek , 3)
1688 MIPS_SYS(sys_getpid , 0) /* 4020 */
1689 MIPS_SYS(sys_mount , 5)
1690 MIPS_SYS(sys_oldumount , 1)
1691 MIPS_SYS(sys_setuid , 1)
1692 MIPS_SYS(sys_getuid , 0)
1693 MIPS_SYS(sys_stime , 1) /* 4025 */
1694 MIPS_SYS(sys_ptrace , 4)
1695 MIPS_SYS(sys_alarm , 1)
1696 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1697 MIPS_SYS(sys_pause , 0)
1698 MIPS_SYS(sys_utime , 2) /* 4030 */
1699 MIPS_SYS(sys_ni_syscall , 0)
1700 MIPS_SYS(sys_ni_syscall , 0)
1701 MIPS_SYS(sys_access , 2)
1702 MIPS_SYS(sys_nice , 1)
1703 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1704 MIPS_SYS(sys_sync , 0)
1705 MIPS_SYS(sys_kill , 2)
1706 MIPS_SYS(sys_rename , 2)
1707 MIPS_SYS(sys_mkdir , 2)
1708 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1709 MIPS_SYS(sys_dup , 1)
1710 MIPS_SYS(sys_pipe , 0)
1711 MIPS_SYS(sys_times , 1)
1712 MIPS_SYS(sys_ni_syscall , 0)
1713 MIPS_SYS(sys_brk , 1) /* 4045 */
1714 MIPS_SYS(sys_setgid , 1)
1715 MIPS_SYS(sys_getgid , 0)
1716 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1717 MIPS_SYS(sys_geteuid , 0)
1718 MIPS_SYS(sys_getegid , 0) /* 4050 */
1719 MIPS_SYS(sys_acct , 0)
1720 MIPS_SYS(sys_umount , 2)
1721 MIPS_SYS(sys_ni_syscall , 0)
1722 MIPS_SYS(sys_ioctl , 3)
1723 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1724 MIPS_SYS(sys_ni_syscall , 2)
1725 MIPS_SYS(sys_setpgid , 2)
1726 MIPS_SYS(sys_ni_syscall , 0)
1727 MIPS_SYS(sys_olduname , 1)
1728 MIPS_SYS(sys_umask , 1) /* 4060 */
1729 MIPS_SYS(sys_chroot , 1)
1730 MIPS_SYS(sys_ustat , 2)
1731 MIPS_SYS(sys_dup2 , 2)
1732 MIPS_SYS(sys_getppid , 0)
1733 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1734 MIPS_SYS(sys_setsid , 0)
1735 MIPS_SYS(sys_sigaction , 3)
1736 MIPS_SYS(sys_sgetmask , 0)
1737 MIPS_SYS(sys_ssetmask , 1)
1738 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1739 MIPS_SYS(sys_setregid , 2)
1740 MIPS_SYS(sys_sigsuspend , 0)
1741 MIPS_SYS(sys_sigpending , 1)
1742 MIPS_SYS(sys_sethostname , 2)
1743 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1744 MIPS_SYS(sys_getrlimit , 2)
1745 MIPS_SYS(sys_getrusage , 2)
1746 MIPS_SYS(sys_gettimeofday, 2)
1747 MIPS_SYS(sys_settimeofday, 2)
1748 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1749 MIPS_SYS(sys_setgroups , 2)
1750 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1751 MIPS_SYS(sys_symlink , 2)
1752 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1753 MIPS_SYS(sys_readlink , 3) /* 4085 */
1754 MIPS_SYS(sys_uselib , 1)
1755 MIPS_SYS(sys_swapon , 2)
1756 MIPS_SYS(sys_reboot , 3)
1757 MIPS_SYS(old_readdir , 3)
1758 MIPS_SYS(old_mmap , 6) /* 4090 */
1759 MIPS_SYS(sys_munmap , 2)
1760 MIPS_SYS(sys_truncate , 2)
1761 MIPS_SYS(sys_ftruncate , 2)
1762 MIPS_SYS(sys_fchmod , 2)
1763 MIPS_SYS(sys_fchown , 3) /* 4095 */
1764 MIPS_SYS(sys_getpriority , 2)
1765 MIPS_SYS(sys_setpriority , 3)
1766 MIPS_SYS(sys_ni_syscall , 0)
1767 MIPS_SYS(sys_statfs , 2)
1768 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1769 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1770 MIPS_SYS(sys_socketcall , 2)
1771 MIPS_SYS(sys_syslog , 3)
1772 MIPS_SYS(sys_setitimer , 3)
1773 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1774 MIPS_SYS(sys_newstat , 2)
1775 MIPS_SYS(sys_newlstat , 2)
1776 MIPS_SYS(sys_newfstat , 2)
1777 MIPS_SYS(sys_uname , 1)
1778 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1779 MIPS_SYS(sys_vhangup , 0)
1780 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1781 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1782 MIPS_SYS(sys_wait4 , 4)
1783 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1784 MIPS_SYS(sys_sysinfo , 1)
1785 MIPS_SYS(sys_ipc , 6)
1786 MIPS_SYS(sys_fsync , 1)
1787 MIPS_SYS(sys_sigreturn , 0)
1788 MIPS_SYS(sys_clone , 6) /* 4120 */
1789 MIPS_SYS(sys_setdomainname, 2)
1790 MIPS_SYS(sys_newuname , 1)
1791 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1792 MIPS_SYS(sys_adjtimex , 1)
1793 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1794 MIPS_SYS(sys_sigprocmask , 3)
1795 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1796 MIPS_SYS(sys_init_module , 5)
1797 MIPS_SYS(sys_delete_module, 1)
1798 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1799 MIPS_SYS(sys_quotactl , 0)
1800 MIPS_SYS(sys_getpgid , 1)
1801 MIPS_SYS(sys_fchdir , 1)
1802 MIPS_SYS(sys_bdflush , 2)
1803 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1804 MIPS_SYS(sys_personality , 1)
1805 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1806 MIPS_SYS(sys_setfsuid , 1)
1807 MIPS_SYS(sys_setfsgid , 1)
1808 MIPS_SYS(sys_llseek , 5) /* 4140 */
1809 MIPS_SYS(sys_getdents , 3)
1810 MIPS_SYS(sys_select , 5)
1811 MIPS_SYS(sys_flock , 2)
1812 MIPS_SYS(sys_msync , 3)
1813 MIPS_SYS(sys_readv , 3) /* 4145 */
1814 MIPS_SYS(sys_writev , 3)
1815 MIPS_SYS(sys_cacheflush , 3)
1816 MIPS_SYS(sys_cachectl , 3)
1817 MIPS_SYS(sys_sysmips , 4)
1818 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1819 MIPS_SYS(sys_getsid , 1)
1820 MIPS_SYS(sys_fdatasync , 0)
1821 MIPS_SYS(sys_sysctl , 1)
1822 MIPS_SYS(sys_mlock , 2)
1823 MIPS_SYS(sys_munlock , 2) /* 4155 */
1824 MIPS_SYS(sys_mlockall , 1)
1825 MIPS_SYS(sys_munlockall , 0)
1826 MIPS_SYS(sys_sched_setparam, 2)
1827 MIPS_SYS(sys_sched_getparam, 2)
1828 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1829 MIPS_SYS(sys_sched_getscheduler, 1)
1830 MIPS_SYS(sys_sched_yield , 0)
1831 MIPS_SYS(sys_sched_get_priority_max, 1)
1832 MIPS_SYS(sys_sched_get_priority_min, 1)
1833 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1834 MIPS_SYS(sys_nanosleep, 2)
1835 MIPS_SYS(sys_mremap , 4)
1836 MIPS_SYS(sys_accept , 3)
1837 MIPS_SYS(sys_bind , 3)
1838 MIPS_SYS(sys_connect , 3) /* 4170 */
1839 MIPS_SYS(sys_getpeername , 3)
1840 MIPS_SYS(sys_getsockname , 3)
1841 MIPS_SYS(sys_getsockopt , 5)
1842 MIPS_SYS(sys_listen , 2)
1843 MIPS_SYS(sys_recv , 4) /* 4175 */
1844 MIPS_SYS(sys_recvfrom , 6)
1845 MIPS_SYS(sys_recvmsg , 3)
1846 MIPS_SYS(sys_send , 4)
1847 MIPS_SYS(sys_sendmsg , 3)
1848 MIPS_SYS(sys_sendto , 6) /* 4180 */
1849 MIPS_SYS(sys_setsockopt , 5)
1850 MIPS_SYS(sys_shutdown , 2)
1851 MIPS_SYS(sys_socket , 3)
1852 MIPS_SYS(sys_socketpair , 4)
1853 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1854 MIPS_SYS(sys_getresuid , 3)
1855 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1856 MIPS_SYS(sys_poll , 3)
1857 MIPS_SYS(sys_nfsservctl , 3)
1858 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1859 MIPS_SYS(sys_getresgid , 3)
1860 MIPS_SYS(sys_prctl , 5)
1861 MIPS_SYS(sys_rt_sigreturn, 0)
1862 MIPS_SYS(sys_rt_sigaction, 4)
1863 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1864 MIPS_SYS(sys_rt_sigpending, 2)
1865 MIPS_SYS(sys_rt_sigtimedwait, 4)
1866 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1867 MIPS_SYS(sys_rt_sigsuspend, 0)
1868 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1869 MIPS_SYS(sys_pwrite64 , 6)
1870 MIPS_SYS(sys_chown , 3)
1871 MIPS_SYS(sys_getcwd , 2)
1872 MIPS_SYS(sys_capget , 2)
1873 MIPS_SYS(sys_capset , 2) /* 4205 */
1874 MIPS_SYS(sys_sigaltstack , 0)
1875 MIPS_SYS(sys_sendfile , 4)
1876 MIPS_SYS(sys_ni_syscall , 0)
1877 MIPS_SYS(sys_ni_syscall , 0)
1878 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1879 MIPS_SYS(sys_truncate64 , 4)
1880 MIPS_SYS(sys_ftruncate64 , 4)
1881 MIPS_SYS(sys_stat64 , 2)
1882 MIPS_SYS(sys_lstat64 , 2)
1883 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1884 MIPS_SYS(sys_pivot_root , 2)
1885 MIPS_SYS(sys_mincore , 3)
1886 MIPS_SYS(sys_madvise , 3)
1887 MIPS_SYS(sys_getdents64 , 3)
1888 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1889 MIPS_SYS(sys_ni_syscall , 0)
1890 MIPS_SYS(sys_gettid , 0)
1891 MIPS_SYS(sys_readahead , 5)
1892 MIPS_SYS(sys_setxattr , 5)
1893 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1894 MIPS_SYS(sys_fsetxattr , 5)
1895 MIPS_SYS(sys_getxattr , 4)
1896 MIPS_SYS(sys_lgetxattr , 4)
1897 MIPS_SYS(sys_fgetxattr , 4)
1898 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1899 MIPS_SYS(sys_llistxattr , 3)
1900 MIPS_SYS(sys_flistxattr , 3)
1901 MIPS_SYS(sys_removexattr , 2)
1902 MIPS_SYS(sys_lremovexattr, 2)
1903 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1904 MIPS_SYS(sys_tkill , 2)
1905 MIPS_SYS(sys_sendfile64 , 5)
1906 MIPS_SYS(sys_futex , 2)
1907 MIPS_SYS(sys_sched_setaffinity, 3)
1908 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1909 MIPS_SYS(sys_io_setup , 2)
1910 MIPS_SYS(sys_io_destroy , 1)
1911 MIPS_SYS(sys_io_getevents, 5)
1912 MIPS_SYS(sys_io_submit , 3)
1913 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1914 MIPS_SYS(sys_exit_group , 1)
1915 MIPS_SYS(sys_lookup_dcookie, 3)
1916 MIPS_SYS(sys_epoll_create, 1)
1917 MIPS_SYS(sys_epoll_ctl , 4)
1918 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1919 MIPS_SYS(sys_remap_file_pages, 5)
1920 MIPS_SYS(sys_set_tid_address, 1)
1921 MIPS_SYS(sys_restart_syscall, 0)
1922 MIPS_SYS(sys_fadvise64_64, 7)
1923 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1924 MIPS_SYS(sys_fstatfs64 , 2)
1925 MIPS_SYS(sys_timer_create, 3)
1926 MIPS_SYS(sys_timer_settime, 4)
1927 MIPS_SYS(sys_timer_gettime, 2)
1928 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1929 MIPS_SYS(sys_timer_delete, 1)
1930 MIPS_SYS(sys_clock_settime, 2)
1931 MIPS_SYS(sys_clock_gettime, 2)
1932 MIPS_SYS(sys_clock_getres, 2)
1933 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1934 MIPS_SYS(sys_tgkill , 3)
1935 MIPS_SYS(sys_utimes , 2)
1936 MIPS_SYS(sys_mbind , 4)
1937 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1938 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1939 MIPS_SYS(sys_mq_open , 4)
1940 MIPS_SYS(sys_mq_unlink , 1)
1941 MIPS_SYS(sys_mq_timedsend, 5)
1942 MIPS_SYS(sys_mq_timedreceive, 5)
1943 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1944 MIPS_SYS(sys_mq_getsetattr, 3)
1945 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1946 MIPS_SYS(sys_waitid , 4)
1947 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1948 MIPS_SYS(sys_add_key , 5)
1949 MIPS_SYS(sys_request_key, 4)
1950 MIPS_SYS(sys_keyctl , 5)
1951 MIPS_SYS(sys_set_thread_area, 1)
1952 MIPS_SYS(sys_inotify_init, 0)
1953 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1954 MIPS_SYS(sys_inotify_rm_watch, 2)
1955 MIPS_SYS(sys_migrate_pages, 4)
1956 MIPS_SYS(sys_openat, 4)
1957 MIPS_SYS(sys_mkdirat, 3)
1958 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1959 MIPS_SYS(sys_fchownat, 5)
1960 MIPS_SYS(sys_futimesat, 3)
1961 MIPS_SYS(sys_fstatat64, 4)
1962 MIPS_SYS(sys_unlinkat, 3)
1963 MIPS_SYS(sys_renameat, 4) /* 4295 */
1964 MIPS_SYS(sys_linkat, 5)
1965 MIPS_SYS(sys_symlinkat, 3)
1966 MIPS_SYS(sys_readlinkat, 4)
1967 MIPS_SYS(sys_fchmodat, 3)
1968 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1969 MIPS_SYS(sys_pselect6, 6)
1970 MIPS_SYS(sys_ppoll, 5)
1971 MIPS_SYS(sys_unshare, 1)
1972 MIPS_SYS(sys_splice, 4)
1973 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1974 MIPS_SYS(sys_tee, 4)
1975 MIPS_SYS(sys_vmsplice, 4)
1976 MIPS_SYS(sys_move_pages, 6)
1977 MIPS_SYS(sys_set_robust_list, 2)
1978 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1979 MIPS_SYS(sys_kexec_load, 4)
1980 MIPS_SYS(sys_getcpu, 3)
1981 MIPS_SYS(sys_epoll_pwait, 6)
1982 MIPS_SYS(sys_ioprio_set, 3)
1983 MIPS_SYS(sys_ioprio_get, 2)
1984 };
1985
1986 #undef MIPS_SYS
1987
1988 static int do_store_exclusive(CPUMIPSState *env)
1989 {
1990 target_ulong addr;
1991 target_ulong page_addr;
1992 target_ulong val;
1993 int flags;
1994 int segv = 0;
1995 int reg;
1996 int d;
1997
1998 addr = env->lladdr;
1999 page_addr = addr & TARGET_PAGE_MASK;
2000 start_exclusive();
2001 mmap_lock();
2002 flags = page_get_flags(page_addr);
2003 if ((flags & PAGE_READ) == 0) {
2004 segv = 1;
2005 } else {
2006 reg = env->llreg & 0x1f;
2007 d = (env->llreg & 0x20) != 0;
2008 if (d) {
2009 segv = get_user_s64(val, addr);
2010 } else {
2011 segv = get_user_s32(val, addr);
2012 }
2013 if (!segv) {
2014 if (val != env->llval) {
2015 env->active_tc.gpr[reg] = 0;
2016 } else {
2017 if (d) {
2018 segv = put_user_u64(env->llnewval, addr);
2019 } else {
2020 segv = put_user_u32(env->llnewval, addr);
2021 }
2022 if (!segv) {
2023 env->active_tc.gpr[reg] = 1;
2024 }
2025 }
2026 }
2027 }
2028 env->lladdr = -1;
2029 if (!segv) {
2030 env->active_tc.PC += 4;
2031 }
2032 mmap_unlock();
2033 end_exclusive();
2034 return segv;
2035 }
2036
2037 void cpu_loop(CPUMIPSState *env)
2038 {
2039 target_siginfo_t info;
2040 int trapnr, ret;
2041 unsigned int syscall_num;
2042
2043 for(;;) {
2044 cpu_exec_start(env);
2045 trapnr = cpu_mips_exec(env);
2046 cpu_exec_end(env);
2047 switch(trapnr) {
2048 case EXCP_SYSCALL:
2049 syscall_num = env->active_tc.gpr[2] - 4000;
2050 env->active_tc.PC += 4;
2051 if (syscall_num >= sizeof(mips_syscall_args)) {
2052 ret = -ENOSYS;
2053 } else {
2054 int nb_args;
2055 abi_ulong sp_reg;
2056 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
2057
2058 nb_args = mips_syscall_args[syscall_num];
2059 sp_reg = env->active_tc.gpr[29];
2060 switch (nb_args) {
2061 /* these arguments are taken from the stack */
2062 /* FIXME - what to do if get_user() fails? */
2063 case 8: get_user_ual(arg8, sp_reg + 28);
2064 case 7: get_user_ual(arg7, sp_reg + 24);
2065 case 6: get_user_ual(arg6, sp_reg + 20);
2066 case 5: get_user_ual(arg5, sp_reg + 16);
2067 default:
2068 break;
2069 }
2070 ret = do_syscall(env, env->active_tc.gpr[2],
2071 env->active_tc.gpr[4],
2072 env->active_tc.gpr[5],
2073 env->active_tc.gpr[6],
2074 env->active_tc.gpr[7],
2075 arg5, arg6/*, arg7, arg8*/);
2076 }
2077 if (ret == -TARGET_QEMU_ESIGRETURN) {
2078 /* Returning from a successful sigreturn syscall.
2079 Avoid clobbering register state. */
2080 break;
2081 }
2082 if ((unsigned int)ret >= (unsigned int)(-1133)) {
2083 env->active_tc.gpr[7] = 1; /* error flag */
2084 ret = -ret;
2085 } else {
2086 env->active_tc.gpr[7] = 0; /* error flag */
2087 }
2088 env->active_tc.gpr[2] = ret;
2089 break;
2090 case EXCP_TLBL:
2091 case EXCP_TLBS:
2092 info.si_signo = TARGET_SIGSEGV;
2093 info.si_errno = 0;
2094 /* XXX: check env->error_code */
2095 info.si_code = TARGET_SEGV_MAPERR;
2096 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2097 queue_signal(env, info.si_signo, &info);
2098 break;
2099 case EXCP_CpU:
2100 case EXCP_RI:
2101 info.si_signo = TARGET_SIGILL;
2102 info.si_errno = 0;
2103 info.si_code = 0;
2104 queue_signal(env, info.si_signo, &info);
2105 break;
2106 case EXCP_INTERRUPT:
2107 /* just indicate that signals should be handled asap */
2108 break;
2109 case EXCP_DEBUG:
2110 {
2111 int sig;
2112
2113 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2114 if (sig)
2115 {
2116 info.si_signo = sig;
2117 info.si_errno = 0;
2118 info.si_code = TARGET_TRAP_BRKPT;
2119 queue_signal(env, info.si_signo, &info);
2120 }
2121 }
2122 break;
2123 case EXCP_SC:
2124 if (do_store_exclusive(env)) {
2125 info.si_signo = TARGET_SIGSEGV;
2126 info.si_errno = 0;
2127 info.si_code = TARGET_SEGV_MAPERR;
2128 info._sifields._sigfault._addr = env->active_tc.PC;
2129 queue_signal(env, info.si_signo, &info);
2130 }
2131 break;
2132 default:
2133 // error:
2134 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2135 trapnr);
2136 cpu_dump_state(env, stderr, fprintf, 0);
2137 abort();
2138 }
2139 process_pending_signals(env);
2140 }
2141 }
2142 #endif
2143
2144 #ifdef TARGET_SH4
2145 void cpu_loop (CPUState *env)
2146 {
2147 int trapnr, ret;
2148 target_siginfo_t info;
2149
2150 while (1) {
2151 trapnr = cpu_sh4_exec (env);
2152
2153 switch (trapnr) {
2154 case 0x160:
2155 env->pc += 2;
2156 ret = do_syscall(env,
2157 env->gregs[3],
2158 env->gregs[4],
2159 env->gregs[5],
2160 env->gregs[6],
2161 env->gregs[7],
2162 env->gregs[0],
2163 env->gregs[1]);
2164 env->gregs[0] = ret;
2165 break;
2166 case EXCP_INTERRUPT:
2167 /* just indicate that signals should be handled asap */
2168 break;
2169 case EXCP_DEBUG:
2170 {
2171 int sig;
2172
2173 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2174 if (sig)
2175 {
2176 info.si_signo = sig;
2177 info.si_errno = 0;
2178 info.si_code = TARGET_TRAP_BRKPT;
2179 queue_signal(env, info.si_signo, &info);
2180 }
2181 }
2182 break;
2183 case 0xa0:
2184 case 0xc0:
2185 info.si_signo = SIGSEGV;
2186 info.si_errno = 0;
2187 info.si_code = TARGET_SEGV_MAPERR;
2188 info._sifields._sigfault._addr = env->tea;
2189 queue_signal(env, info.si_signo, &info);
2190 break;
2191
2192 default:
2193 printf ("Unhandled trap: 0x%x\n", trapnr);
2194 cpu_dump_state(env, stderr, fprintf, 0);
2195 exit (1);
2196 }
2197 process_pending_signals (env);
2198 }
2199 }
2200 #endif
2201
2202 #ifdef TARGET_CRIS
2203 void cpu_loop (CPUState *env)
2204 {
2205 int trapnr, ret;
2206 target_siginfo_t info;
2207
2208 while (1) {
2209 trapnr = cpu_cris_exec (env);
2210 switch (trapnr) {
2211 case 0xaa:
2212 {
2213 info.si_signo = SIGSEGV;
2214 info.si_errno = 0;
2215 /* XXX: check env->error_code */
2216 info.si_code = TARGET_SEGV_MAPERR;
2217 info._sifields._sigfault._addr = env->pregs[PR_EDA];
2218 queue_signal(env, info.si_signo, &info);
2219 }
2220 break;
2221 case EXCP_INTERRUPT:
2222 /* just indicate that signals should be handled asap */
2223 break;
2224 case EXCP_BREAK:
2225 ret = do_syscall(env,
2226 env->regs[9],
2227 env->regs[10],
2228 env->regs[11],
2229 env->regs[12],
2230 env->regs[13],
2231 env->pregs[7],
2232 env->pregs[11]);
2233 env->regs[10] = ret;
2234 break;
2235 case EXCP_DEBUG:
2236 {
2237 int sig;
2238
2239 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2240 if (sig)
2241 {
2242 info.si_signo = sig;
2243 info.si_errno = 0;
2244 info.si_code = TARGET_TRAP_BRKPT;
2245 queue_signal(env, info.si_signo, &info);
2246 }
2247 }
2248 break;
2249 default:
2250 printf ("Unhandled trap: 0x%x\n", trapnr);
2251 cpu_dump_state(env, stderr, fprintf, 0);
2252 exit (1);
2253 }
2254 process_pending_signals (env);
2255 }
2256 }
2257 #endif
2258
2259 #ifdef TARGET_MICROBLAZE
2260 void cpu_loop (CPUState *env)
2261 {
2262 int trapnr, ret;
2263 target_siginfo_t info;
2264
2265 while (1) {
2266 trapnr = cpu_mb_exec (env);
2267 switch (trapnr) {
2268 case 0xaa:
2269 {
2270 info.si_signo = SIGSEGV;
2271 info.si_errno = 0;
2272 /* XXX: check env->error_code */
2273 info.si_code = TARGET_SEGV_MAPERR;
2274 info._sifields._sigfault._addr = 0;
2275 queue_signal(env, info.si_signo, &info);
2276 }
2277 break;
2278 case EXCP_INTERRUPT:
2279 /* just indicate that signals should be handled asap */
2280 break;
2281 case EXCP_BREAK:
2282 /* Return address is 4 bytes after the call. */
2283 env->regs[14] += 4;
2284 ret = do_syscall(env,
2285 env->regs[12],
2286 env->regs[5],
2287 env->regs[6],
2288 env->regs[7],
2289 env->regs[8],
2290 env->regs[9],
2291 env->regs[10]);
2292 env->regs[3] = ret;
2293 env->sregs[SR_PC] = env->regs[14];
2294 break;
2295 case EXCP_HW_EXCP:
2296 env->regs[17] = env->sregs[SR_PC] + 4;
2297 if (env->iflags & D_FLAG) {
2298 env->sregs[SR_ESR] |= 1 << 12;
2299 env->sregs[SR_PC] -= 4;
2300 /* FIXME: if branch was immed, replay the imm aswell. */
2301 }
2302
2303 env->iflags &= ~(IMM_FLAG | D_FLAG);
2304
2305 switch (env->sregs[SR_ESR] & 31) {
2306 case ESR_EC_FPU:
2307 info.si_signo = SIGFPE;
2308 info.si_errno = 0;
2309 if (env->sregs[SR_FSR] & FSR_IO) {
2310 info.si_code = TARGET_FPE_FLTINV;
2311 }
2312 if (env->sregs[SR_FSR] & FSR_DZ) {
2313 info.si_code = TARGET_FPE_FLTDIV;
2314 }
2315 info._sifields._sigfault._addr = 0;
2316 queue_signal(env, info.si_signo, &info);
2317 break;
2318 default:
2319 printf ("Unhandled hw-exception: 0x%x\n",
2320 env->sregs[SR_ESR] & ESR_EC_MASK);
2321 cpu_dump_state(env, stderr, fprintf, 0);
2322 exit (1);
2323 break;
2324 }
2325 break;
2326 case EXCP_DEBUG:
2327 {
2328 int sig;
2329
2330 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2331 if (sig)
2332 {
2333 info.si_signo = sig;
2334 info.si_errno = 0;
2335 info.si_code = TARGET_TRAP_BRKPT;
2336 queue_signal(env, info.si_signo, &info);
2337 }
2338 }
2339 break;
2340 default:
2341 printf ("Unhandled trap: 0x%x\n", trapnr);
2342 cpu_dump_state(env, stderr, fprintf, 0);
2343 exit (1);
2344 }
2345 process_pending_signals (env);
2346 }
2347 }
2348 #endif
2349
2350 #ifdef TARGET_M68K
2351
2352 void cpu_loop(CPUM68KState *env)
2353 {
2354 int trapnr;
2355 unsigned int n;
2356 target_siginfo_t info;
2357 TaskState *ts = env->opaque;
2358
2359 for(;;) {
2360 trapnr = cpu_m68k_exec(env);
2361 switch(trapnr) {
2362 case EXCP_ILLEGAL:
2363 {
2364 if (ts->sim_syscalls) {
2365 uint16_t nr;
2366 nr = lduw(env->pc + 2);
2367 env->pc += 4;
2368 do_m68k_simcall(env, nr);
2369 } else {
2370 goto do_sigill;
2371 }
2372 }
2373 break;
2374 case EXCP_HALT_INSN:
2375 /* Semihosing syscall. */
2376 env->pc += 4;
2377 do_m68k_semihosting(env, env->dregs[0]);
2378 break;
2379 case EXCP_LINEA:
2380 case EXCP_LINEF:
2381 case EXCP_UNSUPPORTED:
2382 do_sigill:
2383 info.si_signo = SIGILL;
2384 info.si_errno = 0;
2385 info.si_code = TARGET_ILL_ILLOPN;
2386 info._sifields._sigfault._addr = env->pc;
2387 queue_signal(env, info.si_signo, &info);
2388 break;
2389 case EXCP_TRAP0:
2390 {
2391 ts->sim_syscalls = 0;
2392 n = env->dregs[0];
2393 env->pc += 2;
2394 env->dregs[0] = do_syscall(env,
2395 n,
2396 env->dregs[1],
2397 env->dregs[2],
2398 env->dregs[3],
2399 env->dregs[4],
2400 env->dregs[5],
2401 env->aregs[0]);
2402 }
2403 break;
2404 case EXCP_INTERRUPT:
2405 /* just indicate that signals should be handled asap */
2406 break;
2407 case EXCP_ACCESS:
2408 {
2409 info.si_signo = SIGSEGV;
2410 info.si_errno = 0;
2411 /* XXX: check env->error_code */
2412 info.si_code = TARGET_SEGV_MAPERR;
2413 info._sifields._sigfault._addr = env->mmu.ar;
2414 queue_signal(env, info.si_signo, &info);
2415 }
2416 break;
2417 case EXCP_DEBUG:
2418 {
2419 int sig;
2420
2421 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2422 if (sig)
2423 {
2424 info.si_signo = sig;
2425 info.si_errno = 0;
2426 info.si_code = TARGET_TRAP_BRKPT;
2427 queue_signal(env, info.si_signo, &info);
2428 }
2429 }
2430 break;
2431 default:
2432 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2433 trapnr);
2434 cpu_dump_state(env, stderr, fprintf, 0);
2435 abort();
2436 }
2437 process_pending_signals(env);
2438 }
2439 }
2440 #endif /* TARGET_M68K */
2441
2442 #ifdef TARGET_ALPHA
2443 static void do_store_exclusive(CPUAlphaState *env, int reg, int quad)
2444 {
2445 target_ulong addr, val, tmp;
2446 target_siginfo_t info;
2447 int ret = 0;
2448
2449 addr = env->lock_addr;
2450 tmp = env->lock_st_addr;
2451 env->lock_addr = -1;
2452 env->lock_st_addr = 0;
2453
2454 start_exclusive();
2455 mmap_lock();
2456
2457 if (addr == tmp) {
2458 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
2459 goto do_sigsegv;
2460 }
2461
2462 if (val == env->lock_value) {
2463 tmp = env->ir[reg];
2464 if (quad ? put_user_u64(tmp, addr) : put_user_u32(tmp, addr)) {
2465 goto do_sigsegv;
2466 }
2467 ret = 1;
2468 }
2469 }
2470 env->ir[reg] = ret;
2471 env->pc += 4;
2472
2473 mmap_unlock();
2474 end_exclusive();
2475 return;
2476
2477 do_sigsegv:
2478 mmap_unlock();
2479 end_exclusive();
2480
2481 info.si_signo = TARGET_SIGSEGV;
2482 info.si_errno = 0;
2483 info.si_code = TARGET_SEGV_MAPERR;
2484 info._sifields._sigfault._addr = addr;
2485 queue_signal(env, TARGET_SIGSEGV, &info);
2486 }
2487
2488 void cpu_loop (CPUState *env)
2489 {
2490 int trapnr;
2491 target_siginfo_t info;
2492 abi_long sysret;
2493
2494 while (1) {
2495 trapnr = cpu_alpha_exec (env);
2496
2497 /* All of the traps imply a transition through PALcode, which
2498 implies an REI instruction has been executed. Which means
2499 that the intr_flag should be cleared. */
2500 env->intr_flag = 0;
2501
2502 switch (trapnr) {
2503 case EXCP_RESET:
2504 fprintf(stderr, "Reset requested. Exit\n");
2505 exit(1);
2506 break;
2507 case EXCP_MCHK:
2508 fprintf(stderr, "Machine check exception. Exit\n");
2509 exit(1);
2510 break;
2511 case EXCP_ARITH:
2512 env->lock_addr = -1;
2513 info.si_signo = TARGET_SIGFPE;
2514 info.si_errno = 0;
2515 info.si_code = TARGET_FPE_FLTINV;
2516 info._sifields._sigfault._addr = env->pc;
2517 queue_signal(env, info.si_signo, &info);
2518 break;
2519 case EXCP_HW_INTERRUPT:
2520 fprintf(stderr, "External interrupt. Exit\n");
2521 exit(1);
2522 break;
2523 case EXCP_DFAULT:
2524 env->lock_addr = -1;
2525 info.si_signo = TARGET_SIGSEGV;
2526 info.si_errno = 0;
2527 info.si_code = (page_get_flags(env->ipr[IPR_EXC_ADDR]) & PAGE_VALID
2528 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
2529 info._sifields._sigfault._addr = env->ipr[IPR_EXC_ADDR];
2530 queue_signal(env, info.si_signo, &info);
2531 break;
2532 case EXCP_DTB_MISS_PAL:
2533 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2534 exit(1);
2535 break;
2536 case EXCP_ITB_MISS:
2537 fprintf(stderr, "MMU instruction TLB miss\n");
2538 exit(1);
2539 break;
2540 case EXCP_ITB_ACV:
2541 fprintf(stderr, "MMU instruction access violation\n");
2542 exit(1);
2543 break;
2544 case EXCP_DTB_MISS_NATIVE:
2545 fprintf(stderr, "MMU data TLB miss\n");
2546 exit(1);
2547 break;
2548 case EXCP_UNALIGN:
2549 env->lock_addr = -1;
2550 info.si_signo = TARGET_SIGBUS;
2551 info.si_errno = 0;
2552 info.si_code = TARGET_BUS_ADRALN;
2553 info._sifields._sigfault._addr = env->ipr[IPR_EXC_ADDR];
2554 queue_signal(env, info.si_signo, &info);
2555 break;
2556 case EXCP_OPCDEC:
2557 do_sigill:
2558 env->lock_addr = -1;
2559 info.si_signo = TARGET_SIGILL;
2560 info.si_errno = 0;
2561 info.si_code = TARGET_ILL_ILLOPC;
2562 info._sifields._sigfault._addr = env->pc;
2563 queue_signal(env, info.si_signo, &info);
2564 break;
2565 case EXCP_FEN:
2566 /* No-op. Linux simply re-enables the FPU. */
2567 break;
2568 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2569 env->lock_addr = -1;
2570 switch ((trapnr >> 6) | 0x80) {
2571 case 0x80:
2572 /* BPT */
2573 info.si_signo = TARGET_SIGTRAP;
2574 info.si_errno = 0;
2575 info.si_code = TARGET_TRAP_BRKPT;
2576 info._sifields._sigfault._addr = env->pc;
2577 queue_signal(env, info.si_signo, &info);
2578 break;
2579 case 0x81:
2580 /* BUGCHK */
2581 info.si_signo = TARGET_SIGTRAP;
2582 info.si_errno = 0;
2583 info.si_code = 0;
2584 info._sifields._sigfault._addr = env->pc;
2585 queue_signal(env, info.si_signo, &info);
2586 break;
2587 case 0x83:
2588 /* CALLSYS */
2589 trapnr = env->ir[IR_V0];
2590 sysret = do_syscall(env, trapnr,
2591 env->ir[IR_A0], env->ir[IR_A1],
2592 env->ir[IR_A2], env->ir[IR_A3],
2593 env->ir[IR_A4], env->ir[IR_A5]);
2594 if (trapnr == TARGET_NR_sigreturn
2595 || trapnr == TARGET_NR_rt_sigreturn) {
2596 break;
2597 }
2598 /* Syscall writes 0 to V0 to bypass error check, similar
2599 to how this is handled internal to Linux kernel. */
2600 if (env->ir[IR_V0] == 0) {
2601 env->ir[IR_V0] = sysret;
2602 } else {
2603 env->ir[IR_V0] = (sysret < 0 ? -sysret : sysret);
2604 env->ir[IR_A3] = (sysret < 0);
2605 }
2606 break;
2607 case 0x86:
2608 /* IMB */
2609 /* ??? We can probably elide the code using page_unprotect
2610 that is checking for self-modifying code. Instead we
2611 could simply call tb_flush here. Until we work out the
2612 changes required to turn off the extra write protection,
2613 this can be a no-op. */
2614 break;
2615 case 0x9E:
2616 /* RDUNIQUE */
2617 /* Handled in the translator for usermode. */
2618 abort();
2619 case 0x9F:
2620 /* WRUNIQUE */
2621 /* Handled in the translator for usermode. */
2622 abort();
2623 case 0xAA:
2624 /* GENTRAP */
2625 info.si_signo = TARGET_SIGFPE;
2626 switch (env->ir[IR_A0]) {
2627 case TARGET_GEN_INTOVF:
2628 info.si_code = TARGET_FPE_INTOVF;
2629 break;
2630 case TARGET_GEN_INTDIV:
2631 info.si_code = TARGET_FPE_INTDIV;
2632 break;
2633 case TARGET_GEN_FLTOVF:
2634 info.si_code = TARGET_FPE_FLTOVF;
2635 break;
2636 case TARGET_GEN_FLTUND:
2637 info.si_code = TARGET_FPE_FLTUND;
2638 break;
2639 case TARGET_GEN_FLTINV:
2640 info.si_code = TARGET_FPE_FLTINV;
2641 break;
2642 case TARGET_GEN_FLTINE:
2643 info.si_code = TARGET_FPE_FLTRES;
2644 break;
2645 case TARGET_GEN_ROPRAND:
2646 info.si_code = 0;
2647 break;
2648 default:
2649 info.si_signo = TARGET_SIGTRAP;
2650 info.si_code = 0;
2651 break;
2652 }
2653 info.si_errno = 0;
2654 info._sifields._sigfault._addr = env->pc;
2655 queue_signal(env, info.si_signo, &info);
2656 break;
2657 default:
2658 goto do_sigill;
2659 }
2660 break;
2661 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2662 goto do_sigill;
2663 case EXCP_DEBUG:
2664 info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
2665 if (info.si_signo) {
2666 env->lock_addr = -1;
2667 info.si_errno = 0;
2668 info.si_code = TARGET_TRAP_BRKPT;
2669 queue_signal(env, info.si_signo, &info);
2670 }
2671 break;
2672 case EXCP_STL_C:
2673 case EXCP_STQ_C:
2674 do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C);
2675 break;
2676 default:
2677 printf ("Unhandled trap: 0x%x\n", trapnr);
2678 cpu_dump_state(env, stderr, fprintf, 0);
2679 exit (1);
2680 }
2681 process_pending_signals (env);
2682 }
2683 }
2684 #endif /* TARGET_ALPHA */
2685
2686 static void version(void)
2687 {
2688 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION
2689 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
2690 }
2691
2692 static void usage(void)
2693 {
2694 version();
2695 printf("usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2696 "Linux CPU emulator (compiled for %s emulation)\n"
2697 "\n"
2698 "Standard options:\n"
2699 "-h print this help\n"
2700 "-version display version information and exit\n"
2701 "-g port wait gdb connection to port\n"
2702 "-L path set the elf interpreter prefix (default=%s)\n"
2703 "-s size set the stack size in bytes (default=%ld)\n"
2704 "-cpu model select CPU (-cpu ? for list)\n"
2705 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2706 "-E var=value sets/modifies targets environment variable(s)\n"
2707 "-U var unsets targets environment variable(s)\n"
2708 "-0 argv0 forces target process argv[0] to be argv0\n"
2709 #if defined(CONFIG_USE_GUEST_BASE)
2710 "-B address set guest_base address to address\n"
2711 "-R size reserve size bytes for guest virtual address space\n"
2712 #endif
2713 "\n"
2714 "Debug options:\n"
2715 "-d options activate log (logfile=%s)\n"
2716 "-p pagesize set the host page size to 'pagesize'\n"
2717 "-singlestep always run in singlestep mode\n"
2718 "-strace log system calls\n"
2719 "\n"
2720 "Environment variables:\n"
2721 "QEMU_STRACE Print system calls and arguments similar to the\n"
2722 " 'strace' program. Enable by setting to any value.\n"
2723 "You can use -E and -U options to set/unset environment variables\n"
2724 "for target process. It is possible to provide several variables\n"
2725 "by repeating the option. For example:\n"
2726 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2727 "Note that if you provide several changes to single variable\n"
2728 "last change will stay in effect.\n"
2729 ,
2730 TARGET_ARCH,
2731 interp_prefix,
2732 guest_stack_size,
2733 DEBUG_LOGFILE);
2734 exit(1);
2735 }
2736
2737 THREAD CPUState *thread_env;
2738
2739 void task_settid(TaskState *ts)
2740 {
2741 if (ts->ts_tid == 0) {
2742 #ifdef CONFIG_USE_NPTL
2743 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2744 #else
2745 /* when no threads are used, tid becomes pid */
2746 ts->ts_tid = getpid();
2747 #endif
2748 }
2749 }
2750
2751 void stop_all_tasks(void)
2752 {
2753 /*
2754 * We trust that when using NPTL, start_exclusive()
2755 * handles thread stopping correctly.
2756 */
2757 start_exclusive();
2758 }
2759
2760 /* Assumes contents are already zeroed. */
2761 void init_task_state(TaskState *ts)
2762 {
2763 int i;
2764
2765 ts->used = 1;
2766 ts->first_free = ts->sigqueue_table;
2767 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2768 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2769 }
2770 ts->sigqueue_table[i].next = NULL;
2771 }
2772
2773 int main(int argc, char **argv, char **envp)
2774 {
2775 const char *filename;
2776 const char *cpu_model;
2777 struct target_pt_regs regs1, *regs = &regs1;
2778 struct image_info info1, *info = &info1;
2779 struct linux_binprm bprm;
2780 TaskState *ts;
2781 CPUState *env;
2782 int optind;
2783 const char *r;
2784 int gdbstub_port = 0;
2785 char **target_environ, **wrk;
2786 char **target_argv;
2787 int target_argc;
2788 envlist_t *envlist = NULL;
2789 const char *argv0 = NULL;
2790 int i;
2791 int ret;
2792
2793 if (argc <= 1)
2794 usage();
2795
2796 qemu_cache_utils_init(envp);
2797
2798 /* init debug */
2799 cpu_set_log_filename(DEBUG_LOGFILE);
2800
2801 if ((envlist = envlist_create()) == NULL) {
2802 (void) fprintf(stderr, "Unable to allocate envlist\n");
2803 exit(1);
2804 }
2805
2806 /* add current environment into the list */
2807 for (wrk = environ; *wrk != NULL; wrk++) {
2808 (void) envlist_setenv(envlist, *wrk);
2809 }
2810
2811 /* Read the stack limit from the kernel. If it's "unlimited",
2812 then we can do little else besides use the default. */
2813 {
2814 struct rlimit lim;
2815 if (getrlimit(RLIMIT_STACK, &lim) == 0
2816 && lim.rlim_cur != RLIM_INFINITY
2817 && lim.rlim_cur == (target_long)lim.rlim_cur) {
2818 guest_stack_size = lim.rlim_cur;
2819 }
2820 }
2821
2822 cpu_model = NULL;
2823 #if defined(cpudef_setup)
2824 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
2825 #endif
2826
2827 optind = 1;
2828 for(;;) {
2829 if (optind >= argc)
2830 break;
2831 r = argv[optind];
2832 if (r[0] != '-')
2833 break;
2834 optind++;
2835 r++;
2836 if (!strcmp(r, "-")) {
2837 break;
2838 } else if (!strcmp(r, "d")) {
2839 int mask;
2840 const CPULogItem *item;
2841
2842 if (optind >= argc)
2843 break;
2844
2845 r = argv[optind++];
2846 mask = cpu_str_to_log_mask(r);
2847 if (!mask) {
2848 printf("Log items (comma separated):\n");
2849 for(item = cpu_log_items; item->mask != 0; item++) {
2850 printf("%-10s %s\n", item->name, item->help);
2851 }
2852 exit(1);
2853 }
2854 cpu_set_log(mask);
2855 } else if (!strcmp(r, "E")) {
2856 r = argv[optind++];
2857 if (envlist_setenv(envlist, r) != 0)
2858 usage();
2859 } else if (!strcmp(r, "ignore-environment")) {
2860 envlist_free(envlist);
2861 if ((envlist = envlist_create()) == NULL) {
2862 (void) fprintf(stderr, "Unable to allocate envlist\n");
2863 exit(1);
2864 }
2865 } else if (!strcmp(r, "U")) {
2866 r = argv[optind++];
2867 if (envlist_unsetenv(envlist, r) != 0)
2868 usage();
2869 } else if (!strcmp(r, "0")) {
2870 r = argv[optind++];
2871 argv0 = r;
2872 } else if (!strcmp(r, "s")) {
2873 if (optind >= argc)
2874 break;
2875 r = argv[optind++];
2876 guest_stack_size = strtoul(r, (char **)&r, 0);
2877 if (guest_stack_size == 0)
2878 usage();
2879 if (*r == 'M')
2880 guest_stack_size *= 1024 * 1024;
2881 else if (*r == 'k' || *r == 'K')
2882 guest_stack_size *= 1024;
2883 } else if (!strcmp(r, "L")) {
2884 interp_prefix = argv[optind++];
2885 } else if (!strcmp(r, "p")) {
2886 if (optind >= argc)
2887 break;
2888 qemu_host_page_size = atoi(argv[optind++]);
2889 if (qemu_host_page_size == 0 ||
2890 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2891 fprintf(stderr, "page size must be a power of two\n");
2892 exit(1);
2893 }
2894 } else if (!strcmp(r, "g")) {
2895 if (optind >= argc)
2896 break;
2897 gdbstub_port = atoi(argv[optind++]);
2898 } else if (!strcmp(r, "r")) {
2899 qemu_uname_release = argv[optind++];
2900 } else if (!strcmp(r, "cpu")) {
2901 cpu_model = argv[optind++];
2902 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
2903 /* XXX: implement xxx_cpu_list for targets that still miss it */
2904 #if defined(cpu_list_id)
2905 cpu_list_id(stdout, &fprintf, "");
2906 #elif defined(cpu_list)
2907 cpu_list(stdout, &fprintf); /* deprecated */
2908 #endif
2909 exit(1);
2910 }
2911 #if defined(CONFIG_USE_GUEST_BASE)
2912 } else if (!strcmp(r, "B")) {
2913 guest_base = strtol(argv[optind++], NULL, 0);
2914 have_guest_base = 1;
2915 } else if (!strcmp(r, "R")) {
2916 char *p;
2917 int shift = 0;
2918 reserved_va = strtoul(argv[optind++], &p, 0);
2919 switch (*p) {
2920 case 'k':
2921 case 'K':
2922 shift = 10;
2923 break;
2924 case 'M':
2925 shift = 20;
2926 break;
2927 case 'G':
2928 shift = 30;
2929 break;
2930 }
2931 if (shift) {
2932 unsigned long unshifted = reserved_va;
2933 p++;
2934 reserved_va <<= shift;
2935 if (((reserved_va >> shift) != unshifted)
2936 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
2937 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
2938 #endif
2939 ) {
2940 fprintf(stderr, "Reserved virtual address too big\n");
2941 exit(1);
2942 }
2943 }
2944 if (*p) {
2945 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
2946 exit(1);
2947 }
2948 #endif
2949 } else if (!strcmp(r, "drop-ld-preload")) {
2950 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
2951 } else if (!strcmp(r, "singlestep")) {
2952 singlestep = 1;
2953 } else if (!strcmp(r, "strace")) {
2954 do_strace = 1;
2955 } else if (!strcmp(r, "version")) {
2956 version();
2957 exit(0);
2958 } else {
2959 usage();
2960 }
2961 }
2962 if (optind >= argc)
2963 usage();
2964 filename = argv[optind];
2965 exec_path = argv[optind];
2966
2967 /* Zero out regs */
2968 memset(regs, 0, sizeof(struct target_pt_regs));
2969
2970 /* Zero out image_info */
2971 memset(info, 0, sizeof(struct image_info));
2972
2973 memset(&bprm, 0, sizeof (bprm));
2974
2975 /* Scan interp_prefix dir for replacement files. */
2976 init_paths(interp_prefix);
2977
2978 if (cpu_model == NULL) {
2979 #if defined(TARGET_I386)
2980 #ifdef TARGET_X86_64
2981 cpu_model = "qemu64";
2982 #else
2983 cpu_model = "qemu32";
2984 #endif
2985 #elif defined(TARGET_ARM)
2986 cpu_model = "any";
2987 #elif defined(TARGET_UNICORE32)
2988 cpu_model = "any";
2989 #elif defined(TARGET_M68K)
2990 cpu_model = "any";
2991 #elif defined(TARGET_SPARC)
2992 #ifdef TARGET_SPARC64
2993 cpu_model = "TI UltraSparc II";
2994 #else
2995 cpu_model = "Fujitsu MB86904";
2996 #endif
2997 #elif defined(TARGET_MIPS)
2998 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2999 cpu_model = "20Kc";
3000 #else
3001 cpu_model = "24Kf";
3002 #endif
3003 #elif defined(TARGET_PPC)
3004 #ifdef TARGET_PPC64
3005 cpu_model = "970fx";
3006 #else
3007 cpu_model = "750";
3008 #endif
3009 #else
3010 cpu_model = "any";
3011 #endif
3012 }
3013 cpu_exec_init_all(0);
3014 /* NOTE: we need to init the CPU at this stage to get
3015 qemu_host_page_size */
3016 env = cpu_init(cpu_model);
3017 if (!env) {
3018 fprintf(stderr, "Unable to find CPU definition\n");
3019 exit(1);
3020 }
3021 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
3022 cpu_reset(env);
3023 #endif
3024
3025 thread_env = env;
3026
3027 if (getenv("QEMU_STRACE")) {
3028 do_strace = 1;
3029 }
3030
3031 target_environ = envlist_to_environ(envlist, NULL);
3032 envlist_free(envlist);
3033
3034 #if defined(CONFIG_USE_GUEST_BASE)
3035 /*
3036 * Now that page sizes are configured in cpu_init() we can do
3037 * proper page alignment for guest_base.
3038 */
3039 guest_base = HOST_PAGE_ALIGN(guest_base);
3040
3041 if (reserved_va) {
3042 void *p;
3043 int flags;
3044
3045 flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE;
3046 if (have_guest_base) {
3047 flags |= MAP_FIXED;
3048 }
3049 p = mmap((void *)guest_base, reserved_va, PROT_NONE, flags, -1, 0);
3050 if (p == MAP_FAILED) {
3051 fprintf(stderr, "Unable to reserve guest address space\n");
3052 exit(1);
3053 }
3054 guest_base = (unsigned long)p;
3055 /* Make sure the address is properly aligned. */
3056 if (guest_base & ~qemu_host_page_mask) {
3057 munmap(p, reserved_va);
3058 p = mmap((void *)guest_base, reserved_va + qemu_host_page_size,
3059 PROT_NONE, flags, -1, 0);
3060 if (p == MAP_FAILED) {
3061 fprintf(stderr, "Unable to reserve guest address space\n");
3062 exit(1);
3063 }
3064 guest_base = HOST_PAGE_ALIGN((unsigned long)p);
3065 }
3066 qemu_log("Reserved 0x%lx bytes of guest address space\n", reserved_va);
3067 }
3068 #endif /* CONFIG_USE_GUEST_BASE */
3069
3070 /*
3071 * Read in mmap_min_addr kernel parameter. This value is used
3072 * When loading the ELF image to determine whether guest_base
3073 * is needed. It is also used in mmap_find_vma.
3074 */
3075 {
3076 FILE *fp;
3077
3078 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
3079 unsigned long tmp;
3080 if (fscanf(fp, "%lu", &tmp) == 1) {
3081 mmap_min_addr = tmp;
3082 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
3083 }
3084 fclose(fp);
3085 }
3086 }
3087
3088 /*
3089 * Prepare copy of argv vector for target.
3090 */
3091 target_argc = argc - optind;
3092 target_argv = calloc(target_argc + 1, sizeof (char *));
3093 if (target_argv == NULL) {
3094 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
3095 exit(1);
3096 }
3097
3098 /*
3099 * If argv0 is specified (using '-0' switch) we replace
3100 * argv[0] pointer with the given one.
3101 */
3102 i = 0;
3103 if (argv0 != NULL) {
3104 target_argv[i++] = strdup(argv0);
3105 }
3106 for (; i < target_argc; i++) {
3107 target_argv[i] = strdup(argv[optind + i]);
3108 }
3109 target_argv[target_argc] = NULL;
3110
3111 ts = qemu_mallocz (sizeof(TaskState));
3112 init_task_state(ts);
3113 /* build Task State */
3114 ts->info = info;
3115 ts->bprm = &bprm;
3116 env->opaque = ts;
3117 task_settid(ts);
3118
3119 ret = loader_exec(filename, target_argv, target_environ, regs,
3120 info, &bprm);
3121 if (ret != 0) {
3122 printf("Error %d while loading %s\n", ret, filename);
3123 _exit(1);
3124 }
3125
3126 for (i = 0; i < target_argc; i++) {
3127 free(target_argv[i]);
3128 }
3129 free(target_argv);
3130
3131 for (wrk = target_environ; *wrk; wrk++) {
3132 free(*wrk);
3133 }
3134
3135 free(target_environ);
3136
3137 if (qemu_log_enabled()) {
3138 #if defined(CONFIG_USE_GUEST_BASE)
3139 qemu_log("guest_base 0x%lx\n", guest_base);
3140 #endif
3141 log_page_dump();
3142
3143 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
3144 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
3145 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
3146 info->start_code);
3147 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
3148 info->start_data);
3149 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
3150 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
3151 info->start_stack);
3152 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
3153 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
3154 }
3155
3156 target_set_brk(info->brk);
3157 syscall_init();
3158 signal_init();
3159
3160 #if defined(CONFIG_USE_GUEST_BASE)
3161 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3162 generating the prologue until now so that the prologue can take
3163 the real value of GUEST_BASE into account. */
3164 tcg_prologue_init(&tcg_ctx);
3165 #endif
3166
3167 #if defined(TARGET_I386)
3168 cpu_x86_set_cpl(env, 3);
3169
3170 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
3171 env->hflags |= HF_PE_MASK;
3172 if (env->cpuid_features & CPUID_SSE) {
3173 env->cr[4] |= CR4_OSFXSR_MASK;
3174 env->hflags |= HF_OSFXSR_MASK;
3175 }
3176 #ifndef TARGET_ABI32
3177 /* enable 64 bit mode if possible */
3178 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
3179 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
3180 exit(1);
3181 }
3182 env->cr[4] |= CR4_PAE_MASK;
3183 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
3184 env->hflags |= HF_LMA_MASK;
3185 #endif
3186
3187 /* flags setup : we activate the IRQs by default as in user mode */
3188 env->eflags |= IF_MASK;
3189
3190 /* linux register setup */
3191 #ifndef TARGET_ABI32
3192 env->regs[R_EAX] = regs->rax;
3193 env->regs[R_EBX] = regs->rbx;
3194 env->regs[R_ECX] = regs->rcx;
3195 env->regs[R_EDX] = regs->rdx;
3196 env->regs[R_ESI] = regs->rsi;
3197 env->regs[R_EDI] = regs->rdi;
3198 env->regs[R_EBP] = regs->rbp;
3199 env->regs[R_ESP] = regs->rsp;
3200 env->eip = regs->rip;
3201 #else
3202 env->regs[R_EAX] = regs->eax;
3203 env->regs[R_EBX] = regs->ebx;
3204 env->regs[R_ECX] = regs->ecx;
3205 env->regs[R_EDX] = regs->edx;
3206 env->regs[R_ESI] = regs->esi;
3207 env->regs[R_EDI] = regs->edi;
3208 env->regs[R_EBP] = regs->ebp;
3209 env->regs[R_ESP] = regs->esp;
3210 env->eip = regs->eip;
3211 #endif
3212
3213 /* linux interrupt setup */
3214 #ifndef TARGET_ABI32
3215 env->idt.limit = 511;
3216 #else
3217 env->idt.limit