scsi: pvscsi: check command descriptor ring buffer size (CVE-2016-4952)
[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/memory.h"
21 #include "exec/address-spaces.h"
22 #include "exec/ioport.h"
23 #include "qapi/visitor.h"
24 #include "qemu/bitops.h"
25 #include "qemu/error-report.h"
26 #include "qom/object.h"
27 #include "trace.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/sysemu.h"
33
34 //#define DEBUG_UNASSIGNED
35
36 #define RAM_ADDR_INVALID (~(ram_addr_t)0)
37
38 static unsigned memory_region_transaction_depth;
39 static bool memory_region_update_pending;
40 static bool ioeventfd_update_pending;
41 static bool global_dirty_log = false;
42
43 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
44 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
45
46 static QTAILQ_HEAD(, AddressSpace) address_spaces
47 = QTAILQ_HEAD_INITIALIZER(address_spaces);
48
49 typedef struct AddrRange AddrRange;
50
51 /*
52 * Note that signed integers are needed for negative offsetting in aliases
53 * (large MemoryRegion::alias_offset).
54 */
55 struct AddrRange {
56 Int128 start;
57 Int128 size;
58 };
59
60 static AddrRange addrrange_make(Int128 start, Int128 size)
61 {
62 return (AddrRange) { start, size };
63 }
64
65 static bool addrrange_equal(AddrRange r1, AddrRange r2)
66 {
67 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
68 }
69
70 static Int128 addrrange_end(AddrRange r)
71 {
72 return int128_add(r.start, r.size);
73 }
74
75 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
76 {
77 int128_addto(&range.start, delta);
78 return range;
79 }
80
81 static bool addrrange_contains(AddrRange range, Int128 addr)
82 {
83 return int128_ge(addr, range.start)
84 && int128_lt(addr, addrrange_end(range));
85 }
86
87 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
88 {
89 return addrrange_contains(r1, r2.start)
90 || addrrange_contains(r2, r1.start);
91 }
92
93 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
94 {
95 Int128 start = int128_max(r1.start, r2.start);
96 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
97 return addrrange_make(start, int128_sub(end, start));
98 }
99
100 enum ListenerDirection { Forward, Reverse };
101
102 static bool memory_listener_match(MemoryListener *listener,
103 MemoryRegionSection *section)
104 {
105 return !listener->address_space_filter
106 || listener->address_space_filter == section->address_space;
107 }
108
109 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
110 do { \
111 MemoryListener *_listener; \
112 \
113 switch (_direction) { \
114 case Forward: \
115 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
116 if (_listener->_callback) { \
117 _listener->_callback(_listener, ##_args); \
118 } \
119 } \
120 break; \
121 case Reverse: \
122 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
123 memory_listeners, link) { \
124 if (_listener->_callback) { \
125 _listener->_callback(_listener, ##_args); \
126 } \
127 } \
128 break; \
129 default: \
130 abort(); \
131 } \
132 } while (0)
133
134 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
135 do { \
136 MemoryListener *_listener; \
137 \
138 switch (_direction) { \
139 case Forward: \
140 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
141 if (_listener->_callback \
142 && memory_listener_match(_listener, _section)) { \
143 _listener->_callback(_listener, _section, ##_args); \
144 } \
145 } \
146 break; \
147 case Reverse: \
148 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
149 memory_listeners, link) { \
150 if (_listener->_callback \
151 && memory_listener_match(_listener, _section)) { \
152 _listener->_callback(_listener, _section, ##_args); \
153 } \
154 } \
155 break; \
156 default: \
157 abort(); \
158 } \
159 } while (0)
160
161 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
162 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
163 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
164 .mr = (fr)->mr, \
165 .address_space = (as), \
166 .offset_within_region = (fr)->offset_in_region, \
167 .size = (fr)->addr.size, \
168 .offset_within_address_space = int128_get64((fr)->addr.start), \
169 .readonly = (fr)->readonly, \
170 }), ##_args)
171
172 struct CoalescedMemoryRange {
173 AddrRange addr;
174 QTAILQ_ENTRY(CoalescedMemoryRange) link;
175 };
176
177 struct MemoryRegionIoeventfd {
178 AddrRange addr;
179 bool match_data;
180 uint64_t data;
181 EventNotifier *e;
182 };
183
184 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
185 MemoryRegionIoeventfd b)
186 {
187 if (int128_lt(a.addr.start, b.addr.start)) {
188 return true;
189 } else if (int128_gt(a.addr.start, b.addr.start)) {
190 return false;
191 } else if (int128_lt(a.addr.size, b.addr.size)) {
192 return true;
193 } else if (int128_gt(a.addr.size, b.addr.size)) {
194 return false;
195 } else if (a.match_data < b.match_data) {
196 return true;
197 } else if (a.match_data > b.match_data) {
198 return false;
199 } else if (a.match_data) {
200 if (a.data < b.data) {
201 return true;
202 } else if (a.data > b.data) {
203 return false;
204 }
205 }
206 if (a.e < b.e) {
207 return true;
208 } else if (a.e > b.e) {
209 return false;
210 }
211 return false;
212 }
213
214 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
215 MemoryRegionIoeventfd b)
216 {
217 return !memory_region_ioeventfd_before(a, b)
218 && !memory_region_ioeventfd_before(b, a);
219 }
220
221 typedef struct FlatRange FlatRange;
222 typedef struct FlatView FlatView;
223
224 /* Range of memory in the global map. Addresses are absolute. */
225 struct FlatRange {
226 MemoryRegion *mr;
227 hwaddr offset_in_region;
228 AddrRange addr;
229 uint8_t dirty_log_mask;
230 bool romd_mode;
231 bool readonly;
232 };
233
234 /* Flattened global view of current active memory hierarchy. Kept in sorted
235 * order.
236 */
237 struct FlatView {
238 struct rcu_head rcu;
239 unsigned ref;
240 FlatRange *ranges;
241 unsigned nr;
242 unsigned nr_allocated;
243 };
244
245 typedef struct AddressSpaceOps AddressSpaceOps;
246
247 #define FOR_EACH_FLAT_RANGE(var, view) \
248 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
249
250 static bool flatrange_equal(FlatRange *a, FlatRange *b)
251 {
252 return a->mr == b->mr
253 && addrrange_equal(a->addr, b->addr)
254 && a->offset_in_region == b->offset_in_region
255 && a->romd_mode == b->romd_mode
256 && a->readonly == b->readonly;
257 }
258
259 static void flatview_init(FlatView *view)
260 {
261 view->ref = 1;
262 view->ranges = NULL;
263 view->nr = 0;
264 view->nr_allocated = 0;
265 }
266
267 /* Insert a range into a given position. Caller is responsible for maintaining
268 * sorting order.
269 */
270 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
271 {
272 if (view->nr == view->nr_allocated) {
273 view->nr_allocated = MAX(2 * view->nr, 10);
274 view->ranges = g_realloc(view->ranges,
275 view->nr_allocated * sizeof(*view->ranges));
276 }
277 memmove(view->ranges + pos + 1, view->ranges + pos,
278 (view->nr - pos) * sizeof(FlatRange));
279 view->ranges[pos] = *range;
280 memory_region_ref(range->mr);
281 ++view->nr;
282 }
283
284 static void flatview_destroy(FlatView *view)
285 {
286 int i;
287
288 for (i = 0; i < view->nr; i++) {
289 memory_region_unref(view->ranges[i].mr);
290 }
291 g_free(view->ranges);
292 g_free(view);
293 }
294
295 static void flatview_ref(FlatView *view)
296 {
297 atomic_inc(&view->ref);
298 }
299
300 static void flatview_unref(FlatView *view)
301 {
302 if (atomic_fetch_dec(&view->ref) == 1) {
303 flatview_destroy(view);
304 }
305 }
306
307 static bool can_merge(FlatRange *r1, FlatRange *r2)
308 {
309 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
310 && r1->mr == r2->mr
311 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
312 r1->addr.size),
313 int128_make64(r2->offset_in_region))
314 && r1->dirty_log_mask == r2->dirty_log_mask
315 && r1->romd_mode == r2->romd_mode
316 && r1->readonly == r2->readonly;
317 }
318
319 /* Attempt to simplify a view by merging adjacent ranges */
320 static void flatview_simplify(FlatView *view)
321 {
322 unsigned i, j;
323
324 i = 0;
325 while (i < view->nr) {
326 j = i + 1;
327 while (j < view->nr
328 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
329 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
330 ++j;
331 }
332 ++i;
333 memmove(&view->ranges[i], &view->ranges[j],
334 (view->nr - j) * sizeof(view->ranges[j]));
335 view->nr -= j - i;
336 }
337 }
338
339 static bool memory_region_big_endian(MemoryRegion *mr)
340 {
341 #ifdef TARGET_WORDS_BIGENDIAN
342 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
343 #else
344 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
345 #endif
346 }
347
348 static bool memory_region_wrong_endianness(MemoryRegion *mr)
349 {
350 #ifdef TARGET_WORDS_BIGENDIAN
351 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
352 #else
353 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
354 #endif
355 }
356
357 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
358 {
359 if (memory_region_wrong_endianness(mr)) {
360 switch (size) {
361 case 1:
362 break;
363 case 2:
364 *data = bswap16(*data);
365 break;
366 case 4:
367 *data = bswap32(*data);
368 break;
369 case 8:
370 *data = bswap64(*data);
371 break;
372 default:
373 abort();
374 }
375 }
376 }
377
378 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
379 {
380 MemoryRegion *root;
381 hwaddr abs_addr = offset;
382
383 abs_addr += mr->addr;
384 for (root = mr; root->container; ) {
385 root = root->container;
386 abs_addr += root->addr;
387 }
388
389 return abs_addr;
390 }
391
392 static int get_cpu_index(void)
393 {
394 if (current_cpu) {
395 return current_cpu->cpu_index;
396 }
397 return -1;
398 }
399
400 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
401 hwaddr addr,
402 uint64_t *value,
403 unsigned size,
404 unsigned shift,
405 uint64_t mask,
406 MemTxAttrs attrs)
407 {
408 uint64_t tmp;
409
410 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
411 if (mr->subpage) {
412 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
413 } else if (mr == &io_mem_notdirty) {
414 /* Accesses to code which has previously been translated into a TB show
415 * up in the MMIO path, as accesses to the io_mem_notdirty
416 * MemoryRegion. */
417 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
418 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
419 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
420 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
421 }
422 *value |= (tmp & mask) << shift;
423 return MEMTX_OK;
424 }
425
426 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
427 hwaddr addr,
428 uint64_t *value,
429 unsigned size,
430 unsigned shift,
431 uint64_t mask,
432 MemTxAttrs attrs)
433 {
434 uint64_t tmp;
435
436 tmp = mr->ops->read(mr->opaque, addr, size);
437 if (mr->subpage) {
438 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
439 } else if (mr == &io_mem_notdirty) {
440 /* Accesses to code which has previously been translated into a TB show
441 * up in the MMIO path, as accesses to the io_mem_notdirty
442 * MemoryRegion. */
443 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
444 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
445 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
446 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
447 }
448 *value |= (tmp & mask) << shift;
449 return MEMTX_OK;
450 }
451
452 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
453 hwaddr addr,
454 uint64_t *value,
455 unsigned size,
456 unsigned shift,
457 uint64_t mask,
458 MemTxAttrs attrs)
459 {
460 uint64_t tmp = 0;
461 MemTxResult r;
462
463 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
464 if (mr->subpage) {
465 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
466 } else if (mr == &io_mem_notdirty) {
467 /* Accesses to code which has previously been translated into a TB show
468 * up in the MMIO path, as accesses to the io_mem_notdirty
469 * MemoryRegion. */
470 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
471 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
472 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
473 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
474 }
475 *value |= (tmp & mask) << shift;
476 return r;
477 }
478
479 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
480 hwaddr addr,
481 uint64_t *value,
482 unsigned size,
483 unsigned shift,
484 uint64_t mask,
485 MemTxAttrs attrs)
486 {
487 uint64_t tmp;
488
489 tmp = (*value >> shift) & mask;
490 if (mr->subpage) {
491 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
492 } else if (mr == &io_mem_notdirty) {
493 /* Accesses to code which has previously been translated into a TB show
494 * up in the MMIO path, as accesses to the io_mem_notdirty
495 * MemoryRegion. */
496 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
497 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
498 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
499 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
500 }
501 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
502 return MEMTX_OK;
503 }
504
505 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
506 hwaddr addr,
507 uint64_t *value,
508 unsigned size,
509 unsigned shift,
510 uint64_t mask,
511 MemTxAttrs attrs)
512 {
513 uint64_t tmp;
514
515 tmp = (*value >> shift) & mask;
516 if (mr->subpage) {
517 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
518 } else if (mr == &io_mem_notdirty) {
519 /* Accesses to code which has previously been translated into a TB show
520 * up in the MMIO path, as accesses to the io_mem_notdirty
521 * MemoryRegion. */
522 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
523 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
524 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
525 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
526 }
527 mr->ops->write(mr->opaque, addr, tmp, size);
528 return MEMTX_OK;
529 }
530
531 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
532 hwaddr addr,
533 uint64_t *value,
534 unsigned size,
535 unsigned shift,
536 uint64_t mask,
537 MemTxAttrs attrs)
538 {
539 uint64_t tmp;
540
541 tmp = (*value >> shift) & mask;
542 if (mr->subpage) {
543 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
544 } else if (mr == &io_mem_notdirty) {
545 /* Accesses to code which has previously been translated into a TB show
546 * up in the MMIO path, as accesses to the io_mem_notdirty
547 * MemoryRegion. */
548 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
549 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
550 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
551 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
552 }
553 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
554 }
555
556 static MemTxResult access_with_adjusted_size(hwaddr addr,
557 uint64_t *value,
558 unsigned size,
559 unsigned access_size_min,
560 unsigned access_size_max,
561 MemTxResult (*access)(MemoryRegion *mr,
562 hwaddr addr,
563 uint64_t *value,
564 unsigned size,
565 unsigned shift,
566 uint64_t mask,
567 MemTxAttrs attrs),
568 MemoryRegion *mr,
569 MemTxAttrs attrs)
570 {
571 uint64_t access_mask;
572 unsigned access_size;
573 unsigned i;
574 MemTxResult r = MEMTX_OK;
575
576 if (!access_size_min) {
577 access_size_min = 1;
578 }
579 if (!access_size_max) {
580 access_size_max = 4;
581 }
582
583 /* FIXME: support unaligned access? */
584 access_size = MAX(MIN(size, access_size_max), access_size_min);
585 access_mask = -1ULL >> (64 - access_size * 8);
586 if (memory_region_big_endian(mr)) {
587 for (i = 0; i < size; i += access_size) {
588 r |= access(mr, addr + i, value, access_size,
589 (size - access_size - i) * 8, access_mask, attrs);
590 }
591 } else {
592 for (i = 0; i < size; i += access_size) {
593 r |= access(mr, addr + i, value, access_size, i * 8,
594 access_mask, attrs);
595 }
596 }
597 return r;
598 }
599
600 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
601 {
602 AddressSpace *as;
603
604 while (mr->container) {
605 mr = mr->container;
606 }
607 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
608 if (mr == as->root) {
609 return as;
610 }
611 }
612 return NULL;
613 }
614
615 /* Render a memory region into the global view. Ranges in @view obscure
616 * ranges in @mr.
617 */
618 static void render_memory_region(FlatView *view,
619 MemoryRegion *mr,
620 Int128 base,
621 AddrRange clip,
622 bool readonly)
623 {
624 MemoryRegion *subregion;
625 unsigned i;
626 hwaddr offset_in_region;
627 Int128 remain;
628 Int128 now;
629 FlatRange fr;
630 AddrRange tmp;
631
632 if (!mr->enabled) {
633 return;
634 }
635
636 int128_addto(&base, int128_make64(mr->addr));
637 readonly |= mr->readonly;
638
639 tmp = addrrange_make(base, mr->size);
640
641 if (!addrrange_intersects(tmp, clip)) {
642 return;
643 }
644
645 clip = addrrange_intersection(tmp, clip);
646
647 if (mr->alias) {
648 int128_subfrom(&base, int128_make64(mr->alias->addr));
649 int128_subfrom(&base, int128_make64(mr->alias_offset));
650 render_memory_region(view, mr->alias, base, clip, readonly);
651 return;
652 }
653
654 /* Render subregions in priority order. */
655 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
656 render_memory_region(view, subregion, base, clip, readonly);
657 }
658
659 if (!mr->terminates) {
660 return;
661 }
662
663 offset_in_region = int128_get64(int128_sub(clip.start, base));
664 base = clip.start;
665 remain = clip.size;
666
667 fr.mr = mr;
668 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
669 fr.romd_mode = mr->romd_mode;
670 fr.readonly = readonly;
671
672 /* Render the region itself into any gaps left by the current view. */
673 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
674 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
675 continue;
676 }
677 if (int128_lt(base, view->ranges[i].addr.start)) {
678 now = int128_min(remain,
679 int128_sub(view->ranges[i].addr.start, base));
680 fr.offset_in_region = offset_in_region;
681 fr.addr = addrrange_make(base, now);
682 flatview_insert(view, i, &fr);
683 ++i;
684 int128_addto(&base, now);
685 offset_in_region += int128_get64(now);
686 int128_subfrom(&remain, now);
687 }
688 now = int128_sub(int128_min(int128_add(base, remain),
689 addrrange_end(view->ranges[i].addr)),
690 base);
691 int128_addto(&base, now);
692 offset_in_region += int128_get64(now);
693 int128_subfrom(&remain, now);
694 }
695 if (int128_nz(remain)) {
696 fr.offset_in_region = offset_in_region;
697 fr.addr = addrrange_make(base, remain);
698 flatview_insert(view, i, &fr);
699 }
700 }
701
702 /* Render a memory topology into a list of disjoint absolute ranges. */
703 static FlatView *generate_memory_topology(MemoryRegion *mr)
704 {
705 FlatView *view;
706
707 view = g_new(FlatView, 1);
708 flatview_init(view);
709
710 if (mr) {
711 render_memory_region(view, mr, int128_zero(),
712 addrrange_make(int128_zero(), int128_2_64()), false);
713 }
714 flatview_simplify(view);
715
716 return view;
717 }
718
719 static void address_space_add_del_ioeventfds(AddressSpace *as,
720 MemoryRegionIoeventfd *fds_new,
721 unsigned fds_new_nb,
722 MemoryRegionIoeventfd *fds_old,
723 unsigned fds_old_nb)
724 {
725 unsigned iold, inew;
726 MemoryRegionIoeventfd *fd;
727 MemoryRegionSection section;
728
729 /* Generate a symmetric difference of the old and new fd sets, adding
730 * and deleting as necessary.
731 */
732
733 iold = inew = 0;
734 while (iold < fds_old_nb || inew < fds_new_nb) {
735 if (iold < fds_old_nb
736 && (inew == fds_new_nb
737 || memory_region_ioeventfd_before(fds_old[iold],
738 fds_new[inew]))) {
739 fd = &fds_old[iold];
740 section = (MemoryRegionSection) {
741 .address_space = as,
742 .offset_within_address_space = int128_get64(fd->addr.start),
743 .size = fd->addr.size,
744 };
745 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
746 fd->match_data, fd->data, fd->e);
747 ++iold;
748 } else if (inew < fds_new_nb
749 && (iold == fds_old_nb
750 || memory_region_ioeventfd_before(fds_new[inew],
751 fds_old[iold]))) {
752 fd = &fds_new[inew];
753 section = (MemoryRegionSection) {
754 .address_space = as,
755 .offset_within_address_space = int128_get64(fd->addr.start),
756 .size = fd->addr.size,
757 };
758 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
759 fd->match_data, fd->data, fd->e);
760 ++inew;
761 } else {
762 ++iold;
763 ++inew;
764 }
765 }
766 }
767
768 static FlatView *address_space_get_flatview(AddressSpace *as)
769 {
770 FlatView *view;
771
772 rcu_read_lock();
773 view = atomic_rcu_read(&as->current_map);
774 flatview_ref(view);
775 rcu_read_unlock();
776 return view;
777 }
778
779 static void address_space_update_ioeventfds(AddressSpace *as)
780 {
781 FlatView *view;
782 FlatRange *fr;
783 unsigned ioeventfd_nb = 0;
784 MemoryRegionIoeventfd *ioeventfds = NULL;
785 AddrRange tmp;
786 unsigned i;
787
788 view = address_space_get_flatview(as);
789 FOR_EACH_FLAT_RANGE(fr, view) {
790 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
791 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
792 int128_sub(fr->addr.start,
793 int128_make64(fr->offset_in_region)));
794 if (addrrange_intersects(fr->addr, tmp)) {
795 ++ioeventfd_nb;
796 ioeventfds = g_realloc(ioeventfds,
797 ioeventfd_nb * sizeof(*ioeventfds));
798 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
799 ioeventfds[ioeventfd_nb-1].addr = tmp;
800 }
801 }
802 }
803
804 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
805 as->ioeventfds, as->ioeventfd_nb);
806
807 g_free(as->ioeventfds);
808 as->ioeventfds = ioeventfds;
809 as->ioeventfd_nb = ioeventfd_nb;
810 flatview_unref(view);
811 }
812
813 static void address_space_update_topology_pass(AddressSpace *as,
814 const FlatView *old_view,
815 const FlatView *new_view,
816 bool adding)
817 {
818 unsigned iold, inew;
819 FlatRange *frold, *frnew;
820
821 /* Generate a symmetric difference of the old and new memory maps.
822 * Kill ranges in the old map, and instantiate ranges in the new map.
823 */
824 iold = inew = 0;
825 while (iold < old_view->nr || inew < new_view->nr) {
826 if (iold < old_view->nr) {
827 frold = &old_view->ranges[iold];
828 } else {
829 frold = NULL;
830 }
831 if (inew < new_view->nr) {
832 frnew = &new_view->ranges[inew];
833 } else {
834 frnew = NULL;
835 }
836
837 if (frold
838 && (!frnew
839 || int128_lt(frold->addr.start, frnew->addr.start)
840 || (int128_eq(frold->addr.start, frnew->addr.start)
841 && !flatrange_equal(frold, frnew)))) {
842 /* In old but not in new, or in both but attributes changed. */
843
844 if (!adding) {
845 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
846 }
847
848 ++iold;
849 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
850 /* In both and unchanged (except logging may have changed) */
851
852 if (adding) {
853 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
854 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
855 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
856 frold->dirty_log_mask,
857 frnew->dirty_log_mask);
858 }
859 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
860 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
861 frold->dirty_log_mask,
862 frnew->dirty_log_mask);
863 }
864 }
865
866 ++iold;
867 ++inew;
868 } else {
869 /* In new */
870
871 if (adding) {
872 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
873 }
874
875 ++inew;
876 }
877 }
878 }
879
880
881 static void address_space_update_topology(AddressSpace *as)
882 {
883 FlatView *old_view = address_space_get_flatview(as);
884 FlatView *new_view = generate_memory_topology(as->root);
885
886 address_space_update_topology_pass(as, old_view, new_view, false);
887 address_space_update_topology_pass(as, old_view, new_view, true);
888
889 /* Writes are protected by the BQL. */
890 atomic_rcu_set(&as->current_map, new_view);
891 call_rcu(old_view, flatview_unref, rcu);
892
893 /* Note that all the old MemoryRegions are still alive up to this
894 * point. This relieves most MemoryListeners from the need to
895 * ref/unref the MemoryRegions they get---unless they use them
896 * outside the iothread mutex, in which case precise reference
897 * counting is necessary.
898 */
899 flatview_unref(old_view);
900
901 address_space_update_ioeventfds(as);
902 }
903
904 void memory_region_transaction_begin(void)
905 {
906 qemu_flush_coalesced_mmio_buffer();
907 ++memory_region_transaction_depth;
908 }
909
910 static void memory_region_clear_pending(void)
911 {
912 memory_region_update_pending = false;
913 ioeventfd_update_pending = false;
914 }
915
916 void memory_region_transaction_commit(void)
917 {
918 AddressSpace *as;
919
920 assert(memory_region_transaction_depth);
921 --memory_region_transaction_depth;
922 if (!memory_region_transaction_depth) {
923 if (memory_region_update_pending) {
924 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
925
926 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
927 address_space_update_topology(as);
928 }
929
930 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
931 } else if (ioeventfd_update_pending) {
932 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
933 address_space_update_ioeventfds(as);
934 }
935 }
936 memory_region_clear_pending();
937 }
938 }
939
940 static void memory_region_destructor_none(MemoryRegion *mr)
941 {
942 }
943
944 static void memory_region_destructor_ram(MemoryRegion *mr)
945 {
946 qemu_ram_free(mr->ram_block);
947 }
948
949 static void memory_region_destructor_rom_device(MemoryRegion *mr)
950 {
951 qemu_ram_free(mr->ram_block);
952 }
953
954 static bool memory_region_need_escape(char c)
955 {
956 return c == '/' || c == '[' || c == '\\' || c == ']';
957 }
958
959 static char *memory_region_escape_name(const char *name)
960 {
961 const char *p;
962 char *escaped, *q;
963 uint8_t c;
964 size_t bytes = 0;
965
966 for (p = name; *p; p++) {
967 bytes += memory_region_need_escape(*p) ? 4 : 1;
968 }
969 if (bytes == p - name) {
970 return g_memdup(name, bytes + 1);
971 }
972
973 escaped = g_malloc(bytes + 1);
974 for (p = name, q = escaped; *p; p++) {
975 c = *p;
976 if (unlikely(memory_region_need_escape(c))) {
977 *q++ = '\\';
978 *q++ = 'x';
979 *q++ = "0123456789abcdef"[c >> 4];
980 c = "0123456789abcdef"[c & 15];
981 }
982 *q++ = c;
983 }
984 *q = 0;
985 return escaped;
986 }
987
988 void memory_region_init(MemoryRegion *mr,
989 Object *owner,
990 const char *name,
991 uint64_t size)
992 {
993 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
994 mr->size = int128_make64(size);
995 if (size == UINT64_MAX) {
996 mr->size = int128_2_64();
997 }
998 mr->name = g_strdup(name);
999 mr->owner = owner;
1000 mr->ram_block = NULL;
1001
1002 if (name) {
1003 char *escaped_name = memory_region_escape_name(name);
1004 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1005
1006 if (!owner) {
1007 owner = container_get(qdev_get_machine(), "/unattached");
1008 }
1009
1010 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1011 object_unref(OBJECT(mr));
1012 g_free(name_array);
1013 g_free(escaped_name);
1014 }
1015 }
1016
1017 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1018 void *opaque, Error **errp)
1019 {
1020 MemoryRegion *mr = MEMORY_REGION(obj);
1021 uint64_t value = mr->addr;
1022
1023 visit_type_uint64(v, name, &value, errp);
1024 }
1025
1026 static void memory_region_get_container(Object *obj, Visitor *v,
1027 const char *name, void *opaque,
1028 Error **errp)
1029 {
1030 MemoryRegion *mr = MEMORY_REGION(obj);
1031 gchar *path = (gchar *)"";
1032
1033 if (mr->container) {
1034 path = object_get_canonical_path(OBJECT(mr->container));
1035 }
1036 visit_type_str(v, name, &path, errp);
1037 if (mr->container) {
1038 g_free(path);
1039 }
1040 }
1041
1042 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1043 const char *part)
1044 {
1045 MemoryRegion *mr = MEMORY_REGION(obj);
1046
1047 return OBJECT(mr->container);
1048 }
1049
1050 static void memory_region_get_priority(Object *obj, Visitor *v,
1051 const char *name, void *opaque,
1052 Error **errp)
1053 {
1054 MemoryRegion *mr = MEMORY_REGION(obj);
1055 int32_t value = mr->priority;
1056
1057 visit_type_int32(v, name, &value, errp);
1058 }
1059
1060 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1061 void *opaque, Error **errp)
1062 {
1063 MemoryRegion *mr = MEMORY_REGION(obj);
1064 uint64_t value = memory_region_size(mr);
1065
1066 visit_type_uint64(v, name, &value, errp);
1067 }
1068
1069 static void memory_region_initfn(Object *obj)
1070 {
1071 MemoryRegion *mr = MEMORY_REGION(obj);
1072 ObjectProperty *op;
1073
1074 mr->ops = &unassigned_mem_ops;
1075 mr->enabled = true;
1076 mr->romd_mode = true;
1077 mr->global_locking = true;
1078 mr->destructor = memory_region_destructor_none;
1079 QTAILQ_INIT(&mr->subregions);
1080 QTAILQ_INIT(&mr->coalesced);
1081
1082 op = object_property_add(OBJECT(mr), "container",
1083 "link<" TYPE_MEMORY_REGION ">",
1084 memory_region_get_container,
1085 NULL, /* memory_region_set_container */
1086 NULL, NULL, &error_abort);
1087 op->resolve = memory_region_resolve_container;
1088
1089 object_property_add(OBJECT(mr), "addr", "uint64",
1090 memory_region_get_addr,
1091 NULL, /* memory_region_set_addr */
1092 NULL, NULL, &error_abort);
1093 object_property_add(OBJECT(mr), "priority", "uint32",
1094 memory_region_get_priority,
1095 NULL, /* memory_region_set_priority */
1096 NULL, NULL, &error_abort);
1097 object_property_add(OBJECT(mr), "size", "uint64",
1098 memory_region_get_size,
1099 NULL, /* memory_region_set_size, */
1100 NULL, NULL, &error_abort);
1101 }
1102
1103 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1104 unsigned size)
1105 {
1106 #ifdef DEBUG_UNASSIGNED
1107 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1108 #endif
1109 if (current_cpu != NULL) {
1110 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1111 }
1112 return 0;
1113 }
1114
1115 static void unassigned_mem_write(void *opaque, hwaddr addr,
1116 uint64_t val, unsigned size)
1117 {
1118 #ifdef DEBUG_UNASSIGNED
1119 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1120 #endif
1121 if (current_cpu != NULL) {
1122 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1123 }
1124 }
1125
1126 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1127 unsigned size, bool is_write)
1128 {
1129 return false;
1130 }
1131
1132 const MemoryRegionOps unassigned_mem_ops = {
1133 .valid.accepts = unassigned_mem_accepts,
1134 .endianness = DEVICE_NATIVE_ENDIAN,
1135 };
1136
1137 bool memory_region_access_valid(MemoryRegion *mr,
1138 hwaddr addr,
1139 unsigned size,
1140 bool is_write)
1141 {
1142 int access_size_min, access_size_max;
1143 int access_size, i;
1144
1145 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1146 return false;
1147 }
1148
1149 if (!mr->ops->valid.accepts) {
1150 return true;
1151 }
1152
1153 access_size_min = mr->ops->valid.min_access_size;
1154 if (!mr->ops->valid.min_access_size) {
1155 access_size_min = 1;
1156 }
1157
1158 access_size_max = mr->ops->valid.max_access_size;
1159 if (!mr->ops->valid.max_access_size) {
1160 access_size_max = 4;
1161 }
1162
1163 access_size = MAX(MIN(size, access_size_max), access_size_min);
1164 for (i = 0; i < size; i += access_size) {
1165 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1166 is_write)) {
1167 return false;
1168 }
1169 }
1170
1171 return true;
1172 }
1173
1174 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1175 hwaddr addr,
1176 uint64_t *pval,
1177 unsigned size,
1178 MemTxAttrs attrs)
1179 {
1180 *pval = 0;
1181
1182 if (mr->ops->read) {
1183 return access_with_adjusted_size(addr, pval, size,
1184 mr->ops->impl.min_access_size,
1185 mr->ops->impl.max_access_size,
1186 memory_region_read_accessor,
1187 mr, attrs);
1188 } else if (mr->ops->read_with_attrs) {
1189 return access_with_adjusted_size(addr, pval, size,
1190 mr->ops->impl.min_access_size,
1191 mr->ops->impl.max_access_size,
1192 memory_region_read_with_attrs_accessor,
1193 mr, attrs);
1194 } else {
1195 return access_with_adjusted_size(addr, pval, size, 1, 4,
1196 memory_region_oldmmio_read_accessor,
1197 mr, attrs);
1198 }
1199 }
1200
1201 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1202 hwaddr addr,
1203 uint64_t *pval,
1204 unsigned size,
1205 MemTxAttrs attrs)
1206 {
1207 MemTxResult r;
1208
1209 if (!memory_region_access_valid(mr, addr, size, false)) {
1210 *pval = unassigned_mem_read(mr, addr, size);
1211 return MEMTX_DECODE_ERROR;
1212 }
1213
1214 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1215 adjust_endianness(mr, pval, size);
1216 return r;
1217 }
1218
1219 /* Return true if an eventfd was signalled */
1220 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1221 hwaddr addr,
1222 uint64_t data,
1223 unsigned size,
1224 MemTxAttrs attrs)
1225 {
1226 MemoryRegionIoeventfd ioeventfd = {
1227 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1228 .data = data,
1229 };
1230 unsigned i;
1231
1232 for (i = 0; i < mr->ioeventfd_nb; i++) {
1233 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1234 ioeventfd.e = mr->ioeventfds[i].e;
1235
1236 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1237 event_notifier_set(ioeventfd.e);
1238 return true;
1239 }
1240 }
1241
1242 return false;
1243 }
1244
1245 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1246 hwaddr addr,
1247 uint64_t data,
1248 unsigned size,
1249 MemTxAttrs attrs)
1250 {
1251 if (!memory_region_access_valid(mr, addr, size, true)) {
1252 unassigned_mem_write(mr, addr, data, size);
1253 return MEMTX_DECODE_ERROR;
1254 }
1255
1256 adjust_endianness(mr, &data, size);
1257
1258 if ((!kvm_eventfds_enabled()) &&
1259 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1260 return MEMTX_OK;
1261 }
1262
1263 if (mr->ops->write) {
1264 return access_with_adjusted_size(addr, &data, size,
1265 mr->ops->impl.min_access_size,
1266 mr->ops->impl.max_access_size,
1267 memory_region_write_accessor, mr,
1268 attrs);
1269 } else if (mr->ops->write_with_attrs) {
1270 return
1271 access_with_adjusted_size(addr, &data, size,
1272 mr->ops->impl.min_access_size,
1273 mr->ops->impl.max_access_size,
1274 memory_region_write_with_attrs_accessor,
1275 mr, attrs);
1276 } else {
1277 return access_with_adjusted_size(addr, &data, size, 1, 4,
1278 memory_region_oldmmio_write_accessor,
1279 mr, attrs);
1280 }
1281 }
1282
1283 void memory_region_init_io(MemoryRegion *mr,
1284 Object *owner,
1285 const MemoryRegionOps *ops,
1286 void *opaque,
1287 const char *name,
1288 uint64_t size)
1289 {
1290 memory_region_init(mr, owner, name, size);
1291 mr->ops = ops ? ops : &unassigned_mem_ops;
1292 mr->opaque = opaque;
1293 mr->terminates = true;
1294 }
1295
1296 void memory_region_init_ram(MemoryRegion *mr,
1297 Object *owner,
1298 const char *name,
1299 uint64_t size,
1300 Error **errp)
1301 {
1302 memory_region_init(mr, owner, name, size);
1303 mr->ram = true;
1304 mr->terminates = true;
1305 mr->destructor = memory_region_destructor_ram;
1306 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1307 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1308 }
1309
1310 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1311 Object *owner,
1312 const char *name,
1313 uint64_t size,
1314 uint64_t max_size,
1315 void (*resized)(const char*,
1316 uint64_t length,
1317 void *host),
1318 Error **errp)
1319 {
1320 memory_region_init(mr, owner, name, size);
1321 mr->ram = true;
1322 mr->terminates = true;
1323 mr->destructor = memory_region_destructor_ram;
1324 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1325 mr, errp);
1326 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1327 }
1328
1329 #ifdef __linux__
1330 void memory_region_init_ram_from_file(MemoryRegion *mr,
1331 struct Object *owner,
1332 const char *name,
1333 uint64_t size,
1334 bool share,
1335 const char *path,
1336 Error **errp)
1337 {
1338 memory_region_init(mr, owner, name, size);
1339 mr->ram = true;
1340 mr->terminates = true;
1341 mr->destructor = memory_region_destructor_ram;
1342 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1343 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1344 }
1345 #endif
1346
1347 void memory_region_init_ram_ptr(MemoryRegion *mr,
1348 Object *owner,
1349 const char *name,
1350 uint64_t size,
1351 void *ptr)
1352 {
1353 memory_region_init(mr, owner, name, size);
1354 mr->ram = true;
1355 mr->terminates = true;
1356 mr->destructor = memory_region_destructor_ram;
1357 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1358
1359 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1360 assert(ptr != NULL);
1361 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1362 }
1363
1364 void memory_region_set_skip_dump(MemoryRegion *mr)
1365 {
1366 mr->skip_dump = true;
1367 }
1368
1369 void memory_region_init_alias(MemoryRegion *mr,
1370 Object *owner,
1371 const char *name,
1372 MemoryRegion *orig,
1373 hwaddr offset,
1374 uint64_t size)
1375 {
1376 memory_region_init(mr, owner, name, size);
1377 mr->alias = orig;
1378 mr->alias_offset = offset;
1379 }
1380
1381 void memory_region_init_rom_device(MemoryRegion *mr,
1382 Object *owner,
1383 const MemoryRegionOps *ops,
1384 void *opaque,
1385 const char *name,
1386 uint64_t size,
1387 Error **errp)
1388 {
1389 memory_region_init(mr, owner, name, size);
1390 mr->ops = ops;
1391 mr->opaque = opaque;
1392 mr->terminates = true;
1393 mr->rom_device = true;
1394 mr->destructor = memory_region_destructor_rom_device;
1395 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1396 }
1397
1398 void memory_region_init_iommu(MemoryRegion *mr,
1399 Object *owner,
1400 const MemoryRegionIOMMUOps *ops,
1401 const char *name,
1402 uint64_t size)
1403 {
1404 memory_region_init(mr, owner, name, size);
1405 mr->iommu_ops = ops,
1406 mr->terminates = true; /* then re-forwards */
1407 notifier_list_init(&mr->iommu_notify);
1408 }
1409
1410 static void memory_region_finalize(Object *obj)
1411 {
1412 MemoryRegion *mr = MEMORY_REGION(obj);
1413
1414 assert(!mr->container);
1415
1416 /* We know the region is not visible in any address space (it
1417 * does not have a container and cannot be a root either because
1418 * it has no references, so we can blindly clear mr->enabled.
1419 * memory_region_set_enabled instead could trigger a transaction
1420 * and cause an infinite loop.
1421 */
1422 mr->enabled = false;
1423 memory_region_transaction_begin();
1424 while (!QTAILQ_EMPTY(&mr->subregions)) {
1425 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1426 memory_region_del_subregion(mr, subregion);
1427 }
1428 memory_region_transaction_commit();
1429
1430 mr->destructor(mr);
1431 memory_region_clear_coalescing(mr);
1432 g_free((char *)mr->name);
1433 g_free(mr->ioeventfds);
1434 }
1435
1436 Object *memory_region_owner(MemoryRegion *mr)
1437 {
1438 Object *obj = OBJECT(mr);
1439 return obj->parent;
1440 }
1441
1442 void memory_region_ref(MemoryRegion *mr)
1443 {
1444 /* MMIO callbacks most likely will access data that belongs
1445 * to the owner, hence the need to ref/unref the owner whenever
1446 * the memory region is in use.
1447 *
1448 * The memory region is a child of its owner. As long as the
1449 * owner doesn't call unparent itself on the memory region,
1450 * ref-ing the owner will also keep the memory region alive.
1451 * Memory regions without an owner are supposed to never go away;
1452 * we do not ref/unref them because it slows down DMA sensibly.
1453 */
1454 if (mr && mr->owner) {
1455 object_ref(mr->owner);
1456 }
1457 }
1458
1459 void memory_region_unref(MemoryRegion *mr)
1460 {
1461 if (mr && mr->owner) {
1462 object_unref(mr->owner);
1463 }
1464 }
1465
1466 uint64_t memory_region_size(MemoryRegion *mr)
1467 {
1468 if (int128_eq(mr->size, int128_2_64())) {
1469 return UINT64_MAX;
1470 }
1471 return int128_get64(mr->size);
1472 }
1473
1474 const char *memory_region_name(const MemoryRegion *mr)
1475 {
1476 if (!mr->name) {
1477 ((MemoryRegion *)mr)->name =
1478 object_get_canonical_path_component(OBJECT(mr));
1479 }
1480 return mr->name;
1481 }
1482
1483 bool memory_region_is_skip_dump(MemoryRegion *mr)
1484 {
1485 return mr->skip_dump;
1486 }
1487
1488 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1489 {
1490 uint8_t mask = mr->dirty_log_mask;
1491 if (global_dirty_log) {
1492 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1493 }
1494 return mask;
1495 }
1496
1497 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1498 {
1499 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1500 }
1501
1502 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1503 {
1504 notifier_list_add(&mr->iommu_notify, n);
1505 }
1506
1507 void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n,
1508 hwaddr granularity, bool is_write)
1509 {
1510 hwaddr addr;
1511 IOMMUTLBEntry iotlb;
1512
1513 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1514 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1515 if (iotlb.perm != IOMMU_NONE) {
1516 n->notify(n, &iotlb);
1517 }
1518
1519 /* if (2^64 - MR size) < granularity, it's possible to get an
1520 * infinite loop here. This should catch such a wraparound */
1521 if ((addr + granularity) < addr) {
1522 break;
1523 }
1524 }
1525 }
1526
1527 void memory_region_unregister_iommu_notifier(Notifier *n)
1528 {
1529 notifier_remove(n);
1530 }
1531
1532 void memory_region_notify_iommu(MemoryRegion *mr,
1533 IOMMUTLBEntry entry)
1534 {
1535 assert(memory_region_is_iommu(mr));
1536 notifier_list_notify(&mr->iommu_notify, &entry);
1537 }
1538
1539 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1540 {
1541 uint8_t mask = 1 << client;
1542 uint8_t old_logging;
1543
1544 assert(client == DIRTY_MEMORY_VGA);
1545 old_logging = mr->vga_logging_count;
1546 mr->vga_logging_count += log ? 1 : -1;
1547 if (!!old_logging == !!mr->vga_logging_count) {
1548 return;
1549 }
1550
1551 memory_region_transaction_begin();
1552 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1553 memory_region_update_pending |= mr->enabled;
1554 memory_region_transaction_commit();
1555 }
1556
1557 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1558 hwaddr size, unsigned client)
1559 {
1560 assert(mr->ram_block);
1561 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1562 size, client);
1563 }
1564
1565 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1566 hwaddr size)
1567 {
1568 assert(mr->ram_block);
1569 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1570 size,
1571 memory_region_get_dirty_log_mask(mr));
1572 }
1573
1574 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1575 hwaddr size, unsigned client)
1576 {
1577 assert(mr->ram_block);
1578 return cpu_physical_memory_test_and_clear_dirty(
1579 memory_region_get_ram_addr(mr) + addr, size, client);
1580 }
1581
1582
1583 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1584 {
1585 AddressSpace *as;
1586 FlatRange *fr;
1587
1588 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1589 FlatView *view = address_space_get_flatview(as);
1590 FOR_EACH_FLAT_RANGE(fr, view) {
1591 if (fr->mr == mr) {
1592 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1593 }
1594 }
1595 flatview_unref(view);
1596 }
1597 }
1598
1599 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1600 {
1601 if (mr->readonly != readonly) {
1602 memory_region_transaction_begin();
1603 mr->readonly = readonly;
1604 memory_region_update_pending |= mr->enabled;
1605 memory_region_transaction_commit();
1606 }
1607 }
1608
1609 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1610 {
1611 if (mr->romd_mode != romd_mode) {
1612 memory_region_transaction_begin();
1613 mr->romd_mode = romd_mode;
1614 memory_region_update_pending |= mr->enabled;
1615 memory_region_transaction_commit();
1616 }
1617 }
1618
1619 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1620 hwaddr size, unsigned client)
1621 {
1622 assert(mr->ram_block);
1623 cpu_physical_memory_test_and_clear_dirty(
1624 memory_region_get_ram_addr(mr) + addr, size, client);
1625 }
1626
1627 int memory_region_get_fd(MemoryRegion *mr)
1628 {
1629 if (mr->alias) {
1630 return memory_region_get_fd(mr->alias);
1631 }
1632
1633 assert(mr->ram_block);
1634
1635 return qemu_get_ram_fd(memory_region_get_ram_addr(mr));
1636 }
1637
1638 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1639 {
1640 void *ptr;
1641 uint64_t offset = 0;
1642
1643 rcu_read_lock();
1644 while (mr->alias) {
1645 offset += mr->alias_offset;
1646 mr = mr->alias;
1647 }
1648 assert(mr->ram_block);
1649 ptr = qemu_get_ram_ptr(mr->ram_block, memory_region_get_ram_addr(mr));
1650 rcu_read_unlock();
1651
1652 return ptr + offset;
1653 }
1654
1655 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1656 {
1657 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1658 }
1659
1660 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1661 {
1662 assert(mr->ram_block);
1663
1664 qemu_ram_resize(mr->ram_block, newsize, errp);
1665 }
1666
1667 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1668 {
1669 FlatView *view;
1670 FlatRange *fr;
1671 CoalescedMemoryRange *cmr;
1672 AddrRange tmp;
1673 MemoryRegionSection section;
1674
1675 view = address_space_get_flatview(as);
1676 FOR_EACH_FLAT_RANGE(fr, view) {
1677 if (fr->mr == mr) {
1678 section = (MemoryRegionSection) {
1679 .address_space = as,
1680 .offset_within_address_space = int128_get64(fr->addr.start),
1681 .size = fr->addr.size,
1682 };
1683
1684 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1685 int128_get64(fr->addr.start),
1686 int128_get64(fr->addr.size));
1687 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1688 tmp = addrrange_shift(cmr->addr,
1689 int128_sub(fr->addr.start,
1690 int128_make64(fr->offset_in_region)));
1691 if (!addrrange_intersects(tmp, fr->addr)) {
1692 continue;
1693 }
1694 tmp = addrrange_intersection(tmp, fr->addr);
1695 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1696 int128_get64(tmp.start),
1697 int128_get64(tmp.size));
1698 }
1699 }
1700 }
1701 flatview_unref(view);
1702 }
1703
1704 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1705 {
1706 AddressSpace *as;
1707
1708 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1709 memory_region_update_coalesced_range_as(mr, as);
1710 }
1711 }
1712
1713 void memory_region_set_coalescing(MemoryRegion *mr)
1714 {
1715 memory_region_clear_coalescing(mr);
1716 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1717 }
1718
1719 void memory_region_add_coalescing(MemoryRegion *mr,
1720 hwaddr offset,
1721 uint64_t size)
1722 {
1723 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1724
1725 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1726 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1727 memory_region_update_coalesced_range(mr);
1728 memory_region_set_flush_coalesced(mr);
1729 }
1730
1731 void memory_region_clear_coalescing(MemoryRegion *mr)
1732 {
1733 CoalescedMemoryRange *cmr;
1734 bool updated = false;
1735
1736 qemu_flush_coalesced_mmio_buffer();
1737 mr->flush_coalesced_mmio = false;
1738
1739 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1740 cmr = QTAILQ_FIRST(&mr->coalesced);
1741 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1742 g_free(cmr);
1743 updated = true;
1744 }
1745
1746 if (updated) {
1747 memory_region_update_coalesced_range(mr);
1748 }
1749 }
1750
1751 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1752 {
1753 mr->flush_coalesced_mmio = true;
1754 }
1755
1756 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1757 {
1758 qemu_flush_coalesced_mmio_buffer();
1759 if (QTAILQ_EMPTY(&mr->coalesced)) {
1760 mr->flush_coalesced_mmio = false;
1761 }
1762 }
1763
1764 void memory_region_set_global_locking(MemoryRegion *mr)
1765 {
1766 mr->global_locking = true;
1767 }
1768
1769 void memory_region_clear_global_locking(MemoryRegion *mr)
1770 {
1771 mr->global_locking = false;
1772 }
1773
1774 static bool userspace_eventfd_warning;
1775
1776 void memory_region_add_eventfd(MemoryRegion *mr,
1777 hwaddr addr,
1778 unsigned size,
1779 bool match_data,
1780 uint64_t data,
1781 EventNotifier *e)
1782 {
1783 MemoryRegionIoeventfd mrfd = {
1784 .addr.start = int128_make64(addr),
1785 .addr.size = int128_make64(size),
1786 .match_data = match_data,
1787 .data = data,
1788 .e = e,
1789 };
1790 unsigned i;
1791
1792 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1793 userspace_eventfd_warning))) {
1794 userspace_eventfd_warning = true;
1795 error_report("Using eventfd without MMIO binding in KVM. "
1796 "Suboptimal performance expected");
1797 }
1798
1799 if (size) {
1800 adjust_endianness(mr, &mrfd.data, size);
1801 }
1802 memory_region_transaction_begin();
1803 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1804 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1805 break;
1806 }
1807 }
1808 ++mr->ioeventfd_nb;
1809 mr->ioeventfds = g_realloc(mr->ioeventfds,
1810 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1811 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1812 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1813 mr->ioeventfds[i] = mrfd;
1814 ioeventfd_update_pending |= mr->enabled;
1815 memory_region_transaction_commit();
1816 }
1817
1818 void memory_region_del_eventfd(MemoryRegion *mr,
1819 hwaddr addr,
1820 unsigned size,
1821 bool match_data,
1822 uint64_t data,
1823 EventNotifier *e)
1824 {
1825 MemoryRegionIoeventfd mrfd = {
1826 .addr.start = int128_make64(addr),
1827 .addr.size = int128_make64(size),
1828 .match_data = match_data,
1829 .data = data,
1830 .e = e,
1831 };
1832 unsigned i;
1833
1834 if (size) {
1835 adjust_endianness(mr, &mrfd.data, size);
1836 }
1837 memory_region_transaction_begin();
1838 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1839 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1840 break;
1841 }
1842 }
1843 assert(i != mr->ioeventfd_nb);
1844 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1845 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1846 --mr->ioeventfd_nb;
1847 mr->ioeventfds = g_realloc(mr->ioeventfds,
1848 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1849 ioeventfd_update_pending |= mr->enabled;
1850 memory_region_transaction_commit();
1851 }
1852
1853 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1854 {
1855 MemoryRegion *mr = subregion->container;
1856 MemoryRegion *other;
1857
1858 memory_region_transaction_begin();
1859
1860 memory_region_ref(subregion);
1861 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1862 if (subregion->priority >= other->priority) {
1863 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1864 goto done;
1865 }
1866 }
1867 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1868 done:
1869 memory_region_update_pending |= mr->enabled && subregion->enabled;
1870 memory_region_transaction_commit();
1871 }
1872
1873 static void memory_region_add_subregion_common(MemoryRegion *mr,
1874 hwaddr offset,
1875 MemoryRegion *subregion)
1876 {
1877 assert(!subregion->container);
1878 subregion->container = mr;
1879 subregion->addr = offset;
1880 memory_region_update_container_subregions(subregion);
1881 }
1882
1883 void memory_region_add_subregion(MemoryRegion *mr,
1884 hwaddr offset,
1885 MemoryRegion *subregion)
1886 {
1887 subregion->priority = 0;
1888 memory_region_add_subregion_common(mr, offset, subregion);
1889 }
1890
1891 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1892 hwaddr offset,
1893 MemoryRegion *subregion,
1894 int priority)
1895 {
1896 subregion->priority = priority;
1897 memory_region_add_subregion_common(mr, offset, subregion);
1898 }
1899
1900 void memory_region_del_subregion(MemoryRegion *mr,
1901 MemoryRegion *subregion)
1902 {
1903 memory_region_transaction_begin();
1904 assert(subregion->container == mr);
1905 subregion->container = NULL;
1906 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1907 memory_region_unref(subregion);
1908 memory_region_update_pending |= mr->enabled && subregion->enabled;
1909 memory_region_transaction_commit();
1910 }
1911
1912 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1913 {
1914 if (enabled == mr->enabled) {
1915 return;
1916 }
1917 memory_region_transaction_begin();
1918 mr->enabled = enabled;
1919 memory_region_update_pending = true;
1920 memory_region_transaction_commit();
1921 }
1922
1923 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1924 {
1925 Int128 s = int128_make64(size);
1926
1927 if (size == UINT64_MAX) {
1928 s = int128_2_64();
1929 }
1930 if (int128_eq(s, mr->size)) {
1931 return;
1932 }
1933 memory_region_transaction_begin();
1934 mr->size = s;
1935 memory_region_update_pending = true;
1936 memory_region_transaction_commit();
1937 }
1938
1939 static void memory_region_readd_subregion(MemoryRegion *mr)
1940 {
1941 MemoryRegion *container = mr->container;
1942
1943 if (container) {
1944 memory_region_transaction_begin();
1945 memory_region_ref(mr);
1946 memory_region_del_subregion(container, mr);
1947 mr->container = container;
1948 memory_region_update_container_subregions(mr);
1949 memory_region_unref(mr);
1950 memory_region_transaction_commit();
1951 }
1952 }
1953
1954 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1955 {
1956 if (addr != mr->addr) {
1957 mr->addr = addr;
1958 memory_region_readd_subregion(mr);
1959 }
1960 }
1961
1962 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1963 {
1964 assert(mr->alias);
1965
1966 if (offset == mr->alias_offset) {
1967 return;
1968 }
1969
1970 memory_region_transaction_begin();
1971 mr->alias_offset = offset;
1972 memory_region_update_pending |= mr->enabled;
1973 memory_region_transaction_commit();
1974 }
1975
1976 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1977 {
1978 return mr->align;
1979 }
1980
1981 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1982 {
1983 const AddrRange *addr = addr_;
1984 const FlatRange *fr = fr_;
1985
1986 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1987 return -1;
1988 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1989 return 1;
1990 }
1991 return 0;
1992 }
1993
1994 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1995 {
1996 return bsearch(&addr, view->ranges, view->nr,
1997 sizeof(FlatRange), cmp_flatrange_addr);
1998 }
1999
2000 bool memory_region_is_mapped(MemoryRegion *mr)
2001 {
2002 return mr->container ? true : false;
2003 }
2004
2005 /* Same as memory_region_find, but it does not add a reference to the
2006 * returned region. It must be called from an RCU critical section.
2007 */
2008 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2009 hwaddr addr, uint64_t size)
2010 {
2011 MemoryRegionSection ret = { .mr = NULL };
2012 MemoryRegion *root;
2013 AddressSpace *as;
2014 AddrRange range;
2015 FlatView *view;
2016 FlatRange *fr;
2017
2018 addr += mr->addr;
2019 for (root = mr; root->container; ) {
2020 root = root->container;
2021 addr += root->addr;
2022 }
2023
2024 as = memory_region_to_address_space(root);
2025 if (!as) {
2026 return ret;
2027 }
2028 range = addrrange_make(int128_make64(addr), int128_make64(size));
2029
2030 view = atomic_rcu_read(&as->current_map);
2031 fr = flatview_lookup(view, range);
2032 if (!fr) {
2033 return ret;
2034 }
2035
2036 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2037 --fr;
2038 }
2039
2040 ret.mr = fr->mr;
2041 ret.address_space = as;
2042 range = addrrange_intersection(range, fr->addr);
2043 ret.offset_within_region = fr->offset_in_region;
2044 ret.offset_within_region += int128_get64(int128_sub(range.start,
2045 fr->addr.start));
2046 ret.size = range.size;
2047 ret.offset_within_address_space = int128_get64(range.start);
2048 ret.readonly = fr->readonly;
2049 return ret;
2050 }
2051
2052 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2053 hwaddr addr, uint64_t size)
2054 {
2055 MemoryRegionSection ret;
2056 rcu_read_lock();
2057 ret = memory_region_find_rcu(mr, addr, size);
2058 if (ret.mr) {
2059 memory_region_ref(ret.mr);
2060 }
2061 rcu_read_unlock();
2062 return ret;
2063 }
2064
2065 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2066 {
2067 MemoryRegion *mr;
2068
2069 rcu_read_lock();
2070 mr = memory_region_find_rcu(container, addr, 1).mr;
2071 rcu_read_unlock();
2072 return mr && mr != container;
2073 }
2074
2075 void address_space_sync_dirty_bitmap(AddressSpace *as)
2076 {
2077 FlatView *view;
2078 FlatRange *fr;
2079
2080 view = address_space_get_flatview(as);
2081 FOR_EACH_FLAT_RANGE(fr, view) {
2082 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
2083 }
2084 flatview_unref(view);
2085 }
2086
2087 void memory_global_dirty_log_start(void)
2088 {
2089 global_dirty_log = true;
2090
2091 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2092
2093 /* Refresh DIRTY_LOG_MIGRATION bit. */
2094 memory_region_transaction_begin();
2095 memory_region_update_pending = true;
2096 memory_region_transaction_commit();
2097 }
2098
2099 void memory_global_dirty_log_stop(void)
2100 {
2101 global_dirty_log = false;
2102
2103 /* Refresh DIRTY_LOG_MIGRATION bit. */
2104 memory_region_transaction_begin();
2105 memory_region_update_pending = true;
2106 memory_region_transaction_commit();
2107
2108 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2109 }
2110
2111 static void listener_add_address_space(MemoryListener *listener,
2112 AddressSpace *as)
2113 {
2114 FlatView *view;
2115 FlatRange *fr;
2116
2117 if (listener->address_space_filter
2118 && listener->address_space_filter != as) {
2119 return;
2120 }
2121
2122 if (listener->begin) {
2123 listener->begin(listener);
2124 }
2125 if (global_dirty_log) {
2126 if (listener->log_global_start) {
2127 listener->log_global_start(listener);
2128 }
2129 }
2130
2131 view = address_space_get_flatview(as);
2132 FOR_EACH_FLAT_RANGE(fr, view) {
2133 MemoryRegionSection section = {
2134 .mr = fr->mr,
2135 .address_space = as,
2136 .offset_within_region = fr->offset_in_region,
2137 .size = fr->addr.size,
2138 .offset_within_address_space = int128_get64(fr->addr.start),
2139 .readonly = fr->readonly,
2140 };
2141 if (fr->dirty_log_mask && listener->log_start) {
2142 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2143 }
2144 if (listener->region_add) {
2145 listener->region_add(listener, &section);
2146 }
2147 }
2148 if (listener->commit) {
2149 listener->commit(listener);
2150 }
2151 flatview_unref(view);
2152 }
2153
2154 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2155 {
2156 MemoryListener *other = NULL;
2157 AddressSpace *as;
2158
2159 listener->address_space_filter = filter;
2160 if (QTAILQ_EMPTY(&memory_listeners)
2161 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2162 memory_listeners)->priority) {
2163 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2164 } else {
2165 QTAILQ_FOREACH(other, &memory_listeners, link) {
2166 if (listener->priority < other->priority) {
2167 break;
2168 }
2169 }
2170 QTAILQ_INSERT_BEFORE(other, listener, link);
2171 }
2172
2173 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2174 listener_add_address_space(listener, as);
2175 }
2176 }
2177
2178 void memory_listener_unregister(MemoryListener *listener)
2179 {
2180 QTAILQ_REMOVE(&memory_listeners, listener, link);
2181 }
2182
2183 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2184 {
2185 memory_region_ref(root);
2186 memory_region_transaction_begin();
2187 as->ref_count = 1;
2188 as->root = root;
2189 as->malloced = false;
2190 as->current_map = g_new(FlatView, 1);
2191 flatview_init(as->current_map);
2192 as->ioeventfd_nb = 0;
2193 as->ioeventfds = NULL;
2194 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2195 as->name = g_strdup(name ? name : "anonymous");
2196 address_space_init_dispatch(as);
2197 memory_region_update_pending |= root->enabled;
2198 memory_region_transaction_commit();
2199 }
2200
2201 static void do_address_space_destroy(AddressSpace *as)
2202 {
2203 MemoryListener *listener;
2204 bool do_free = as->malloced;
2205
2206 address_space_destroy_dispatch(as);
2207
2208 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2209 assert(listener->address_space_filter != as);
2210 }
2211
2212 flatview_unref(as->current_map);
2213 g_free(as->name);
2214 g_free(as->ioeventfds);
2215 memory_region_unref(as->root);
2216 if (do_free) {
2217 g_free(as);
2218 }
2219 }
2220
2221 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2222 {
2223 AddressSpace *as;
2224
2225 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2226 if (root == as->root && as->malloced) {
2227 as->ref_count++;
2228 return as;
2229 }
2230 }
2231
2232 as = g_malloc0(sizeof *as);
2233 address_space_init(as, root, name);
2234 as->malloced = true;
2235 return as;
2236 }
2237
2238 void address_space_destroy(AddressSpace *as)
2239 {
2240 MemoryRegion *root = as->root;
2241
2242 as->ref_count--;
2243 if (as->ref_count) {
2244 return;
2245 }
2246 /* Flush out anything from MemoryListeners listening in on this */
2247 memory_region_transaction_begin();
2248 as->root = NULL;
2249 memory_region_transaction_commit();
2250 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2251 address_space_unregister(as);
2252
2253 /* At this point, as->dispatch and as->current_map are dummy
2254 * entries that the guest should never use. Wait for the old
2255 * values to expire before freeing the data.
2256 */
2257 as->root = root;
2258 call_rcu(as, do_address_space_destroy, rcu);
2259 }
2260
2261 typedef struct MemoryRegionList MemoryRegionList;
2262
2263 struct MemoryRegionList {
2264 const MemoryRegion *mr;
2265 QTAILQ_ENTRY(MemoryRegionList) queue;
2266 };
2267
2268 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2269
2270 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2271 const MemoryRegion *mr, unsigned int level,
2272 hwaddr base,
2273 MemoryRegionListHead *alias_print_queue)
2274 {
2275 MemoryRegionList *new_ml, *ml, *next_ml;
2276 MemoryRegionListHead submr_print_queue;
2277 const MemoryRegion *submr;
2278 unsigned int i;
2279
2280 if (!mr) {
2281 return;
2282 }
2283
2284 for (i = 0; i < level; i++) {
2285 mon_printf(f, " ");
2286 }
2287
2288 if (mr->alias) {
2289 MemoryRegionList *ml;
2290 bool found = false;
2291
2292 /* check if the alias is already in the queue */
2293 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2294 if (ml->mr == mr->alias) {
2295 found = true;
2296 }
2297 }
2298
2299 if (!found) {
2300 ml = g_new(MemoryRegionList, 1);
2301 ml->mr = mr->alias;
2302 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2303 }
2304 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2305 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2306 "-" TARGET_FMT_plx "%s\n",
2307 base + mr->addr,
2308 base + mr->addr
2309 + (int128_nz(mr->size) ?
2310 (hwaddr)int128_get64(int128_sub(mr->size,
2311 int128_one())) : 0),
2312 mr->priority,
2313 mr->romd_mode ? 'R' : '-',
2314 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2315 : '-',
2316 memory_region_name(mr),
2317 memory_region_name(mr->alias),
2318 mr->alias_offset,
2319 mr->alias_offset
2320 + (int128_nz(mr->size) ?
2321 (hwaddr)int128_get64(int128_sub(mr->size,
2322 int128_one())) : 0),
2323 mr->enabled ? "" : " [disabled]");
2324 } else {
2325 mon_printf(f,
2326 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2327 base + mr->addr,
2328 base + mr->addr
2329 + (int128_nz(mr->size) ?
2330 (hwaddr)int128_get64(int128_sub(mr->size,
2331 int128_one())) : 0),
2332 mr->priority,
2333 mr->romd_mode ? 'R' : '-',
2334 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2335 : '-',
2336 memory_region_name(mr),
2337 mr->enabled ? "" : " [disabled]");
2338 }
2339
2340 QTAILQ_INIT(&submr_print_queue);
2341
2342 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2343 new_ml = g_new(MemoryRegionList, 1);
2344 new_ml->mr = submr;
2345 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2346 if (new_ml->mr->addr < ml->mr->addr ||
2347 (new_ml->mr->addr == ml->mr->addr &&
2348 new_ml->mr->priority > ml->mr->priority)) {
2349 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2350 new_ml = NULL;
2351 break;
2352 }
2353 }
2354 if (new_ml) {
2355 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2356 }
2357 }
2358
2359 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2360 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2361 alias_print_queue);
2362 }
2363
2364 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2365 g_free(ml);
2366 }
2367 }
2368
2369 void mtree_info(fprintf_function mon_printf, void *f)
2370 {
2371 MemoryRegionListHead ml_head;
2372 MemoryRegionList *ml, *ml2;
2373 AddressSpace *as;
2374
2375 QTAILQ_INIT(&ml_head);
2376
2377 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2378 mon_printf(f, "address-space: %s\n", as->name);
2379 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2380 mon_printf(f, "\n");
2381 }
2382
2383 /* print aliased regions */
2384 QTAILQ_FOREACH(ml, &ml_head, queue) {
2385 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2386 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2387 mon_printf(f, "\n");
2388 }
2389
2390 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2391 g_free(ml);
2392 }
2393 }
2394
2395 static const TypeInfo memory_region_info = {
2396 .parent = TYPE_OBJECT,
2397 .name = TYPE_MEMORY_REGION,
2398 .instance_size = sizeof(MemoryRegion),
2399 .instance_init = memory_region_initfn,
2400 .instance_finalize = memory_region_finalize,
2401 };
2402
2403 static void memory_register_types(void)
2404 {
2405 type_register_static(&memory_region_info);
2406 }
2407
2408 type_init(memory_register_types)