hw/net: fix mcf_fec driver receiver
[qemu.git] / monitor.c
1 /*
2 * QEMU monitor
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include <dirent.h>
25 #include "hw/hw.h"
26 #include "monitor/qdev.h"
27 #include "hw/usb.h"
28 #include "hw/i386/pc.h"
29 #include "hw/pci/pci.h"
30 #include "sysemu/watchdog.h"
31 #include "hw/loader.h"
32 #include "exec/gdbstub.h"
33 #include "net/net.h"
34 #include "net/slirp.h"
35 #include "sysemu/char.h"
36 #include "ui/qemu-spice.h"
37 #include "sysemu/sysemu.h"
38 #include "sysemu/numa.h"
39 #include "monitor/monitor.h"
40 #include "qemu/readline.h"
41 #include "ui/console.h"
42 #include "ui/input.h"
43 #include "sysemu/blockdev.h"
44 #include "audio/audio.h"
45 #include "disas/disas.h"
46 #include "sysemu/balloon.h"
47 #include "qemu/timer.h"
48 #include "migration/migration.h"
49 #include "sysemu/kvm.h"
50 #include "qemu/acl.h"
51 #include "sysemu/tpm.h"
52 #include "qapi/qmp/qerror.h"
53 #include "qapi/qmp/qint.h"
54 #include "qapi/qmp/qfloat.h"
55 #include "qapi/qmp/qlist.h"
56 #include "qapi/qmp/qbool.h"
57 #include "qapi/qmp/qstring.h"
58 #include "qapi/qmp/qjson.h"
59 #include "qapi/qmp/json-streamer.h"
60 #include "qapi/qmp/json-parser.h"
61 #include <qom/object_interfaces.h>
62 #include "qemu/osdep.h"
63 #include "cpu.h"
64 #include "trace.h"
65 #include "trace/control.h"
66 #ifdef CONFIG_TRACE_SIMPLE
67 #include "trace/simple.h"
68 #endif
69 #include "exec/memory.h"
70 #include "exec/cpu_ldst.h"
71 #include "qmp-commands.h"
72 #include "hmp.h"
73 #include "qemu/thread.h"
74 #include "block/qapi.h"
75 #include "qapi/qmp-event.h"
76 #include "qapi-event.h"
77 #include "sysemu/block-backend.h"
78
79 /* for hmp_info_irq/pic */
80 #if defined(TARGET_SPARC)
81 #include "hw/sparc/sun4m.h"
82 #endif
83 #include "hw/lm32/lm32_pic.h"
84
85 /*
86 * Supported types:
87 *
88 * 'F' filename
89 * 'B' block device name
90 * 's' string (accept optional quote)
91 * 'S' it just appends the rest of the string (accept optional quote)
92 * 'O' option string of the form NAME=VALUE,...
93 * parsed according to QemuOptsList given by its name
94 * Example: 'device:O' uses qemu_device_opts.
95 * Restriction: only lists with empty desc are supported
96 * TODO lift the restriction
97 * 'i' 32 bit integer
98 * 'l' target long (32 or 64 bit)
99 * 'M' Non-negative target long (32 or 64 bit), in user mode the
100 * value is multiplied by 2^20 (think Mebibyte)
101 * 'o' octets (aka bytes)
102 * user mode accepts an optional E, e, P, p, T, t, G, g, M, m,
103 * K, k suffix, which multiplies the value by 2^60 for suffixes E
104 * and e, 2^50 for suffixes P and p, 2^40 for suffixes T and t,
105 * 2^30 for suffixes G and g, 2^20 for M and m, 2^10 for K and k
106 * 'T' double
107 * user mode accepts an optional ms, us, ns suffix,
108 * which divides the value by 1e3, 1e6, 1e9, respectively
109 * '/' optional gdb-like print format (like "/10x")
110 *
111 * '?' optional type (for all types, except '/')
112 * '.' other form of optional type (for 'i' and 'l')
113 * 'b' boolean
114 * user mode accepts "on" or "off"
115 * '-' optional parameter (eg. '-f')
116 *
117 */
118
119 typedef struct mon_cmd_t {
120 const char *name;
121 const char *args_type;
122 const char *params;
123 const char *help;
124 union {
125 void (*cmd)(Monitor *mon, const QDict *qdict);
126 void (*cmd_new)(QDict *params, QObject **ret_data, Error **errp);
127 } mhandler;
128 /* @sub_table is a list of 2nd level of commands. If it do not exist,
129 * mhandler should be used. If it exist, sub_table[?].mhandler should be
130 * used, and mhandler of 1st level plays the role of help function.
131 */
132 struct mon_cmd_t *sub_table;
133 void (*command_completion)(ReadLineState *rs, int nb_args, const char *str);
134 } mon_cmd_t;
135
136 /* file descriptors passed via SCM_RIGHTS */
137 typedef struct mon_fd_t mon_fd_t;
138 struct mon_fd_t {
139 char *name;
140 int fd;
141 QLIST_ENTRY(mon_fd_t) next;
142 };
143
144 /* file descriptor associated with a file descriptor set */
145 typedef struct MonFdsetFd MonFdsetFd;
146 struct MonFdsetFd {
147 int fd;
148 bool removed;
149 char *opaque;
150 QLIST_ENTRY(MonFdsetFd) next;
151 };
152
153 /* file descriptor set containing fds passed via SCM_RIGHTS */
154 typedef struct MonFdset MonFdset;
155 struct MonFdset {
156 int64_t id;
157 QLIST_HEAD(, MonFdsetFd) fds;
158 QLIST_HEAD(, MonFdsetFd) dup_fds;
159 QLIST_ENTRY(MonFdset) next;
160 };
161
162 typedef struct {
163 QObject *id;
164 JSONMessageParser parser;
165 /*
166 * When a client connects, we're in capabilities negotiation mode.
167 * When command qmp_capabilities succeeds, we go into command
168 * mode.
169 */
170 bool in_command_mode; /* are we in command mode? */
171 } MonitorQMP;
172
173 /*
174 * To prevent flooding clients, events can be throttled. The
175 * throttling is calculated globally, rather than per-Monitor
176 * instance.
177 */
178 typedef struct MonitorQAPIEventState {
179 QAPIEvent event; /* Event being tracked */
180 int64_t rate; /* Minimum time (in ns) between two events */
181 int64_t last; /* QEMU_CLOCK_REALTIME value at last emission */
182 QEMUTimer *timer; /* Timer for handling delayed events */
183 QObject *data; /* Event pending delayed dispatch */
184 } MonitorQAPIEventState;
185
186 struct Monitor {
187 CharDriverState *chr;
188 int reset_seen;
189 int flags;
190 int suspend_cnt;
191 bool skip_flush;
192
193 QemuMutex out_lock;
194 QString *outbuf;
195 guint out_watch;
196
197 /* Read under either BQL or out_lock, written with BQL+out_lock. */
198 int mux_out;
199
200 ReadLineState *rs;
201 MonitorQMP qmp;
202 CPUState *mon_cpu;
203 BlockCompletionFunc *password_completion_cb;
204 void *password_opaque;
205 mon_cmd_t *cmd_table;
206 QLIST_HEAD(,mon_fd_t) fds;
207 QLIST_ENTRY(Monitor) entry;
208 };
209
210 /* QMP checker flags */
211 #define QMP_ACCEPT_UNKNOWNS 1
212
213 /* Protects mon_list, monitor_event_state. */
214 static QemuMutex monitor_lock;
215
216 static QLIST_HEAD(mon_list, Monitor) mon_list;
217 static QLIST_HEAD(mon_fdsets, MonFdset) mon_fdsets;
218 static int mon_refcount;
219
220 static mon_cmd_t mon_cmds[];
221 static mon_cmd_t info_cmds[];
222
223 static const mon_cmd_t qmp_cmds[];
224
225 Monitor *cur_mon;
226
227 static void monitor_command_cb(void *opaque, const char *cmdline,
228 void *readline_opaque);
229
230 /**
231 * Is @mon a QMP monitor?
232 */
233 static inline bool monitor_is_qmp(const Monitor *mon)
234 {
235 return (mon->flags & MONITOR_USE_CONTROL);
236 }
237
238 /**
239 * Is the current monitor, if any, a QMP monitor?
240 */
241 bool monitor_cur_is_qmp(void)
242 {
243 return cur_mon && monitor_is_qmp(cur_mon);
244 }
245
246 void monitor_read_command(Monitor *mon, int show_prompt)
247 {
248 if (!mon->rs)
249 return;
250
251 readline_start(mon->rs, "(qemu) ", 0, monitor_command_cb, NULL);
252 if (show_prompt)
253 readline_show_prompt(mon->rs);
254 }
255
256 int monitor_read_password(Monitor *mon, ReadLineFunc *readline_func,
257 void *opaque)
258 {
259 if (mon->rs) {
260 readline_start(mon->rs, "Password: ", 1, readline_func, opaque);
261 /* prompt is printed on return from the command handler */
262 return 0;
263 } else {
264 monitor_printf(mon, "terminal does not support password prompting\n");
265 return -ENOTTY;
266 }
267 }
268
269 static void monitor_flush_locked(Monitor *mon);
270
271 static gboolean monitor_unblocked(GIOChannel *chan, GIOCondition cond,
272 void *opaque)
273 {
274 Monitor *mon = opaque;
275
276 qemu_mutex_lock(&mon->out_lock);
277 mon->out_watch = 0;
278 monitor_flush_locked(mon);
279 qemu_mutex_unlock(&mon->out_lock);
280 return FALSE;
281 }
282
283 /* Called with mon->out_lock held. */
284 static void monitor_flush_locked(Monitor *mon)
285 {
286 int rc;
287 size_t len;
288 const char *buf;
289
290 if (mon->skip_flush) {
291 return;
292 }
293
294 buf = qstring_get_str(mon->outbuf);
295 len = qstring_get_length(mon->outbuf);
296
297 if (len && !mon->mux_out) {
298 rc = qemu_chr_fe_write(mon->chr, (const uint8_t *) buf, len);
299 if ((rc < 0 && errno != EAGAIN) || (rc == len)) {
300 /* all flushed or error */
301 QDECREF(mon->outbuf);
302 mon->outbuf = qstring_new();
303 return;
304 }
305 if (rc > 0) {
306 /* partinal write */
307 QString *tmp = qstring_from_str(buf + rc);
308 QDECREF(mon->outbuf);
309 mon->outbuf = tmp;
310 }
311 if (mon->out_watch == 0) {
312 mon->out_watch = qemu_chr_fe_add_watch(mon->chr, G_IO_OUT|G_IO_HUP,
313 monitor_unblocked, mon);
314 }
315 }
316 }
317
318 void monitor_flush(Monitor *mon)
319 {
320 qemu_mutex_lock(&mon->out_lock);
321 monitor_flush_locked(mon);
322 qemu_mutex_unlock(&mon->out_lock);
323 }
324
325 /* flush at every end of line */
326 static void monitor_puts(Monitor *mon, const char *str)
327 {
328 char c;
329
330 qemu_mutex_lock(&mon->out_lock);
331 for(;;) {
332 c = *str++;
333 if (c == '\0')
334 break;
335 if (c == '\n') {
336 qstring_append_chr(mon->outbuf, '\r');
337 }
338 qstring_append_chr(mon->outbuf, c);
339 if (c == '\n') {
340 monitor_flush_locked(mon);
341 }
342 }
343 qemu_mutex_unlock(&mon->out_lock);
344 }
345
346 void monitor_vprintf(Monitor *mon, const char *fmt, va_list ap)
347 {
348 char *buf;
349
350 if (!mon)
351 return;
352
353 if (monitor_is_qmp(mon)) {
354 return;
355 }
356
357 buf = g_strdup_vprintf(fmt, ap);
358 monitor_puts(mon, buf);
359 g_free(buf);
360 }
361
362 void monitor_printf(Monitor *mon, const char *fmt, ...)
363 {
364 va_list ap;
365 va_start(ap, fmt);
366 monitor_vprintf(mon, fmt, ap);
367 va_end(ap);
368 }
369
370 static int GCC_FMT_ATTR(2, 3) monitor_fprintf(FILE *stream,
371 const char *fmt, ...)
372 {
373 va_list ap;
374 va_start(ap, fmt);
375 monitor_vprintf((Monitor *)stream, fmt, ap);
376 va_end(ap);
377 return 0;
378 }
379
380 static void monitor_json_emitter(Monitor *mon, const QObject *data)
381 {
382 QString *json;
383
384 json = mon->flags & MONITOR_USE_PRETTY ? qobject_to_json_pretty(data) :
385 qobject_to_json(data);
386 assert(json != NULL);
387
388 qstring_append_chr(json, '\n');
389 monitor_puts(mon, qstring_get_str(json));
390
391 QDECREF(json);
392 }
393
394 static QDict *build_qmp_error_dict(Error *err)
395 {
396 QObject *obj;
397
398 obj = qobject_from_jsonf("{ 'error': { 'class': %s, 'desc': %s } }",
399 ErrorClass_lookup[error_get_class(err)],
400 error_get_pretty(err));
401
402 return qobject_to_qdict(obj);
403 }
404
405 static void monitor_protocol_emitter(Monitor *mon, QObject *data,
406 Error *err)
407 {
408 QDict *qmp;
409
410 trace_monitor_protocol_emitter(mon);
411
412 if (!err) {
413 /* success response */
414 qmp = qdict_new();
415 if (data) {
416 qobject_incref(data);
417 qdict_put_obj(qmp, "return", data);
418 } else {
419 /* return an empty QDict by default */
420 qdict_put(qmp, "return", qdict_new());
421 }
422 } else {
423 /* error response */
424 qmp = build_qmp_error_dict(err);
425 }
426
427 if (mon->qmp.id) {
428 qdict_put_obj(qmp, "id", mon->qmp.id);
429 mon->qmp.id = NULL;
430 }
431
432 monitor_json_emitter(mon, QOBJECT(qmp));
433 QDECREF(qmp);
434 }
435
436
437 static MonitorQAPIEventState monitor_qapi_event_state[QAPI_EVENT_MAX];
438
439 /*
440 * Emits the event to every monitor instance, @event is only used for trace
441 * Called with monitor_lock held.
442 */
443 static void monitor_qapi_event_emit(QAPIEvent event, QObject *data)
444 {
445 Monitor *mon;
446
447 trace_monitor_protocol_event_emit(event, data);
448 QLIST_FOREACH(mon, &mon_list, entry) {
449 if (monitor_is_qmp(mon) && mon->qmp.in_command_mode) {
450 monitor_json_emitter(mon, data);
451 }
452 }
453 }
454
455 /*
456 * Queue a new event for emission to Monitor instances,
457 * applying any rate limiting if required.
458 */
459 static void
460 monitor_qapi_event_queue(QAPIEvent event, QDict *data, Error **errp)
461 {
462 MonitorQAPIEventState *evstate;
463 assert(event < QAPI_EVENT_MAX);
464 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
465
466 evstate = &(monitor_qapi_event_state[event]);
467 trace_monitor_protocol_event_queue(event,
468 data,
469 evstate->rate,
470 evstate->last,
471 now);
472
473 /* Rate limit of 0 indicates no throttling */
474 qemu_mutex_lock(&monitor_lock);
475 if (!evstate->rate) {
476 monitor_qapi_event_emit(event, QOBJECT(data));
477 evstate->last = now;
478 } else {
479 int64_t delta = now - evstate->last;
480 if (evstate->data ||
481 delta < evstate->rate) {
482 /* If there's an existing event pending, replace
483 * it with the new event, otherwise schedule a
484 * timer for delayed emission
485 */
486 if (evstate->data) {
487 qobject_decref(evstate->data);
488 } else {
489 int64_t then = evstate->last + evstate->rate;
490 timer_mod_ns(evstate->timer, then);
491 }
492 evstate->data = QOBJECT(data);
493 qobject_incref(evstate->data);
494 } else {
495 monitor_qapi_event_emit(event, QOBJECT(data));
496 evstate->last = now;
497 }
498 }
499 qemu_mutex_unlock(&monitor_lock);
500 }
501
502 /*
503 * The callback invoked by QemuTimer when a delayed
504 * event is ready to be emitted
505 */
506 static void monitor_qapi_event_handler(void *opaque)
507 {
508 MonitorQAPIEventState *evstate = opaque;
509 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
510
511 trace_monitor_protocol_event_handler(evstate->event,
512 evstate->data,
513 evstate->last,
514 now);
515 qemu_mutex_lock(&monitor_lock);
516 if (evstate->data) {
517 monitor_qapi_event_emit(evstate->event, evstate->data);
518 qobject_decref(evstate->data);
519 evstate->data = NULL;
520 }
521 evstate->last = now;
522 qemu_mutex_unlock(&monitor_lock);
523 }
524
525 /*
526 * @event: the event ID to be limited
527 * @rate: the rate limit in milliseconds
528 *
529 * Sets a rate limit on a particular event, so no
530 * more than 1 event will be emitted within @rate
531 * milliseconds
532 */
533 static void
534 monitor_qapi_event_throttle(QAPIEvent event, int64_t rate)
535 {
536 MonitorQAPIEventState *evstate;
537 assert(event < QAPI_EVENT_MAX);
538
539 evstate = &(monitor_qapi_event_state[event]);
540
541 trace_monitor_protocol_event_throttle(event, rate);
542 evstate->event = event;
543 assert(rate * SCALE_MS <= INT64_MAX);
544 evstate->rate = rate * SCALE_MS;
545 evstate->last = 0;
546 evstate->data = NULL;
547 evstate->timer = timer_new(QEMU_CLOCK_REALTIME,
548 SCALE_MS,
549 monitor_qapi_event_handler,
550 evstate);
551 }
552
553 static void monitor_qapi_event_init(void)
554 {
555 /* Limit guest-triggerable events to 1 per second */
556 monitor_qapi_event_throttle(QAPI_EVENT_RTC_CHANGE, 1000);
557 monitor_qapi_event_throttle(QAPI_EVENT_WATCHDOG, 1000);
558 monitor_qapi_event_throttle(QAPI_EVENT_BALLOON_CHANGE, 1000);
559 monitor_qapi_event_throttle(QAPI_EVENT_QUORUM_REPORT_BAD, 1000);
560 monitor_qapi_event_throttle(QAPI_EVENT_QUORUM_FAILURE, 1000);
561 monitor_qapi_event_throttle(QAPI_EVENT_VSERPORT_CHANGE, 1000);
562
563 qmp_event_set_func_emit(monitor_qapi_event_queue);
564 }
565
566 static void qmp_capabilities(QDict *params, QObject **ret_data, Error **errp)
567 {
568 cur_mon->qmp.in_command_mode = true;
569 }
570
571 static void handle_hmp_command(Monitor *mon, const char *cmdline);
572
573 static void monitor_data_init(Monitor *mon)
574 {
575 memset(mon, 0, sizeof(Monitor));
576 qemu_mutex_init(&mon->out_lock);
577 mon->outbuf = qstring_new();
578 /* Use *mon_cmds by default. */
579 mon->cmd_table = mon_cmds;
580 }
581
582 static void monitor_data_destroy(Monitor *mon)
583 {
584 QDECREF(mon->outbuf);
585 qemu_mutex_destroy(&mon->out_lock);
586 }
587
588 char *qmp_human_monitor_command(const char *command_line, bool has_cpu_index,
589 int64_t cpu_index, Error **errp)
590 {
591 char *output = NULL;
592 Monitor *old_mon, hmp;
593
594 monitor_data_init(&hmp);
595 hmp.skip_flush = true;
596
597 old_mon = cur_mon;
598 cur_mon = &hmp;
599
600 if (has_cpu_index) {
601 int ret = monitor_set_cpu(cpu_index);
602 if (ret < 0) {
603 cur_mon = old_mon;
604 error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index",
605 "a CPU number");
606 goto out;
607 }
608 }
609
610 handle_hmp_command(&hmp, command_line);
611 cur_mon = old_mon;
612
613 qemu_mutex_lock(&hmp.out_lock);
614 if (qstring_get_length(hmp.outbuf) > 0) {
615 output = g_strdup(qstring_get_str(hmp.outbuf));
616 } else {
617 output = g_strdup("");
618 }
619 qemu_mutex_unlock(&hmp.out_lock);
620
621 out:
622 monitor_data_destroy(&hmp);
623 return output;
624 }
625
626 static int compare_cmd(const char *name, const char *list)
627 {
628 const char *p, *pstart;
629 int len;
630 len = strlen(name);
631 p = list;
632 for(;;) {
633 pstart = p;
634 p = strchr(p, '|');
635 if (!p)
636 p = pstart + strlen(pstart);
637 if ((p - pstart) == len && !memcmp(pstart, name, len))
638 return 1;
639 if (*p == '\0')
640 break;
641 p++;
642 }
643 return 0;
644 }
645
646 static int get_str(char *buf, int buf_size, const char **pp)
647 {
648 const char *p;
649 char *q;
650 int c;
651
652 q = buf;
653 p = *pp;
654 while (qemu_isspace(*p)) {
655 p++;
656 }
657 if (*p == '\0') {
658 fail:
659 *q = '\0';
660 *pp = p;
661 return -1;
662 }
663 if (*p == '\"') {
664 p++;
665 while (*p != '\0' && *p != '\"') {
666 if (*p == '\\') {
667 p++;
668 c = *p++;
669 switch (c) {
670 case 'n':
671 c = '\n';
672 break;
673 case 'r':
674 c = '\r';
675 break;
676 case '\\':
677 case '\'':
678 case '\"':
679 break;
680 default:
681 qemu_printf("unsupported escape code: '\\%c'\n", c);
682 goto fail;
683 }
684 if ((q - buf) < buf_size - 1) {
685 *q++ = c;
686 }
687 } else {
688 if ((q - buf) < buf_size - 1) {
689 *q++ = *p;
690 }
691 p++;
692 }
693 }
694 if (*p != '\"') {
695 qemu_printf("unterminated string\n");
696 goto fail;
697 }
698 p++;
699 } else {
700 while (*p != '\0' && !qemu_isspace(*p)) {
701 if ((q - buf) < buf_size - 1) {
702 *q++ = *p;
703 }
704 p++;
705 }
706 }
707 *q = '\0';
708 *pp = p;
709 return 0;
710 }
711
712 #define MAX_ARGS 16
713
714 static void free_cmdline_args(char **args, int nb_args)
715 {
716 int i;
717
718 assert(nb_args <= MAX_ARGS);
719
720 for (i = 0; i < nb_args; i++) {
721 g_free(args[i]);
722 }
723
724 }
725
726 /*
727 * Parse the command line to get valid args.
728 * @cmdline: command line to be parsed.
729 * @pnb_args: location to store the number of args, must NOT be NULL.
730 * @args: location to store the args, which should be freed by caller, must
731 * NOT be NULL.
732 *
733 * Returns 0 on success, negative on failure.
734 *
735 * NOTE: this parser is an approximate form of the real command parser. Number
736 * of args have a limit of MAX_ARGS. If cmdline contains more, it will
737 * return with failure.
738 */
739 static int parse_cmdline(const char *cmdline,
740 int *pnb_args, char **args)
741 {
742 const char *p;
743 int nb_args, ret;
744 char buf[1024];
745
746 p = cmdline;
747 nb_args = 0;
748 for (;;) {
749 while (qemu_isspace(*p)) {
750 p++;
751 }
752 if (*p == '\0') {
753 break;
754 }
755 if (nb_args >= MAX_ARGS) {
756 goto fail;
757 }
758 ret = get_str(buf, sizeof(buf), &p);
759 if (ret < 0) {
760 goto fail;
761 }
762 args[nb_args] = g_strdup(buf);
763 nb_args++;
764 }
765 *pnb_args = nb_args;
766 return 0;
767
768 fail:
769 free_cmdline_args(args, nb_args);
770 return -1;
771 }
772
773 static void help_cmd_dump_one(Monitor *mon,
774 const mon_cmd_t *cmd,
775 char **prefix_args,
776 int prefix_args_nb)
777 {
778 int i;
779
780 for (i = 0; i < prefix_args_nb; i++) {
781 monitor_printf(mon, "%s ", prefix_args[i]);
782 }
783 monitor_printf(mon, "%s %s -- %s\n", cmd->name, cmd->params, cmd->help);
784 }
785
786 /* @args[@arg_index] is the valid command need to find in @cmds */
787 static void help_cmd_dump(Monitor *mon, const mon_cmd_t *cmds,
788 char **args, int nb_args, int arg_index)
789 {
790 const mon_cmd_t *cmd;
791
792 /* No valid arg need to compare with, dump all in *cmds */
793 if (arg_index >= nb_args) {
794 for (cmd = cmds; cmd->name != NULL; cmd++) {
795 help_cmd_dump_one(mon, cmd, args, arg_index);
796 }
797 return;
798 }
799
800 /* Find one entry to dump */
801 for (cmd = cmds; cmd->name != NULL; cmd++) {
802 if (compare_cmd(args[arg_index], cmd->name)) {
803 if (cmd->sub_table) {
804 /* continue with next arg */
805 help_cmd_dump(mon, cmd->sub_table,
806 args, nb_args, arg_index + 1);
807 } else {
808 help_cmd_dump_one(mon, cmd, args, arg_index);
809 }
810 break;
811 }
812 }
813 }
814
815 static void help_cmd(Monitor *mon, const char *name)
816 {
817 char *args[MAX_ARGS];
818 int nb_args = 0;
819
820 /* 1. parse user input */
821 if (name) {
822 /* special case for log, directly dump and return */
823 if (!strcmp(name, "log")) {
824 const QEMULogItem *item;
825 monitor_printf(mon, "Log items (comma separated):\n");
826 monitor_printf(mon, "%-10s %s\n", "none", "remove all logs");
827 for (item = qemu_log_items; item->mask != 0; item++) {
828 monitor_printf(mon, "%-10s %s\n", item->name, item->help);
829 }
830 return;
831 }
832
833 if (parse_cmdline(name, &nb_args, args) < 0) {
834 return;
835 }
836 }
837
838 /* 2. dump the contents according to parsed args */
839 help_cmd_dump(mon, mon->cmd_table, args, nb_args, 0);
840
841 free_cmdline_args(args, nb_args);
842 }
843
844 static void do_help_cmd(Monitor *mon, const QDict *qdict)
845 {
846 help_cmd(mon, qdict_get_try_str(qdict, "name"));
847 }
848
849 static void hmp_trace_event(Monitor *mon, const QDict *qdict)
850 {
851 const char *tp_name = qdict_get_str(qdict, "name");
852 bool new_state = qdict_get_bool(qdict, "option");
853 Error *local_err = NULL;
854
855 qmp_trace_event_set_state(tp_name, new_state, true, true, &local_err);
856 if (local_err) {
857 error_report_err(local_err);
858 }
859 }
860
861 #ifdef CONFIG_TRACE_SIMPLE
862 static void hmp_trace_file(Monitor *mon, const QDict *qdict)
863 {
864 const char *op = qdict_get_try_str(qdict, "op");
865 const char *arg = qdict_get_try_str(qdict, "arg");
866
867 if (!op) {
868 st_print_trace_file_status((FILE *)mon, &monitor_fprintf);
869 } else if (!strcmp(op, "on")) {
870 st_set_trace_file_enabled(true);
871 } else if (!strcmp(op, "off")) {
872 st_set_trace_file_enabled(false);
873 } else if (!strcmp(op, "flush")) {
874 st_flush_trace_buffer();
875 } else if (!strcmp(op, "set")) {
876 if (arg) {
877 st_set_trace_file(arg);
878 }
879 } else {
880 monitor_printf(mon, "unexpected argument \"%s\"\n", op);
881 help_cmd(mon, "trace-file");
882 }
883 }
884 #endif
885
886 static void hmp_info_help(Monitor *mon, const QDict *qdict)
887 {
888 help_cmd(mon, "info");
889 }
890
891 CommandInfoList *qmp_query_commands(Error **errp)
892 {
893 CommandInfoList *info, *cmd_list = NULL;
894 const mon_cmd_t *cmd;
895
896 for (cmd = qmp_cmds; cmd->name != NULL; cmd++) {
897 info = g_malloc0(sizeof(*info));
898 info->value = g_malloc0(sizeof(*info->value));
899 info->value->name = g_strdup(cmd->name);
900
901 info->next = cmd_list;
902 cmd_list = info;
903 }
904
905 return cmd_list;
906 }
907
908 EventInfoList *qmp_query_events(Error **errp)
909 {
910 EventInfoList *info, *ev_list = NULL;
911 QAPIEvent e;
912
913 for (e = 0 ; e < QAPI_EVENT_MAX ; e++) {
914 const char *event_name = QAPIEvent_lookup[e];
915 assert(event_name != NULL);
916 info = g_malloc0(sizeof(*info));
917 info->value = g_malloc0(sizeof(*info->value));
918 info->value->name = g_strdup(event_name);
919
920 info->next = ev_list;
921 ev_list = info;
922 }
923
924 return ev_list;
925 }
926
927 /* set the current CPU defined by the user */
928 int monitor_set_cpu(int cpu_index)
929 {
930 CPUState *cpu;
931
932 cpu = qemu_get_cpu(cpu_index);
933 if (cpu == NULL) {
934 return -1;
935 }
936 cur_mon->mon_cpu = cpu;
937 return 0;
938 }
939
940 static CPUState *mon_get_cpu(void)
941 {
942 if (!cur_mon->mon_cpu) {
943 monitor_set_cpu(0);
944 }
945 cpu_synchronize_state(cur_mon->mon_cpu);
946 return cur_mon->mon_cpu;
947 }
948
949 static CPUArchState *mon_get_cpu_env(void)
950 {
951 return mon_get_cpu()->env_ptr;
952 }
953
954 int monitor_get_cpu_index(void)
955 {
956 return mon_get_cpu()->cpu_index;
957 }
958
959 static void hmp_info_registers(Monitor *mon, const QDict *qdict)
960 {
961 cpu_dump_state(mon_get_cpu(), (FILE *)mon, monitor_fprintf, CPU_DUMP_FPU);
962 }
963
964 static void hmp_info_jit(Monitor *mon, const QDict *qdict)
965 {
966 dump_exec_info((FILE *)mon, monitor_fprintf);
967 dump_drift_info((FILE *)mon, monitor_fprintf);
968 }
969
970 static void hmp_info_opcount(Monitor *mon, const QDict *qdict)
971 {
972 dump_opcount_info((FILE *)mon, monitor_fprintf);
973 }
974
975 static void hmp_info_history(Monitor *mon, const QDict *qdict)
976 {
977 int i;
978 const char *str;
979
980 if (!mon->rs)
981 return;
982 i = 0;
983 for(;;) {
984 str = readline_get_history(mon->rs, i);
985 if (!str)
986 break;
987 monitor_printf(mon, "%d: '%s'\n", i, str);
988 i++;
989 }
990 }
991
992 static void hmp_info_cpustats(Monitor *mon, const QDict *qdict)
993 {
994 cpu_dump_statistics(mon_get_cpu(), (FILE *)mon, &monitor_fprintf, 0);
995 }
996
997 static void hmp_info_trace_events(Monitor *mon, const QDict *qdict)
998 {
999 TraceEventInfoList *events = qmp_trace_event_get_state("*", NULL);
1000 TraceEventInfoList *elem;
1001
1002 for (elem = events; elem != NULL; elem = elem->next) {
1003 monitor_printf(mon, "%s : state %u\n",
1004 elem->value->name,
1005 elem->value->state == TRACE_EVENT_STATE_ENABLED ? 1 : 0);
1006 }
1007 qapi_free_TraceEventInfoList(events);
1008 }
1009
1010 void qmp_client_migrate_info(const char *protocol, const char *hostname,
1011 bool has_port, int64_t port,
1012 bool has_tls_port, int64_t tls_port,
1013 bool has_cert_subject, const char *cert_subject,
1014 Error **errp)
1015 {
1016 if (strcmp(protocol, "spice") == 0) {
1017 if (!qemu_using_spice(errp)) {
1018 return;
1019 }
1020
1021 if (!has_port && !has_tls_port) {
1022 error_setg(errp, QERR_MISSING_PARAMETER, "port/tls-port");
1023 return;
1024 }
1025
1026 if (qemu_spice_migrate_info(hostname,
1027 has_port ? port : -1,
1028 has_tls_port ? tls_port : -1,
1029 cert_subject)) {
1030 error_setg(errp, QERR_UNDEFINED_ERROR);
1031 return;
1032 }
1033 return;
1034 }
1035
1036 error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "protocol", "spice");
1037 }
1038
1039 static void hmp_logfile(Monitor *mon, const QDict *qdict)
1040 {
1041 qemu_set_log_filename(qdict_get_str(qdict, "filename"));
1042 }
1043
1044 static void hmp_log(Monitor *mon, const QDict *qdict)
1045 {
1046 int mask;
1047 const char *items = qdict_get_str(qdict, "items");
1048
1049 if (!strcmp(items, "none")) {
1050 mask = 0;
1051 } else {
1052 mask = qemu_str_to_log_mask(items);
1053 if (!mask) {
1054 help_cmd(mon, "log");
1055 return;
1056 }
1057 }
1058 qemu_set_log(mask);
1059 }
1060
1061 static void hmp_singlestep(Monitor *mon, const QDict *qdict)
1062 {
1063 const char *option = qdict_get_try_str(qdict, "option");
1064 if (!option || !strcmp(option, "on")) {
1065 singlestep = 1;
1066 } else if (!strcmp(option, "off")) {
1067 singlestep = 0;
1068 } else {
1069 monitor_printf(mon, "unexpected option %s\n", option);
1070 }
1071 }
1072
1073 static void hmp_gdbserver(Monitor *mon, const QDict *qdict)
1074 {
1075 const char *device = qdict_get_try_str(qdict, "device");
1076 if (!device)
1077 device = "tcp::" DEFAULT_GDBSTUB_PORT;
1078 if (gdbserver_start(device) < 0) {
1079 monitor_printf(mon, "Could not open gdbserver on device '%s'\n",
1080 device);
1081 } else if (strcmp(device, "none") == 0) {
1082 monitor_printf(mon, "Disabled gdbserver\n");
1083 } else {
1084 monitor_printf(mon, "Waiting for gdb connection on device '%s'\n",
1085 device);
1086 }
1087 }
1088
1089 static void hmp_watchdog_action(Monitor *mon, const QDict *qdict)
1090 {
1091 const char *action = qdict_get_str(qdict, "action");
1092 if (select_watchdog_action(action) == -1) {
1093 monitor_printf(mon, "Unknown watchdog action '%s'\n", action);
1094 }
1095 }
1096
1097 static void monitor_printc(Monitor *mon, int c)
1098 {
1099 monitor_printf(mon, "'");
1100 switch(c) {
1101 case '\'':
1102 monitor_printf(mon, "\\'");
1103 break;
1104 case '\\':
1105 monitor_printf(mon, "\\\\");
1106 break;
1107 case '\n':
1108 monitor_printf(mon, "\\n");
1109 break;
1110 case '\r':
1111 monitor_printf(mon, "\\r");
1112 break;
1113 default:
1114 if (c >= 32 && c <= 126) {
1115 monitor_printf(mon, "%c", c);
1116 } else {
1117 monitor_printf(mon, "\\x%02x", c);
1118 }
1119 break;
1120 }
1121 monitor_printf(mon, "'");
1122 }
1123
1124 static void memory_dump(Monitor *mon, int count, int format, int wsize,
1125 hwaddr addr, int is_physical)
1126 {
1127 int l, line_size, i, max_digits, len;
1128 uint8_t buf[16];
1129 uint64_t v;
1130
1131 if (format == 'i') {
1132 int flags = 0;
1133 #ifdef TARGET_I386
1134 CPUArchState *env = mon_get_cpu_env();
1135 if (wsize == 2) {
1136 flags = 1;
1137 } else if (wsize == 4) {
1138 flags = 0;
1139 } else {
1140 /* as default we use the current CS size */
1141 flags = 0;
1142 if (env) {
1143 #ifdef TARGET_X86_64
1144 if ((env->efer & MSR_EFER_LMA) &&
1145 (env->segs[R_CS].flags & DESC_L_MASK))
1146 flags = 2;
1147 else
1148 #endif
1149 if (!(env->segs[R_CS].flags & DESC_B_MASK))
1150 flags = 1;
1151 }
1152 }
1153 #endif
1154 #ifdef TARGET_PPC
1155 CPUArchState *env = mon_get_cpu_env();
1156 flags = msr_le << 16;
1157 flags |= env->bfd_mach;
1158 #endif
1159 monitor_disas(mon, mon_get_cpu(), addr, count, is_physical, flags);
1160 return;
1161 }
1162
1163 len = wsize * count;
1164 if (wsize == 1)
1165 line_size = 8;
1166 else
1167 line_size = 16;
1168 max_digits = 0;
1169
1170 switch(format) {
1171 case 'o':
1172 max_digits = (wsize * 8 + 2) / 3;
1173 break;
1174 default:
1175 case 'x':
1176 max_digits = (wsize * 8) / 4;
1177 break;
1178 case 'u':
1179 case 'd':
1180 max_digits = (wsize * 8 * 10 + 32) / 33;
1181 break;
1182 case 'c':
1183 wsize = 1;
1184 break;
1185 }
1186
1187 while (len > 0) {
1188 if (is_physical)
1189 monitor_printf(mon, TARGET_FMT_plx ":", addr);
1190 else
1191 monitor_printf(mon, TARGET_FMT_lx ":", (target_ulong)addr);
1192 l = len;
1193 if (l > line_size)
1194 l = line_size;
1195 if (is_physical) {
1196 cpu_physical_memory_read(addr, buf, l);
1197 } else {
1198 if (cpu_memory_rw_debug(mon_get_cpu(), addr, buf, l, 0) < 0) {
1199 monitor_printf(mon, " Cannot access memory\n");
1200 break;
1201 }
1202 }
1203 i = 0;
1204 while (i < l) {
1205 switch(wsize) {
1206 default:
1207 case 1:
1208 v = ldub_p(buf + i);
1209 break;
1210 case 2:
1211 v = lduw_p(buf + i);
1212 break;
1213 case 4:
1214 v = (uint32_t)ldl_p(buf + i);
1215 break;
1216 case 8:
1217 v = ldq_p(buf + i);
1218 break;
1219 }
1220 monitor_printf(mon, " ");
1221 switch(format) {
1222 case 'o':
1223 monitor_printf(mon, "%#*" PRIo64, max_digits, v);
1224 break;
1225 case 'x':
1226 monitor_printf(mon, "0x%0*" PRIx64, max_digits, v);
1227 break;
1228 case 'u':
1229 monitor_printf(mon, "%*" PRIu64, max_digits, v);
1230 break;
1231 case 'd':
1232 monitor_printf(mon, "%*" PRId64, max_digits, v);
1233 break;
1234 case 'c':
1235 monitor_printc(mon, v);
1236 break;
1237 }
1238 i += wsize;
1239 }
1240 monitor_printf(mon, "\n");
1241 addr += l;
1242 len -= l;
1243 }
1244 }
1245
1246 static void hmp_memory_dump(Monitor *mon, const QDict *qdict)
1247 {
1248 int count = qdict_get_int(qdict, "count");
1249 int format = qdict_get_int(qdict, "format");
1250 int size = qdict_get_int(qdict, "size");
1251 target_long addr = qdict_get_int(qdict, "addr");
1252
1253 memory_dump(mon, count, format, size, addr, 0);
1254 }
1255
1256 static void hmp_physical_memory_dump(Monitor *mon, const QDict *qdict)
1257 {
1258 int count = qdict_get_int(qdict, "count");
1259 int format = qdict_get_int(qdict, "format");
1260 int size = qdict_get_int(qdict, "size");
1261 hwaddr addr = qdict_get_int(qdict, "addr");
1262
1263 memory_dump(mon, count, format, size, addr, 1);
1264 }
1265
1266 static void do_print(Monitor *mon, const QDict *qdict)
1267 {
1268 int format = qdict_get_int(qdict, "format");
1269 hwaddr val = qdict_get_int(qdict, "val");
1270
1271 switch(format) {
1272 case 'o':
1273 monitor_printf(mon, "%#" HWADDR_PRIo, val);
1274 break;
1275 case 'x':
1276 monitor_printf(mon, "%#" HWADDR_PRIx, val);
1277 break;
1278 case 'u':
1279 monitor_printf(mon, "%" HWADDR_PRIu, val);
1280 break;
1281 default:
1282 case 'd':
1283 monitor_printf(mon, "%" HWADDR_PRId, val);
1284 break;
1285 case 'c':
1286 monitor_printc(mon, val);
1287 break;
1288 }
1289 monitor_printf(mon, "\n");
1290 }
1291
1292 static void hmp_sum(Monitor *mon, const QDict *qdict)
1293 {
1294 uint32_t addr;
1295 uint16_t sum;
1296 uint32_t start = qdict_get_int(qdict, "start");
1297 uint32_t size = qdict_get_int(qdict, "size");
1298
1299 sum = 0;
1300 for(addr = start; addr < (start + size); addr++) {
1301 uint8_t val = address_space_ldub(&address_space_memory, addr,
1302 MEMTXATTRS_UNSPECIFIED, NULL);
1303 /* BSD sum algorithm ('sum' Unix command) */
1304 sum = (sum >> 1) | (sum << 15);
1305 sum += val;
1306 }
1307 monitor_printf(mon, "%05d\n", sum);
1308 }
1309
1310 static int mouse_button_state;
1311
1312 static void hmp_mouse_move(Monitor *mon, const QDict *qdict)
1313 {
1314 int dx, dy, dz, button;
1315 const char *dx_str = qdict_get_str(qdict, "dx_str");
1316 const char *dy_str = qdict_get_str(qdict, "dy_str");
1317 const char *dz_str = qdict_get_try_str(qdict, "dz_str");
1318
1319 dx = strtol(dx_str, NULL, 0);
1320 dy = strtol(dy_str, NULL, 0);
1321 qemu_input_queue_rel(NULL, INPUT_AXIS_X, dx);
1322 qemu_input_queue_rel(NULL, INPUT_AXIS_Y, dy);
1323
1324 if (dz_str) {
1325 dz = strtol(dz_str, NULL, 0);
1326 if (dz != 0) {
1327 button = (dz > 0) ? INPUT_BUTTON_WHEEL_UP : INPUT_BUTTON_WHEEL_DOWN;
1328 qemu_input_queue_btn(NULL, button, true);
1329 qemu_input_event_sync();
1330 qemu_input_queue_btn(NULL, button, false);
1331 }
1332 }
1333 qemu_input_event_sync();
1334 }
1335
1336 static void hmp_mouse_button(Monitor *mon, const QDict *qdict)
1337 {
1338 static uint32_t bmap[INPUT_BUTTON_MAX] = {
1339 [INPUT_BUTTON_LEFT] = MOUSE_EVENT_LBUTTON,
1340 [INPUT_BUTTON_MIDDLE] = MOUSE_EVENT_MBUTTON,
1341 [INPUT_BUTTON_RIGHT] = MOUSE_EVENT_RBUTTON,
1342 };
1343 int button_state = qdict_get_int(qdict, "button_state");
1344
1345 if (mouse_button_state == button_state) {
1346 return;
1347 }
1348 qemu_input_update_buttons(NULL, bmap, mouse_button_state, button_state);
1349 qemu_input_event_sync();
1350 mouse_button_state = button_state;
1351 }
1352
1353 static void hmp_ioport_read(Monitor *mon, const QDict *qdict)
1354 {
1355 int size = qdict_get_int(qdict, "size");
1356 int addr = qdict_get_int(qdict, "addr");
1357 int has_index = qdict_haskey(qdict, "index");
1358 uint32_t val;
1359 int suffix;
1360
1361 if (has_index) {
1362 int index = qdict_get_int(qdict, "index");
1363 cpu_outb(addr & IOPORTS_MASK, index & 0xff);
1364 addr++;
1365 }
1366 addr &= 0xffff;
1367
1368 switch(size) {
1369 default:
1370 case 1:
1371 val = cpu_inb(addr);
1372 suffix = 'b';
1373 break;
1374 case 2:
1375 val = cpu_inw(addr);
1376 suffix = 'w';
1377 break;
1378 case 4:
1379 val = cpu_inl(addr);
1380 suffix = 'l';
1381 break;
1382 }
1383 monitor_printf(mon, "port%c[0x%04x] = %#0*x\n",
1384 suffix, addr, size * 2, val);
1385 }
1386
1387 static void hmp_ioport_write(Monitor *mon, const QDict *qdict)
1388 {
1389 int size = qdict_get_int(qdict, "size");
1390 int addr = qdict_get_int(qdict, "addr");
1391 int val = qdict_get_int(qdict, "val");
1392
1393 addr &= IOPORTS_MASK;
1394
1395 switch (size) {
1396 default:
1397 case 1:
1398 cpu_outb(addr, val);
1399 break;
1400 case 2:
1401 cpu_outw(addr, val);
1402 break;
1403 case 4:
1404 cpu_outl(addr, val);
1405 break;
1406 }
1407 }
1408
1409 static void hmp_boot_set(Monitor *mon, const QDict *qdict)
1410 {
1411 Error *local_err = NULL;
1412 const char *bootdevice = qdict_get_str(qdict, "bootdevice");
1413
1414 qemu_boot_set(bootdevice, &local_err);
1415 if (local_err) {
1416 monitor_printf(mon, "%s\n", error_get_pretty(local_err));
1417 error_free(local_err);
1418 } else {
1419 monitor_printf(mon, "boot device list now set to %s\n", bootdevice);
1420 }
1421 }
1422
1423 #if defined(TARGET_I386)
1424 static void print_pte(Monitor *mon, hwaddr addr,
1425 hwaddr pte,
1426 hwaddr mask)
1427 {
1428 #ifdef TARGET_X86_64
1429 if (addr & (1ULL << 47)) {
1430 addr |= -1LL << 48;
1431 }
1432 #endif
1433 monitor_printf(mon, TARGET_FMT_plx ": " TARGET_FMT_plx
1434 " %c%c%c%c%c%c%c%c%c\n",
1435 addr,
1436 pte & mask,
1437 pte & PG_NX_MASK ? 'X' : '-',
1438 pte & PG_GLOBAL_MASK ? 'G' : '-',
1439 pte & PG_PSE_MASK ? 'P' : '-',
1440 pte & PG_DIRTY_MASK ? 'D' : '-',
1441 pte & PG_ACCESSED_MASK ? 'A' : '-',
1442 pte & PG_PCD_MASK ? 'C' : '-',
1443 pte & PG_PWT_MASK ? 'T' : '-',
1444 pte & PG_USER_MASK ? 'U' : '-',
1445 pte & PG_RW_MASK ? 'W' : '-');
1446 }
1447
1448 static void tlb_info_32(Monitor *mon, CPUArchState *env)
1449 {
1450 unsigned int l1, l2;
1451 uint32_t pgd, pde, pte;
1452
1453 pgd = env->cr[3] & ~0xfff;
1454 for(l1 = 0; l1 < 1024; l1++) {
1455 cpu_physical_memory_read(pgd + l1 * 4, &pde, 4);
1456 pde = le32_to_cpu(pde);
1457 if (pde & PG_PRESENT_MASK) {
1458 if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
1459 /* 4M pages */
1460 print_pte(mon, (l1 << 22), pde, ~((1 << 21) - 1));
1461 } else {
1462 for(l2 = 0; l2 < 1024; l2++) {
1463 cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, &pte, 4);
1464 pte = le32_to_cpu(pte);
1465 if (pte & PG_PRESENT_MASK) {
1466 print_pte(mon, (l1 << 22) + (l2 << 12),
1467 pte & ~PG_PSE_MASK,
1468 ~0xfff);
1469 }
1470 }
1471 }
1472 }
1473 }
1474 }
1475
1476 static void tlb_info_pae32(Monitor *mon, CPUArchState *env)
1477 {
1478 unsigned int l1, l2, l3;
1479 uint64_t pdpe, pde, pte;
1480 uint64_t pdp_addr, pd_addr, pt_addr;
1481
1482 pdp_addr = env->cr[3] & ~0x1f;
1483 for (l1 = 0; l1 < 4; l1++) {
1484 cpu_physical_memory_read(pdp_addr + l1 * 8, &pdpe, 8);
1485 pdpe = le64_to_cpu(pdpe);
1486 if (pdpe & PG_PRESENT_MASK) {
1487 pd_addr = pdpe & 0x3fffffffff000ULL;
1488 for (l2 = 0; l2 < 512; l2++) {
1489 cpu_physical_memory_read(pd_addr + l2 * 8, &pde, 8);
1490 pde = le64_to_cpu(pde);
1491 if (pde & PG_PRESENT_MASK) {
1492 if (pde & PG_PSE_MASK) {
1493 /* 2M pages with PAE, CR4.PSE is ignored */
1494 print_pte(mon, (l1 << 30 ) + (l2 << 21), pde,
1495 ~((hwaddr)(1 << 20) - 1));
1496 } else {
1497 pt_addr = pde & 0x3fffffffff000ULL;
1498 for (l3 = 0; l3 < 512; l3++) {
1499 cpu_physical_memory_read(pt_addr + l3 * 8, &pte, 8);
1500 pte = le64_to_cpu(pte);
1501 if (pte & PG_PRESENT_MASK) {
1502 print_pte(mon, (l1 << 30 ) + (l2 << 21)
1503 + (l3 << 12),
1504 pte & ~PG_PSE_MASK,
1505 ~(hwaddr)0xfff);
1506 }
1507 }
1508 }
1509 }
1510 }
1511 }
1512 }
1513 }
1514
1515 #ifdef TARGET_X86_64
1516 static void tlb_info_64(Monitor *mon, CPUArchState *env)
1517 {
1518 uint64_t l1, l2, l3, l4;
1519 uint64_t pml4e, pdpe, pde, pte;
1520 uint64_t pml4_addr, pdp_addr, pd_addr, pt_addr;
1521
1522 pml4_addr = env->cr[3] & 0x3fffffffff000ULL;
1523 for (l1 = 0; l1 < 512; l1++) {
1524 cpu_physical_memory_read(pml4_addr + l1 * 8, &pml4e, 8);
1525 pml4e = le64_to_cpu(pml4e);
1526 if (pml4e & PG_PRESENT_MASK) {
1527 pdp_addr = pml4e & 0x3fffffffff000ULL;
1528 for (l2 = 0; l2 < 512; l2++) {
1529 cpu_physical_memory_read(pdp_addr + l2 * 8, &pdpe, 8);
1530 pdpe = le64_to_cpu(pdpe);
1531 if (pdpe & PG_PRESENT_MASK) {
1532 if (pdpe & PG_PSE_MASK) {
1533 /* 1G pages, CR4.PSE is ignored */
1534 print_pte(mon, (l1 << 39) + (l2 << 30), pdpe,
1535 0x3ffffc0000000ULL);
1536 } else {
1537 pd_addr = pdpe & 0x3fffffffff000ULL;
1538 for (l3 = 0; l3 < 512; l3++) {
1539 cpu_physical_memory_read(pd_addr + l3 * 8, &pde, 8);
1540 pde = le64_to_cpu(pde);
1541 if (pde & PG_PRESENT_MASK) {
1542 if (pde & PG_PSE_MASK) {
1543 /* 2M pages, CR4.PSE is ignored */
1544 print_pte(mon, (l1 << 39) + (l2 << 30) +
1545 (l3 << 21), pde,
1546 0x3ffffffe00000ULL);
1547 } else {
1548 pt_addr = pde & 0x3fffffffff000ULL;
1549 for (l4 = 0; l4 < 512; l4++) {
1550 cpu_physical_memory_read(pt_addr
1551 + l4 * 8,
1552 &pte, 8);
1553 pte = le64_to_cpu(pte);
1554 if (pte & PG_PRESENT_MASK) {
1555 print_pte(mon, (l1 << 39) +
1556 (l2 << 30) +
1557 (l3 << 21) + (l4 << 12),
1558 pte & ~PG_PSE_MASK,
1559 0x3fffffffff000ULL);
1560 }
1561 }
1562 }
1563 }
1564 }
1565 }
1566 }
1567 }
1568 }
1569 }
1570 }
1571 #endif
1572
1573 static void hmp_info_tlb(Monitor *mon, const QDict *qdict)
1574 {
1575 CPUArchState *env;
1576
1577 env = mon_get_cpu_env();
1578
1579 if (!(env->cr[0] & CR0_PG_MASK)) {
1580 monitor_printf(mon, "PG disabled\n");
1581 return;
1582 }
1583 if (env->cr[4] & CR4_PAE_MASK) {
1584 #ifdef TARGET_X86_64
1585 if (env->hflags & HF_LMA_MASK) {
1586 tlb_info_64(mon, env);
1587 } else
1588 #endif
1589 {
1590 tlb_info_pae32(mon, env);
1591 }
1592 } else {
1593 tlb_info_32(mon, env);
1594 }
1595 }
1596
1597 static void mem_print(Monitor *mon, hwaddr *pstart,
1598 int *plast_prot,
1599 hwaddr end, int prot)
1600 {
1601 int prot1;
1602 prot1 = *plast_prot;
1603 if (prot != prot1) {
1604 if (*pstart != -1) {
1605 monitor_printf(mon, TARGET_FMT_plx "-" TARGET_FMT_plx " "
1606 TARGET_FMT_plx " %c%c%c\n",
1607 *pstart, end, end - *pstart,
1608 prot1 & PG_USER_MASK ? 'u' : '-',
1609 'r',
1610 prot1 & PG_RW_MASK ? 'w' : '-');
1611 }
1612 if (prot != 0)
1613 *pstart = end;
1614 else
1615 *pstart = -1;
1616 *plast_prot = prot;
1617 }
1618 }
1619
1620 static void mem_info_32(Monitor *mon, CPUArchState *env)
1621 {
1622 unsigned int l1, l2;
1623 int prot, last_prot;
1624 uint32_t pgd, pde, pte;
1625 hwaddr start, end;
1626
1627 pgd = env->cr[3] & ~0xfff;
1628 last_prot = 0;
1629 start = -1;
1630 for(l1 = 0; l1 < 1024; l1++) {
1631 cpu_physical_memory_read(pgd + l1 * 4, &pde, 4);
1632 pde = le32_to_cpu(pde);
1633 end = l1 << 22;
1634 if (pde & PG_PRESENT_MASK) {
1635 if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
1636 prot = pde & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK);
1637 mem_print(mon, &start, &last_prot, end, prot);
1638 } else {
1639 for(l2 = 0; l2 < 1024; l2++) {
1640 cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, &pte, 4);
1641 pte = le32_to_cpu(pte);
1642 end = (l1 << 22) + (l2 << 12);
1643 if (pte & PG_PRESENT_MASK) {
1644 prot = pte & pde &
1645 (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK);
1646 } else {
1647 prot = 0;
1648 }
1649 mem_print(mon, &start, &last_prot, end, prot);
1650 }
1651 }
1652 } else {
1653 prot = 0;
1654 mem_print(mon, &start, &last_prot, end, prot);
1655 }
1656 }
1657 /* Flush last range */
1658 mem_print(mon, &start, &last_prot, (hwaddr)1 << 32, 0);
1659 }
1660
1661 static void mem_info_pae32(Monitor *mon, CPUArchState *env)
1662 {
1663 unsigned int l1, l2, l3;
1664 int prot, last_prot;
1665 uint64_t pdpe, pde, pte;
1666 uint64_t pdp_addr, pd_addr, pt_addr;
1667 hwaddr start, end;
1668
1669 pdp_addr = env->cr[3] & ~0x1f;
1670 last_prot = 0;
1671 start = -1;
1672 for (l1 = 0; l1 < 4; l1++) {
1673 cpu_physical_memory_read(pdp_addr + l1 * 8, &pdpe, 8);
1674 pdpe = le64_to_cpu(pdpe);
1675 end = l1 << 30;
1676 if (pdpe & PG_PRESENT_MASK) {
1677 pd_addr = pdpe & 0x3fffffffff000ULL;
1678 for (l2 = 0; l2 < 512; l2++) {
1679 cpu_physical_memory_read(pd_addr + l2 * 8, &pde, 8);
1680 pde = le64_to_cpu(pde);
1681 end = (l1 << 30) + (l2 << 21);
1682 if (pde & PG_PRESENT_MASK) {
1683 if (pde & PG_PSE_MASK) {
1684 prot = pde & (PG_USER_MASK | PG_RW_MASK |
1685 PG_PRESENT_MASK);
1686 mem_print(mon, &start, &last_prot, end, prot);
1687 } else {
1688 pt_addr = pde & 0x3fffffffff000ULL;
1689 for (l3 = 0; l3 < 512; l3++) {
1690 cpu_physical_memory_read(pt_addr + l3 * 8, &pte, 8);
1691 pte = le64_to_cpu(pte);
1692 end = (l1 << 30) + (l2 << 21) + (l3 << 12);
1693 if (pte & PG_PRESENT_MASK) {
1694 prot = pte & pde & (PG_USER_MASK | PG_RW_MASK |
1695 PG_PRESENT_MASK);
1696 } else {
1697 prot = 0;
1698 }
1699 mem_print(mon, &start, &last_prot, end, prot);
1700 }
1701 }
1702 } else {
1703 prot = 0;
1704 mem_print(mon, &start, &last_prot, end, prot);
1705 }
1706 }
1707 } else {
1708 prot = 0;
1709 mem_print(mon, &start, &last_prot, end, prot);
1710 }
1711 }
1712 /* Flush last range */
1713 mem_print(mon, &start, &last_prot, (hwaddr)1 << 32, 0);
1714 }
1715
1716
1717 #ifdef TARGET_X86_64
1718 static void mem_info_64(Monitor *mon, CPUArchState *env)
1719 {
1720 int prot, last_prot;
1721 uint64_t l1, l2, l3, l4;
1722 uint64_t pml4e, pdpe, pde, pte;
1723 uint64_t pml4_addr, pdp_addr, pd_addr, pt_addr, start, end;
1724
1725 pml4_addr = env->cr[3] & 0x3fffffffff000ULL;
1726 last_prot = 0;
1727 start = -1;
1728 for (l1 = 0; l1 < 512; l1++) {
1729 cpu_physical_memory_read(pml4_addr + l1 * 8, &pml4e, 8);
1730 pml4e = le64_to_cpu(pml4e);
1731 end = l1 << 39;
1732 if (pml4e & PG_PRESENT_MASK) {
1733 pdp_addr = pml4e & 0x3fffffffff000ULL;
1734 for (l2 = 0; l2 < 512; l2++) {
1735 cpu_physical_memory_read(pdp_addr + l2 * 8, &pdpe, 8);
1736 pdpe = le64_to_cpu(pdpe);
1737 end = (l1 << 39) + (l2 << 30);
1738 if (pdpe & PG_PRESENT_MASK) {
1739 if (pdpe & PG_PSE_MASK) {
1740 prot = pdpe & (PG_USER_MASK | PG_RW_MASK |
1741 PG_PRESENT_MASK);
1742 prot &= pml4e;
1743 mem_print(mon, &start, &last_prot, end, prot);
1744 } else {
1745 pd_addr = pdpe & 0x3fffffffff000ULL;
1746 for (l3 = 0; l3 < 512; l3++) {
1747 cpu_physical_memory_read(pd_addr + l3 * 8, &pde, 8);
1748 pde = le64_to_cpu(pde);
1749 end = (l1 << 39) + (l2 << 30) + (l3 << 21);
1750 if (pde & PG_PRESENT_MASK) {
1751 if (pde & PG_PSE_MASK) {
1752 prot = pde & (PG_USER_MASK | PG_RW_MASK |
1753 PG_PRESENT_MASK);
1754 prot &= pml4e & pdpe;
1755 mem_print(mon, &start, &last_prot, end, prot);
1756 } else {
1757 pt_addr = pde & 0x3fffffffff000ULL;
1758 for (l4 = 0; l4 < 512; l4++) {
1759 cpu_physical_memory_read(pt_addr
1760 + l4 * 8,
1761 &pte, 8);
1762 pte = le64_to_cpu(pte);
1763 end = (l1 << 39) + (l2 << 30) +
1764 (l3 << 21) + (l4 << 12);
1765 if (pte & PG_PRESENT_MASK) {
1766 prot = pte & (PG_USER_MASK | PG_RW_MASK |
1767 PG_PRESENT_MASK);
1768 prot &= pml4e & pdpe & pde;
1769 } else {
1770 prot = 0;
1771 }
1772 mem_print(mon, &start, &last_prot, end, prot);
1773 }
1774 }
1775 } else {
1776 prot = 0;
1777 mem_print(mon, &start, &last_prot, end, prot);
1778 }
1779 }
1780 }
1781 } else {
1782 prot = 0;
1783 mem_print(mon, &start, &last_prot, end, prot);
1784 }
1785 }
1786 } else {
1787 prot = 0;
1788 mem_print(mon, &start, &last_prot, end, prot);
1789 }
1790 }
1791 /* Flush last range */
1792 mem_print(mon, &start, &last_prot, (hwaddr)1 << 48, 0);
1793 }
1794 #endif
1795
1796 static void hmp_info_mem(Monitor *mon, const QDict *qdict)
1797 {
1798 CPUArchState *env;
1799
1800 env = mon_get_cpu_env();
1801
1802 if (!(env->cr[0] & CR0_PG_MASK)) {
1803 monitor_printf(mon, "PG disabled\n");
1804 return;
1805 }
1806 if (env->cr[4] & CR4_PAE_MASK) {
1807 #ifdef TARGET_X86_64
1808 if (env->hflags & HF_LMA_MASK) {
1809 mem_info_64(mon, env);
1810 } else
1811 #endif
1812 {
1813 mem_info_pae32(mon, env);
1814 }
1815 } else {
1816 mem_info_32(mon, env);
1817 }
1818 }
1819 #endif
1820
1821 #if defined(TARGET_SH4)
1822
1823 static void print_tlb(Monitor *mon, int idx, tlb_t *tlb)
1824 {
1825 monitor_printf(mon, " tlb%i:\t"
1826 "asid=%hhu vpn=%x\tppn=%x\tsz=%hhu size=%u\t"
1827 "v=%hhu shared=%hhu cached=%hhu prot=%hhu "
1828 "dirty=%hhu writethrough=%hhu\n",
1829 idx,
1830 tlb->asid, tlb->vpn, tlb->ppn, tlb->sz, tlb->size,
1831 tlb->v, tlb->sh, tlb->c, tlb->pr,
1832 tlb->d, tlb->wt);
1833 }
1834
1835 static void hmp_info_tlb(Monitor *mon, const QDict *qdict)
1836 {
1837 CPUArchState *env = mon_get_cpu_env();
1838 int i;
1839
1840 monitor_printf (mon, "ITLB:\n");
1841 for (i = 0 ; i < ITLB_SIZE ; i++)
1842 print_tlb (mon, i, &env->itlb[i]);
1843 monitor_printf (mon, "UTLB:\n");
1844 for (i = 0 ; i < UTLB_SIZE ; i++)
1845 print_tlb (mon, i, &env->utlb[i]);
1846 }
1847
1848 #endif
1849
1850 #if defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_XTENSA)
1851 static void hmp_info_tlb(Monitor *mon, const QDict *qdict)
1852 {
1853 CPUArchState *env1 = mon_get_cpu_env();
1854
1855 dump_mmu((FILE*)mon, (fprintf_function)monitor_printf, env1);
1856 }
1857 #endif
1858
1859 static void hmp_info_mtree(Monitor *mon, const QDict *qdict)
1860 {
1861 mtree_info((fprintf_function)monitor_printf, mon);
1862 }
1863
1864 static void hmp_info_numa(Monitor *mon, const QDict *qdict)
1865 {
1866 int i;
1867 CPUState *cpu;
1868 uint64_t *node_mem;
1869
1870 node_mem = g_new0(uint64_t, nb_numa_nodes);
1871 query_numa_node_mem(node_mem);
1872 monitor_printf(mon, "%d nodes\n", nb_numa_nodes);
1873 for (i = 0; i < nb_numa_nodes; i++) {
1874 monitor_printf(mon, "node %d cpus:", i);
1875 CPU_FOREACH(cpu) {
1876 if (cpu->numa_node == i) {
1877 monitor_printf(mon, " %d", cpu->cpu_index);
1878 }
1879 }
1880 monitor_printf(mon, "\n");
1881 monitor_printf(mon, "node %d size: %" PRId64 " MB\n", i,
1882 node_mem[i] >> 20);
1883 }
1884 g_free(node_mem);
1885 }
1886
1887 #ifdef CONFIG_PROFILER
1888
1889 int64_t tcg_time;
1890 int64_t dev_time;
1891
1892 static void hmp_info_profile(Monitor *mon, const QDict *qdict)
1893 {
1894 monitor_printf(mon, "async time %" PRId64 " (%0.3f)\n",
1895 dev_time, dev_time / (double)get_ticks_per_sec());
1896 monitor_printf(mon, "qemu time %" PRId64 " (%0.3f)\n",
1897 tcg_time, tcg_time / (double)get_ticks_per_sec());
1898 tcg_time = 0;
1899 dev_time = 0;
1900 }
1901 #else
1902 static void hmp_info_profile(Monitor *mon, const QDict *qdict)
1903 {
1904 monitor_printf(mon, "Internal profiler not compiled\n");
1905 }
1906 #endif
1907
1908 /* Capture support */
1909 static QLIST_HEAD (capture_list_head, CaptureState) capture_head;
1910
1911 static void hmp_info_capture(Monitor *mon, const QDict *qdict)
1912 {
1913 int i;
1914 CaptureState *s;
1915
1916 for (s = capture_head.lh_first, i = 0; s; s = s->entries.le_next, ++i) {
1917 monitor_printf(mon, "[%d]: ", i);
1918 s->ops.info (s->opaque);
1919 }
1920 }
1921
1922 static void hmp_stopcapture(Monitor *mon, const QDict *qdict)
1923 {
1924 int i;
1925 int n = qdict_get_int(qdict, "n");
1926 CaptureState *s;
1927
1928 for (s = capture_head.lh_first, i = 0; s; s = s->entries.le_next, ++i) {
1929 if (i == n) {
1930 s->ops.destroy (s->opaque);
1931 QLIST_REMOVE (s, entries);
1932 g_free (s);
1933 return;
1934 }
1935 }
1936 }
1937
1938 static void hmp_wavcapture(Monitor *mon, const QDict *qdict)
1939 {
1940 const char *path = qdict_get_str(qdict, "path");
1941 int has_freq = qdict_haskey(qdict, "freq");
1942 int freq = qdict_get_try_int(qdict, "freq", -1);
1943 int has_bits = qdict_haskey(qdict, "bits");
1944 int bits = qdict_get_try_int(qdict, "bits", -1);
1945 int has_channels = qdict_haskey(qdict, "nchannels");
1946 int nchannels = qdict_get_try_int(qdict, "nchannels", -1);
1947 CaptureState *s;
1948
1949 s = g_malloc0 (sizeof (*s));
1950
1951 freq = has_freq ? freq : 44100;
1952 bits = has_bits ? bits : 16;
1953 nchannels = has_channels ? nchannels : 2;
1954
1955 if (wav_start_capture (s, path, freq, bits, nchannels)) {
1956 monitor_printf(mon, "Failed to add wave capture\n");
1957 g_free (s);
1958 return;
1959 }
1960 QLIST_INSERT_HEAD (&capture_head, s, entries);
1961 }
1962
1963 static qemu_acl *find_acl(Monitor *mon, const char *name)
1964 {
1965 qemu_acl *acl = qemu_acl_find(name);
1966
1967 if (!acl) {
1968 monitor_printf(mon, "acl: unknown list '%s'\n", name);
1969 }
1970 return acl;
1971 }
1972
1973 static void hmp_acl_show(Monitor *mon, const QDict *qdict)
1974 {
1975 const char *aclname = qdict_get_str(qdict, "aclname");
1976 qemu_acl *acl = find_acl(mon, aclname);
1977 qemu_acl_entry *entry;
1978 int i = 0;
1979
1980 if (acl) {
1981 monitor_printf(mon, "policy: %s\n",
1982 acl->defaultDeny ? "deny" : "allow");
1983 QTAILQ_FOREACH(entry, &acl->entries, next) {
1984 i++;
1985 monitor_printf(mon, "%d: %s %s\n", i,
1986 entry->deny ? "deny" : "allow", entry->match);
1987 }
1988 }
1989 }
1990
1991 static void hmp_acl_reset(Monitor *mon, const QDict *qdict)
1992 {
1993 const char *aclname = qdict_get_str(qdict, "aclname");
1994 qemu_acl *acl = find_acl(mon, aclname);
1995
1996 if (acl) {
1997 qemu_acl_reset(acl);
1998 monitor_printf(mon, "acl: removed all rules\n");
1999 }
2000 }
2001
2002 static void hmp_acl_policy(Monitor *mon, const QDict *qdict)
2003 {
2004 const char *aclname = qdict_get_str(qdict, "aclname");
2005 const char *policy = qdict_get_str(qdict, "policy");
2006 qemu_acl *acl = find_acl(mon, aclname);
2007
2008 if (acl) {
2009 if (strcmp(policy, "allow") == 0) {
2010 acl->defaultDeny = 0;
2011 monitor_printf(mon, "acl: policy set to 'allow'\n");
2012 } else if (strcmp(policy, "deny") == 0) {
2013 acl->defaultDeny = 1;
2014 monitor_printf(mon, "acl: policy set to 'deny'\n");
2015 } else {
2016 monitor_printf(mon, "acl: unknown policy '%s', "
2017 "expected 'deny' or 'allow'\n", policy);
2018 }
2019 }
2020 }
2021
2022 static void hmp_acl_add(Monitor *mon, const QDict *qdict)
2023 {
2024 const char *aclname = qdict_get_str(qdict, "aclname");
2025 const char *match = qdict_get_str(qdict, "match");
2026 const char *policy = qdict_get_str(qdict, "policy");
2027 int has_index = qdict_haskey(qdict, "index");
2028 int index = qdict_get_try_int(qdict, "index", -1);
2029 qemu_acl *acl = find_acl(mon, aclname);
2030 int deny, ret;
2031
2032 if (acl) {
2033 if (strcmp(policy, "allow") == 0) {
2034 deny = 0;
2035 } else if (strcmp(policy, "deny") == 0) {
2036 deny = 1;
2037 } else {
2038 monitor_printf(mon, "acl: unknown policy '%s', "
2039 "expected 'deny' or 'allow'\n", policy);
2040 return;
2041 }
2042 if (has_index)
2043 ret = qemu_acl_insert(acl, deny, match, index);
2044 else
2045 ret = qemu_acl_append(acl, deny, match);
2046 if (ret < 0)
2047 monitor_printf(mon, "acl: unable to add acl entry\n");
2048 else
2049 monitor_printf(mon, "acl: added rule at position %d\n", ret);
2050 }
2051 }
2052
2053 static void hmp_acl_remove(Monitor *mon, const QDict *qdict)
2054 {
2055 const char *aclname = qdict_get_str(qdict, "aclname");
2056 const char *match = qdict_get_str(qdict, "match");
2057 qemu_acl *acl = find_acl(mon, aclname);
2058 int ret;
2059
2060 if (acl) {
2061 ret = qemu_acl_remove(acl, match);
2062 if (ret < 0)
2063 monitor_printf(mon, "acl: no matching acl entry\n");
2064 else
2065 monitor_printf(mon, "acl: removed rule at position %d\n", ret);
2066 }
2067 }
2068
2069 #if defined(TARGET_I386)
2070 static void hmp_mce(Monitor *mon, const QDict *qdict)
2071 {
2072 X86CPU *cpu;
2073 CPUState *cs;
2074 int cpu_index = qdict_get_int(qdict, "cpu_index");
2075 int bank = qdict_get_int(qdict, "bank");
2076 uint64_t status = qdict_get_int(qdict, "status");
2077 uint64_t mcg_status = qdict_get_int(qdict, "mcg_status");
2078 uint64_t addr = qdict_get_int(qdict, "addr");
2079 uint64_t misc = qdict_get_int(qdict, "misc");
2080 int flags = MCE_INJECT_UNCOND_AO;
2081
2082 if (qdict_get_try_bool(qdict, "broadcast", false)) {
2083 flags |= MCE_INJECT_BROADCAST;
2084 }
2085 cs = qemu_get_cpu(cpu_index);
2086 if (cs != NULL) {
2087 cpu = X86_CPU(cs);
2088 cpu_x86_inject_mce(mon, cpu, bank, status, mcg_status, addr, misc,
2089 flags);
2090 }
2091 }
2092 #endif
2093
2094 void qmp_getfd(const char *fdname, Error **errp)
2095 {
2096 mon_fd_t *monfd;
2097 int fd;
2098
2099 fd = qemu_chr_fe_get_msgfd(cur_mon->chr);
2100 if (fd == -1) {
2101 error_setg(errp, QERR_FD_NOT_SUPPLIED);
2102 return;
2103 }
2104
2105 if (qemu_isdigit(fdname[0])) {
2106 close(fd);
2107 error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "fdname",
2108 "a name not starting with a digit");
2109 return;
2110 }
2111
2112 QLIST_FOREACH(monfd, &cur_mon->fds, next) {
2113 if (strcmp(monfd->name, fdname) != 0) {
2114 continue;
2115 }
2116
2117 close(monfd->fd);
2118 monfd->fd = fd;
2119 return;
2120 }
2121
2122 monfd = g_malloc0(sizeof(mon_fd_t));
2123 monfd->name = g_strdup(fdname);
2124 monfd->fd = fd;
2125
2126 QLIST_INSERT_HEAD(&cur_mon->fds, monfd, next);
2127 }
2128
2129 void qmp_closefd(const char *fdname, Error **errp)
2130 {
2131 mon_fd_t *monfd;
2132
2133 QLIST_FOREACH(monfd, &cur_mon->fds, next) {
2134 if (strcmp(monfd->name, fdname) != 0) {
2135 continue;
2136 }
2137
2138 QLIST_REMOVE(monfd, next);
2139 close(monfd->fd);
2140 g_free(monfd->name);
2141 g_free(monfd);
2142 return;
2143 }
2144
2145 error_setg(errp, QERR_FD_NOT_FOUND, fdname);
2146 }
2147
2148 static void hmp_loadvm(Monitor *mon, const QDict *qdict)
2149 {
2150 int saved_vm_running = runstate_is_running();
2151 const char *name = qdict_get_str(qdict, "name");
2152
2153 vm_stop(RUN_STATE_RESTORE_VM);
2154
2155 if (load_vmstate(name) == 0 && saved_vm_running) {
2156 vm_start();
2157 }
2158 }
2159
2160 int monitor_get_fd(Monitor *mon, const char *fdname, Error **errp)
2161 {
2162 mon_fd_t *monfd;
2163
2164 QLIST_FOREACH(monfd, &mon->fds, next) {
2165 int fd;
2166
2167 if (strcmp(monfd->name, fdname) != 0) {
2168 continue;
2169 }
2170
2171 fd = monfd->fd;
2172
2173 /* caller takes ownership of fd */
2174 QLIST_REMOVE(monfd, next);
2175 g_free(monfd->name);
2176 g_free(monfd);
2177
2178 return fd;
2179 }
2180
2181 error_setg(errp, "File descriptor named '%s' has not been found", fdname);
2182 return -1;
2183 }
2184
2185 static void monitor_fdset_cleanup(MonFdset *mon_fdset)
2186 {
2187 MonFdsetFd *mon_fdset_fd;
2188 MonFdsetFd *mon_fdset_fd_next;
2189
2190 QLIST_FOREACH_SAFE(mon_fdset_fd, &mon_fdset->fds, next, mon_fdset_fd_next) {
2191 if ((mon_fdset_fd->removed ||
2192 (QLIST_EMPTY(&mon_fdset->dup_fds) && mon_refcount == 0)) &&
2193 runstate_is_running()) {
2194 close(mon_fdset_fd->fd);
2195 g_free(mon_fdset_fd->opaque);
2196 QLIST_REMOVE(mon_fdset_fd, next);
2197 g_free(mon_fdset_fd);
2198 }
2199 }
2200
2201 if (QLIST_EMPTY(&mon_fdset->fds) && QLIST_EMPTY(&mon_fdset->dup_fds)) {
2202 QLIST_REMOVE(mon_fdset, next);
2203 g_free(mon_fdset);
2204 }
2205 }
2206
2207 static void monitor_fdsets_cleanup(void)
2208 {
2209 MonFdset *mon_fdset;
2210 MonFdset *mon_fdset_next;
2211
2212 QLIST_FOREACH_SAFE(mon_fdset, &mon_fdsets, next, mon_fdset_next) {
2213 monitor_fdset_cleanup(mon_fdset);
2214 }
2215 }
2216
2217 AddfdInfo *qmp_add_fd(bool has_fdset_id, int64_t fdset_id, bool has_opaque,
2218 const char *opaque, Error **errp)
2219 {
2220 int fd;
2221 Monitor *mon = cur_mon;
2222 AddfdInfo *fdinfo;
2223
2224 fd = qemu_chr_fe_get_msgfd(mon->chr);
2225 if (fd == -1) {
2226 error_setg(errp, QERR_FD_NOT_SUPPLIED);
2227 goto error;
2228 }
2229
2230 fdinfo = monitor_fdset_add_fd(fd, has_fdset_id, fdset_id,
2231 has_opaque, opaque, errp);
2232 if (fdinfo) {
2233 return fdinfo;
2234 }
2235
2236 error:
2237 if (fd != -1) {
2238 close(fd);
2239 }
2240 return NULL;
2241 }
2242
2243 void qmp_remove_fd(int64_t fdset_id, bool has_fd, int64_t fd, Error **errp)
2244 {
2245 MonFdset *mon_fdset;
2246 MonFdsetFd *mon_fdset_fd;
2247 char fd_str[60];
2248
2249 QLIST_FOREACH(mon_fdset, &mon_fdsets, next) {
2250 if (mon_fdset->id != fdset_id) {
2251 continue;
2252 }
2253 QLIST_FOREACH(mon_fdset_fd, &mon_fdset->fds, next) {
2254 if (has_fd) {
2255 if (mon_fdset_fd->fd != fd) {
2256 continue;
2257 }
2258 mon_fdset_fd->removed = true;
2259 break;
2260 } else {
2261 mon_fdset_fd->removed = true;
2262 }
2263 }
2264 if (has_fd && !mon_fdset_fd) {
2265 goto error;
2266 }
2267 monitor_fdset_cleanup(mon_fdset);
2268 return;
2269 }
2270
2271 error:
2272 if (has_fd) {
2273 snprintf(fd_str, sizeof(fd_str), "fdset-id:%" PRId64 ", fd:%" PRId64,
2274 fdset_id, fd);
2275 } else {
2276 snprintf(fd_str, sizeof(fd_str), "fdset-id:%" PRId64, fdset_id);
2277 }
2278 error_setg(errp, QERR_FD_NOT_FOUND, fd_str);
2279 }
2280
2281 FdsetInfoList *qmp_query_fdsets(Error **errp)
2282 {
2283 MonFdset *mon_fdset;
2284 MonFdsetFd *mon_fdset_fd;
2285 FdsetInfoList *fdset_list = NULL;
2286
2287 QLIST_FOREACH(mon_fdset, &mon_fdsets, next) {
2288 FdsetInfoList *fdset_info = g_malloc0(sizeof(*fdset_info));
2289 FdsetFdInfoList *fdsetfd_list = NULL;
2290
2291 fdset_info->value = g_malloc0(sizeof(*fdset_info->value));
2292 fdset_info->value->fdset_id = mon_fdset->id;
2293
2294 QLIST_FOREACH(mon_fdset_fd, &mon_fdset->fds, next) {
2295 FdsetFdInfoList *fdsetfd_info;
2296
2297 fdsetfd_info = g_malloc0(sizeof(*fdsetfd_info));
2298 fdsetfd_info->value = g_malloc0(sizeof(*fdsetfd_info->value));
2299 fdsetfd_info->value->fd = mon_fdset_fd->fd;
2300 if (mon_fdset_fd->opaque) {
2301 fdsetfd_info->value->has_opaque = true;
2302 fdsetfd_info->value->opaque = g_strdup(mon_fdset_fd->opaque);
2303 } else {
2304 fdsetfd_info->value->has_opaque = false;
2305 }
2306
2307 fdsetfd_info->next = fdsetfd_list;
2308 fdsetfd_list = fdsetfd_info;
2309 }
2310
2311 fdset_info->value->fds = fdsetfd_list;
2312
2313 fdset_info->next = fdset_list;
2314 fdset_list = fdset_info;
2315 }
2316
2317 return fdset_list;
2318 }
2319
2320 AddfdInfo *monitor_fdset_add_fd(int fd, bool has_fdset_id, int64_t fdset_id,
2321 bool has_opaque, const char *opaque,
2322 Error **errp)
2323 {
2324 MonFdset *mon_fdset = NULL;
2325 MonFdsetFd *mon_fdset_fd;
2326 AddfdInfo *fdinfo;
2327
2328 if (has_fdset_id) {
2329 QLIST_FOREACH(mon_fdset, &mon_fdsets, next) {
2330 /* Break if match found or match impossible due to ordering by ID */
2331 if (fdset_id <= mon_fdset->id) {
2332 if (fdset_id < mon_fdset->id) {
2333 mon_fdset = NULL;
2334 }
2335 break;
2336 }
2337 }
2338 }
2339
2340 if (mon_fdset == NULL) {
2341 int64_t fdset_id_prev = -1;
2342 MonFdset *mon_fdset_cur = QLIST_FIRST(&mon_fdsets);
2343
2344 if (has_fdset_id) {
2345 if (fdset_id < 0) {
2346 error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "fdset-id",
2347 "a non-negative value");
2348 return NULL;
2349 }
2350 /* Use specified fdset ID */
2351 QLIST_FOREACH(mon_fdset, &mon_fdsets, next) {
2352 mon_fdset_cur = mon_fdset;
2353 if (fdset_id < mon_fdset_cur->id) {
2354 break;
2355 }
2356 }
2357 } else {
2358 /* Use first available fdset ID */
2359 QLIST_FOREACH(mon_fdset, &mon_fdsets, next) {
2360 mon_fdset_cur = mon_fdset;
2361 if (fdset_id_prev == mon_fdset_cur->id - 1) {
2362 fdset_id_prev = mon_fdset_cur->id;
2363 continue;
2364 }
2365 break;
2366 }
2367 }
2368
2369 mon_fdset = g_malloc0(sizeof(*mon_fdset));
2370 if (has_fdset_id) {
2371 mon_fdset->id = fdset_id;
2372 } else {
2373 mon_fdset->id = fdset_id_prev + 1;
2374 }
2375
2376 /* The fdset list is ordered by fdset ID */
2377 if (!mon_fdset_cur) {
2378 QLIST_INSERT_HEAD(&mon_fdsets, mon_fdset, next);
2379 } else if (mon_fdset->id < mon_fdset_cur->id) {
2380 QLIST_INSERT_BEFORE(mon_fdset_cur, mon_fdset, next);
2381 } else {
2382 QLIST_INSERT_AFTER(mon_fdset_cur, mon_fdset, next);
2383 }
2384 }
2385
2386 mon_fdset_fd = g_malloc0(sizeof(*mon_fdset_fd));
2387 mon_fdset_fd->fd = fd;
2388 mon_fdset_fd->removed = false;
2389 if (has_opaque) {
2390 mon_fdset_fd->opaque = g_strdup(opaque);
2391 }
2392 QLIST_INSERT_HEAD(&mon_fdset->fds, mon_fdset_fd, next);
2393
2394 fdinfo = g_malloc0(sizeof(*fdinfo));
2395 fdinfo->fdset_id = mon_fdset->id;
2396 fdinfo->fd = mon_fdset_fd->fd;
2397
2398 return fdinfo;
2399 }
2400
2401 int monitor_fdset_get_fd(int64_t fdset_id, int flags)
2402 {
2403 #ifndef _WIN32
2404 MonFdset *mon_fdset;
2405 MonFdsetFd *mon_fdset_fd;
2406 int mon_fd_flags;
2407
2408 QLIST_FOREACH(mon_fdset, &mon_fdsets, next) {
2409 if (mon_fdset->id != fdset_id) {
2410 continue;
2411 }
2412 QLIST_FOREACH(mon_fdset_fd, &mon_fdset->fds, next) {
2413 mon_fd_flags = fcntl(mon_fdset_fd->fd, F_GETFL);
2414 if (mon_fd_flags == -1) {
2415 return -1;
2416 }
2417
2418 if ((flags & O_ACCMODE) == (mon_fd_flags & O_ACCMODE)) {
2419 return mon_fdset_fd->fd;
2420 }
2421 }
2422 errno = EACCES;
2423 return -1;
2424 }
2425 #endif
2426
2427 errno = ENOENT;
2428 return -1;
2429 }
2430
2431 int monitor_fdset_dup_fd_add(int64_t fdset_id, int dup_fd)
2432 {
2433 MonFdset *mon_fdset;
2434 MonFdsetFd *mon_fdset_fd_dup;
2435
2436 QLIST_FOREACH(mon_fdset, &mon_fdsets, next) {
2437 if (mon_fdset->id != fdset_id) {
2438 continue;
2439 }
2440 QLIST_FOREACH(mon_fdset_fd_dup, &mon_fdset->dup_fds, next) {
2441 if (mon_fdset_fd_dup->fd == dup_fd) {
2442 return -1;
2443 }
2444 }
2445 mon_fdset_fd_dup = g_malloc0(sizeof(*mon_fdset_fd_dup));
2446 mon_fdset_fd_dup->fd = dup_fd;
2447 QLIST_INSERT_HEAD(&mon_fdset->dup_fds, mon_fdset_fd_dup, next);
2448 return 0;
2449 }
2450 return -1;
2451 }
2452
2453 static int monitor_fdset_dup_fd_find_remove(int dup_fd, bool remove)
2454 {
2455 MonFdset *mon_fdset;
2456 MonFdsetFd *mon_fdset_fd_dup;
2457
2458 QLIST_FOREACH(mon_fdset, &mon_fdsets, next) {
2459 QLIST_FOREACH(mon_fdset_fd_dup, &mon_fdset->dup_fds, next) {
2460 if (mon_fdset_fd_dup->fd == dup_fd) {
2461 if (remove) {
2462 QLIST_REMOVE(mon_fdset_fd_dup, next);
2463 if (QLIST_EMPTY(&mon_fdset->dup_fds)) {
2464 monitor_fdset_cleanup(mon_fdset);
2465 }
2466 return -1;
2467 } else {
2468 return mon_fdset->id;
2469 }
2470 }
2471 }
2472 }
2473 return -1;
2474 }
2475
2476 int monitor_fdset_dup_fd_find(int dup_fd)
2477 {
2478 return monitor_fdset_dup_fd_find_remove(dup_fd, false);
2479 }
2480
2481 void monitor_fdset_dup_fd_remove(int dup_fd)
2482 {
2483 monitor_fdset_dup_fd_find_remove(dup_fd, true);
2484 }
2485
2486 int monitor_fd_param(Monitor *mon, const char *fdname, Error **errp)
2487 {
2488 int fd;
2489 Error *local_err = NULL;
2490
2491 if (!qemu_isdigit(fdname[0]) && mon) {
2492 fd = monitor_get_fd(mon, fdname, &local_err);
2493 } else {
2494 fd = qemu_parse_fd(fdname);
2495 if (fd == -1) {
2496 error_setg(&local_err, "Invalid file descriptor number '%s'",
2497 fdname);
2498 }
2499 }
2500 if (local_err) {
2501 error_propagate(errp, local_err);
2502 assert(fd == -1);
2503 } else {
2504 assert(fd != -1);
2505 }
2506
2507 return fd;
2508 }
2509
2510 /* Please update hmp-commands.hx when adding or changing commands */
2511 static mon_cmd_t info_cmds[] = {
2512 {
2513 .name = "version",
2514 .args_type = "",
2515 .params = "",
2516 .help = "show the version of QEMU",
2517 .mhandler.cmd = hmp_info_version,
2518 },
2519 {
2520 .name = "network",
2521 .args_type = "",
2522 .params = "",
2523 .help = "show the network state",
2524 .mhandler.cmd = hmp_info_network,
2525 },
2526 {
2527 .name = "chardev",
2528 .args_type = "",
2529 .params = "",
2530 .help = "show the character devices",
2531 .mhandler.cmd = hmp_info_chardev,
2532 },
2533 {
2534 .name = "block",
2535 .args_type = "nodes:-n,verbose:-v,device:B?",
2536 .params = "[-n] [-v] [device]",
2537 .help = "show info of one block device or all block devices "
2538 "(-n: show named nodes; -v: show details)",
2539 .mhandler.cmd = hmp_info_block,
2540 },
2541 {
2542 .name = "blockstats",
2543 .args_type = "",
2544 .params = "",
2545 .help = "show block device statistics",
2546 .mhandler.cmd = hmp_info_blockstats,
2547 },
2548 {
2549 .name = "block-jobs",
2550 .args_type = "",
2551 .params = "",
2552 .help = "show progress of ongoing block device operations",
2553 .mhandler.cmd = hmp_info_block_jobs,
2554 },
2555 {
2556 .name = "registers",
2557 .args_type = "",
2558 .params = "",
2559 .help = "show the cpu registers",
2560 .mhandler.cmd = hmp_info_registers,
2561 },
2562 {
2563 .name = "cpus",
2564 .args_type = "",
2565 .params = "",
2566 .help = "show infos for each CPU",
2567 .mhandler.cmd = hmp_info_cpus,
2568 },
2569 {
2570 .name = "history",
2571 .args_type = "",
2572 .params = "",
2573 .help = "show the command line history",
2574 .mhandler.cmd = hmp_info_history,
2575 },
2576 #if defined(TARGET_I386) || defined(TARGET_PPC) || defined(TARGET_MIPS) || \
2577 defined(TARGET_LM32) || (defined(TARGET_SPARC) && !defined(TARGET_SPARC64))
2578 {
2579 .name = "irq",
2580 .args_type = "",
2581 .params = "",
2582 .help = "show the interrupts statistics (if available)",
2583 #ifdef TARGET_SPARC
2584 .mhandler.cmd = sun4m_hmp_info_irq,
2585 #elif defined(TARGET_LM32)
2586 .mhandler.cmd = lm32_hmp_info_irq,
2587 #else
2588 .mhandler.cmd = hmp_info_irq,
2589 #endif
2590 },
2591 {
2592 .name = "pic",
2593 .args_type = "",
2594 .params = "",
2595 .help = "show i8259 (PIC) state",
2596 #ifdef TARGET_SPARC
2597 .mhandler.cmd = sun4m_hmp_info_pic,
2598 #elif defined(TARGET_LM32)
2599 .mhandler.cmd = lm32_hmp_info_pic,
2600 #else
2601 .mhandler.cmd = hmp_info_pic,
2602 #endif
2603 },
2604 #endif
2605 {
2606 .name = "pci",
2607 .args_type = "",
2608 .params = "",
2609 .help = "show PCI info",
2610 .mhandler.cmd = hmp_info_pci,
2611 },
2612 #if defined(TARGET_I386) || defined(TARGET_SH4) || defined(TARGET_SPARC) || \
2613 defined(TARGET_PPC) || defined(TARGET_XTENSA)
2614 {
2615 .name = "tlb",
2616 .args_type = "",
2617 .params = "",
2618 .help = "show virtual to physical memory mappings",
2619 .mhandler.cmd = hmp_info_tlb,
2620 },
2621 #endif
2622 #if defined(TARGET_I386)
2623 {
2624 .name = "mem",
2625 .args_type = "",
2626 .params = "",
2627 .help = "show the active virtual memory mappings",
2628 .mhandler.cmd = hmp_info_mem,
2629 },
2630 #endif
2631 {
2632 .name = "mtree",
2633 .args_type = "",
2634 .params = "",
2635 .help = "show memory tree",
2636 .mhandler.cmd = hmp_info_mtree,
2637 },
2638 {
2639 .name = "jit",
2640 .args_type = "",
2641 .params = "",
2642 .help = "show dynamic compiler info",
2643 .mhandler.cmd = hmp_info_jit,
2644 },
2645 {
2646 .name = "opcount",
2647 .args_type = "",
2648 .params = "",
2649 .help = "show dynamic compiler opcode counters",
2650 .mhandler.cmd = hmp_info_opcount,
2651 },
2652 {
2653 .name = "kvm",
2654 .args_type = "",
2655 .params = "",
2656 .help = "show KVM information",
2657 .mhandler.cmd = hmp_info_kvm,
2658 },
2659 {
2660 .name = "numa",
2661 .args_type = "",
2662 .params = "",
2663 .help = "show NUMA information",
2664 .mhandler.cmd = hmp_info_numa,
2665 },
2666 {
2667 .name = "usb",
2668 .args_type = "",
2669 .params = "",
2670 .help = "show guest USB devices",
2671 .mhandler.cmd = hmp_info_usb,
2672 },
2673 {
2674 .name = "usbhost",
2675 .args_type = "",
2676 .params = "",
2677 .help = "show host USB devices",
2678 .mhandler.cmd = hmp_info_usbhost,
2679 },
2680 {
2681 .name = "profile",
2682 .args_type = "",
2683 .params = "",
2684 .help = "show profiling information",
2685 .mhandler.cmd = hmp_info_profile,
2686 },
2687 {
2688 .name = "capture",
2689 .args_type = "",
2690 .params = "",
2691 .help = "show capture information",
2692 .mhandler.cmd = hmp_info_capture,
2693 },
2694 {
2695 .name = "snapshots",
2696 .args_type = "",
2697 .params = "",
2698 .help = "show the currently saved VM snapshots",
2699 .mhandler.cmd = hmp_info_snapshots,
2700 },
2701 {
2702 .name = "status",
2703 .args_type = "",
2704 .params = "",
2705 .help = "show the current VM status (running|paused)",
2706 .mhandler.cmd = hmp_info_status,
2707 },
2708 {
2709 .name = "mice",
2710 .args_type = "",
2711 .params = "",
2712 .help = "show which guest mouse is receiving events",
2713 .mhandler.cmd = hmp_info_mice,
2714 },
2715 {
2716 .name = "vnc",
2717 .args_type = "",
2718 .params = "",
2719 .help = "show the vnc server status",
2720 .mhandler.cmd = hmp_info_vnc,
2721 },
2722 #if defined(CONFIG_SPICE)
2723 {
2724 .name = "spice",
2725 .args_type = "",
2726 .params = "",
2727 .help = "show the spice server status",
2728 .mhandler.cmd = hmp_info_spice,
2729 },
2730 #endif
2731 {
2732 .name = "name",
2733 .args_type = "",
2734 .params = "",
2735 .help = "show the current VM name",
2736 .mhandler.cmd = hmp_info_name,
2737 },
2738 {
2739 .name = "uuid",
2740 .args_type = "",
2741 .params = "",
2742 .help = "show the current VM UUID",
2743 .mhandler.cmd = hmp_info_uuid,
2744 },
2745 {
2746 .name = "cpustats",
2747 .args_type = "",
2748 .params = "",
2749 .help = "show CPU statistics",
2750 .mhandler.cmd = hmp_info_cpustats,
2751 },
2752 #if defined(CONFIG_SLIRP)
2753 {
2754 .name = "usernet",
2755 .args_type = "",
2756 .params = "",
2757 .help = "show user network stack connection states",
2758 .mhandler.cmd = hmp_info_usernet,
2759 },
2760 #endif
2761 {
2762 .name = "migrate",
2763 .args_type = "",
2764 .params = "",
2765 .help = "show migration status",
2766 .mhandler.cmd = hmp_info_migrate,
2767 },
2768 {
2769 .name = "migrate_capabilities",
2770 .args_type = "",
2771 .params = "",
2772 .help = "show current migration capabilities",
2773 .mhandler.cmd = hmp_info_migrate_capabilities,
2774 },
2775 {
2776 .name = "migrate_parameters",
2777 .args_type = "",
2778 .params = "",
2779 .help = "show current migration parameters",
2780 .mhandler.cmd = hmp_info_migrate_parameters,
2781 },
2782 {
2783 .name = "migrate_cache_size",
2784 .args_type = "",
2785 .params = "",
2786 .help = "show current migration xbzrle cache size",
2787 .mhandler.cmd = hmp_info_migrate_cache_size,
2788 },
2789 {
2790 .name = "balloon",
2791 .args_type = "",
2792 .params = "",
2793 .help = "show balloon information",
2794 .mhandler.cmd = hmp_info_balloon,
2795 },
2796 {
2797 .name = "qtree",
2798 .args_type = "",
2799 .params = "",
2800 .help = "show device tree",
2801 .mhandler.cmd = hmp_info_qtree,
2802 },
2803 {
2804 .name = "qdm",
2805 .args_type = "",
2806 .params = "",
2807 .help = "show qdev device model list",
2808 .mhandler.cmd = hmp_info_qdm,
2809 },
2810 {
2811 .name = "qom-tree",
2812 .args_type = "path:s?",
2813 .params = "[path]",
2814 .help = "show QOM composition tree",
2815 .mhandler.cmd = hmp_info_qom_tree,
2816 },
2817 {
2818 .name = "roms",
2819 .args_type = "",
2820 .params = "",
2821 .help = "show roms",
2822 .mhandler.cmd = hmp_info_roms,
2823 },
2824 {
2825 .name = "trace-events",
2826 .args_type = "",
2827 .params = "",
2828 .help = "show available trace-events & their state",
2829 .mhandler.cmd = hmp_info_trace_events,
2830 },
2831 {
2832 .name = "tpm",
2833 .args_type = "",
2834 .params = "",
2835 .help = "show the TPM device",
2836 .mhandler.cmd = hmp_info_tpm,
2837 },
2838 {
2839 .name = "memdev",
2840 .args_type = "",
2841 .params = "",
2842 .help = "show memory backends",
2843 .mhandler.cmd = hmp_info_memdev,
2844 },
2845 {
2846 .name = "memory-devices",
2847 .args_type = "",
2848 .params = "",
2849 .help = "show memory devices",
2850 .mhandler.cmd = hmp_info_memory_devices,
2851 },
2852 {
2853 .name = "rocker",
2854 .args_type = "name:s",
2855 .params = "name",
2856 .help = "Show rocker switch",
2857 .mhandler.cmd = hmp_rocker,
2858 },
2859 {
2860 .name = "rocker-ports",
2861 .args_type = "name:s",
2862 .params = "name",
2863 .help = "Show rocker ports",
2864 .mhandler.cmd = hmp_rocker_ports,
2865 },
2866 {
2867 .name = "rocker-of-dpa-flows",
2868 .args_type = "name:s,tbl_id:i?",
2869 .params = "name [tbl_id]",
2870 .help = "Show rocker OF-DPA flow tables",
2871 .mhandler.cmd = hmp_rocker_of_dpa_flows,
2872 },
2873 {
2874 .name = "rocker-of-dpa-groups",
2875 .args_type = "name:s,type:i?",
2876 .params = "name [type]",
2877 .help = "Show rocker OF-DPA groups",
2878 .mhandler.cmd = hmp_rocker_of_dpa_groups,
2879 },
2880 {
2881 .name = NULL,
2882 },
2883 };
2884
2885 /* mon_cmds and info_cmds would be sorted at runtime */
2886 static mon_cmd_t mon_cmds[] = {
2887 #include "hmp-commands.h"
2888 { NULL, NULL, },
2889 };
2890
2891 static const mon_cmd_t qmp_cmds[] = {
2892 #include "qmp-commands-old.h"
2893 { /* NULL */ },
2894 };
2895
2896 /*******************************************************************/
2897
2898 static const char *pch;
2899 static sigjmp_buf expr_env;
2900
2901 #define MD_TLONG 0
2902 #define MD_I32 1
2903
2904 typedef struct MonitorDef {
2905 const char *name;
2906 int offset;
2907 target_long (*get_value)(const struct MonitorDef *md, int val);
2908 int type;
2909 } MonitorDef;
2910
2911 #if defined(TARGET_I386)
2912 static target_long monitor_get_pc (const struct MonitorDef *md, int val)
2913 {
2914 CPUArchState *env = mon_get_cpu_env();
2915 return env->eip + env->segs[R_CS].base;
2916 }
2917 #endif
2918
2919 #if defined(TARGET_PPC)
2920 static target_long monitor_get_ccr (const struct MonitorDef *md, int val)
2921 {
2922 CPUArchState *env = mon_get_cpu_env();
2923 unsigned int u;
2924 int i;
2925
2926 u = 0;
2927 for (i = 0; i < 8; i++)
2928 u |= env->crf[i] << (32 - (4 * (i + 1)));
2929
2930 return u;
2931 }
2932
2933 static target_long monitor_get_msr (const struct MonitorDef *md, int val)
2934 {
2935 CPUArchState *env = mon_get_cpu_env();
2936 return env->msr;
2937 }
2938
2939 static target_long monitor_get_xer (const struct MonitorDef *md, int val)
2940 {
2941 CPUArchState *env = mon_get_cpu_env();
2942 return env->xer;
2943 }
2944
2945 static target_long monitor_get_decr (const struct MonitorDef *md, int val)
2946 {
2947 CPUArchState *env = mon_get_cpu_env();
2948 return cpu_ppc_load_decr(env);
2949 }
2950
2951 static target_long monitor_get_tbu (const struct MonitorDef *md, int val)
2952 {
2953 CPUArchState *env = mon_get_cpu_env();
2954 return cpu_ppc_load_tbu(env);
2955 }
2956
2957 static target_long monitor_get_tbl (const struct MonitorDef *md, int val)
2958 {
2959 CPUArchState *env = mon_get_cpu_env();
2960 return cpu_ppc_load_tbl(env);
2961 }
2962 #endif
2963
2964 #if defined(TARGET_SPARC)
2965 #ifndef TARGET_SPARC64
2966 static target_long monitor_get_psr (const struct MonitorDef *md, int val)
2967 {
2968 CPUArchState *env = mon_get_cpu_env();
2969
2970 return cpu_get_psr(env);
2971 }
2972 #endif
2973
2974 static target_long monitor_get_reg(const struct MonitorDef *md, int val)
2975 {
2976 CPUArchState *env = mon_get_cpu_env();
2977 return env->regwptr[val];
2978 }
2979 #endif
2980
2981 static const MonitorDef monitor_defs[] = {
2982 #ifdef TARGET_I386
2983
2984 #define SEG(name, seg) \
2985 { name, offsetof(CPUX86State, segs[seg].selector), NULL, MD_I32 },\
2986 { name ".base", offsetof(CPUX86State, segs[seg].base) },\
2987 { name ".limit", offsetof(CPUX86State, segs[seg].limit), NULL, MD_I32 },
2988
2989 { "eax", offsetof(CPUX86State, regs[0]) },
2990 { "ecx", offsetof(CPUX86State, regs[1]) },
2991 { "edx", offsetof(CPUX86State, regs[2]) },
2992 { "ebx", offsetof(CPUX86State, regs[3]) },
2993 { "esp|sp", offsetof(CPUX86State, regs[4]) },
2994 { "ebp|fp", offsetof(CPUX86State, regs[5]) },
2995 { "esi", offsetof(CPUX86State, regs[6]) },
2996 { "edi", offsetof(CPUX86State, regs[7]) },
2997 #ifdef TARGET_X86_64
2998 { "r8", offsetof(CPUX86State, regs[8]) },
2999 { "r9", offsetof(CPUX86State, regs[9]) },
3000 { "r10", offsetof(CPUX86State, regs[10]) },
3001 { "r11", offsetof(CPUX86State, regs[11]) },
3002 { "r12", offsetof(CPUX86State, regs[12]) },
3003 { "r13", offsetof(CPUX86State, regs[13]) },
3004 { "r14", offsetof(CPUX86State, regs[14]) },
3005 { "r15", offsetof(CPUX86State, regs[15]) },
3006 #endif
3007 { "eflags", offsetof(CPUX86State, eflags) },
3008 { "eip", offsetof(CPUX86State, eip) },
3009 SEG("cs", R_CS)
3010 SEG("ds", R_DS)
3011 SEG("es", R_ES)
3012 SEG("ss", R_SS)
3013 SEG("fs", R_FS)
3014 SEG("gs", R_GS)
3015 { "pc", 0, monitor_get_pc, },
3016 #elif defined(TARGET_PPC)
3017 /* General purpose registers */
3018 { "r0", offsetof(CPUPPCState, gpr[0]) },
3019 { "r1", offsetof(CPUPPCState, gpr[1]) },
3020 { "r2", offsetof(CPUPPCState, gpr[2]) },
3021 { "r3", offsetof(CPUPPCState, gpr[3]) },
3022 { "r4", offsetof(CPUPPCState, gpr[4]) },
3023 { "r5", offsetof(CPUPPCState, gpr[5]) },
3024 { "r6", offsetof(CPUPPCState, gpr[6]) },
3025 { "r7", offsetof(CPUPPCState, gpr[7]) },
3026 { "r8", offsetof(CPUPPCState, gpr[8]) },
3027 { "r9", offsetof(CPUPPCState, gpr[9]) },
3028 { "r10", offsetof(CPUPPCState, gpr[10]) },
3029 { "r11", offsetof(CPUPPCState, gpr[11]) },
3030 { "r12", offsetof(CPUPPCState, gpr[12]) },
3031 { "r13", offsetof(CPUPPCState, gpr[13]) },
3032 { "r14", offsetof(CPUPPCState, gpr[14]) },
3033 { "r15", offsetof(CPUPPCState, gpr[15]) },
3034 { "r16", offsetof(CPUPPCState, gpr[16]) },
3035 { "r17", offsetof(CPUPPCState, gpr[17]) },
3036 { "r18", offsetof(CPUPPCState, gpr[18]) },
3037 { "r19", offsetof(CPUPPCState, gpr[19]) },
3038 { "r20", offsetof(CPUPPCState, gpr[20]) },
3039 { "r21", offsetof(CPUPPCState, gpr[21]) },
3040 { "r22", offsetof(CPUPPCState, gpr[22]) },
3041 { "r23", offsetof(CPUPPCState, gpr[23]) },
3042 { "r24", offsetof(CPUPPCState, gpr[24]) },
3043 { "r25", offsetof(CPUPPCState, gpr[25]) },
3044 { "r26", offsetof(CPUPPCState, gpr[26]) },
3045 { "r27", offsetof(CPUPPCState, gpr[27]) },
3046 { "r28", offsetof(CPUPPCState, gpr[28]) },
3047 { "r29", offsetof(CPUPPCState, gpr[29]) },
3048 { "r30", offsetof(CPUPPCState, gpr[30]) },
3049 { "r31", offsetof(CPUPPCState, gpr[31]) },
3050 /* Floating point registers */
3051 { "f0", offsetof(CPUPPCState, fpr[0]) },
3052 { "f1", offsetof(CPUPPCState, fpr[1]) },
3053 { "f2", offsetof(CPUPPCState, fpr[2]) },
3054 { "f3", offsetof(CPUPPCState, fpr[3]) },
3055 { "f4", offsetof(CPUPPCState, fpr[4]) },
3056 { "f5", offsetof(CPUPPCState, fpr[5]) },
3057 { "f6", offsetof(CPUPPCState, fpr[6]) },
3058 { "f7", offsetof(CPUPPCState, fpr[7]) },
3059 { "f8", offsetof(CPUPPCState, fpr[8]) },
3060 { "f9", offsetof(CPUPPCState, fpr[9]) },
3061 { "f10", offsetof(CPUPPCState, fpr[10]) },
3062 { "f11", offsetof(CPUPPCState, fpr[11]) },
3063 { "f12", offsetof(CPUPPCState, fpr[12]) },
3064 { "f13", offsetof(CPUPPCState, fpr[13]) },
3065 { "f14", offsetof(CPUPPCState, fpr[14]) },
3066 { "f15", offsetof(CPUPPCState, fpr[15]) },
3067 { "f16", offsetof(CPUPPCState, fpr[16]) },
3068 { "f17", offsetof(CPUPPCState, fpr[17]) },
3069 { "f18", offsetof(CPUPPCState, fpr[18]) },
3070 { "f19", offsetof(CPUPPCState, fpr[19]) },
3071 { "f20", offsetof(CPUPPCState, fpr[20]) },
3072 { "f21", offsetof(CPUPPCState, fpr[21]) },
3073 { "f22", offsetof(CPUPPCState, fpr[22]) },
3074 { "f23", offsetof(CPUPPCState, fpr[23]) },
3075 { "f24", offsetof(CPUPPCState, fpr[24]) },
3076 { "f25", offsetof(CPUPPCState, fpr[25]) },
3077 { "f26", offsetof(CPUPPCState, fpr[26]) },
3078 { "f27", offsetof(CPUPPCState, fpr[27]) },
3079 { "f28", offsetof(CPUPPCState, fpr[28]) },
3080 { "f29", offsetof(CPUPPCState, fpr[29]) },
3081 { "f30", offsetof(CPUPPCState, fpr[30]) },
3082 { "f31", offsetof(CPUPPCState, fpr[31]) },
3083 { "fpscr", offsetof(CPUPPCState, fpscr) },
3084 /* Next instruction pointer */
3085 { "nip|pc", offsetof(CPUPPCState, nip) },
3086 { "lr", offsetof(CPUPPCState, lr) },
3087 { "ctr", offsetof(CPUPPCState, ctr) },
3088 { "decr", 0, &monitor_get_decr, },
3089 { "ccr", 0, &monitor_get_ccr, },
3090 /* Machine state register */
3091 { "msr", 0, &monitor_get_msr, },
3092 { "xer", 0, &monitor_get_xer, },
3093 { "tbu", 0, &monitor_get_tbu, },
3094 { "tbl", 0, &monitor_get_tbl, },
3095 /* Segment registers */
3096 { "sdr1", offsetof(CPUPPCState, spr[SPR_SDR1]) },
3097 { "sr0", offsetof(CPUPPCState, sr[0]) },
3098 { "sr1", offsetof(CPUPPCState, sr[1]) },
3099 { "sr2", offsetof(CPUPPCState, sr[2]) },
3100 { "sr3", offsetof(CPUPPCState, sr[3]) },
3101 { "sr4", offsetof(CPUPPCState, sr[4]) },
3102 { "sr5", offsetof(CPUPPCState, sr[5]) },
3103 { "sr6", offsetof(CPUPPCState, sr[6]) },
3104 { "sr7", offsetof(CPUPPCState, sr[7]) },
3105 { "sr8", offsetof(CPUPPCState, sr[8]) },
3106 { "sr9", offsetof(CPUPPCState, sr[9]) },
3107 { "sr10", offsetof(CPUPPCState, sr[10]) },
3108 { "sr11", offsetof(CPUPPCState, sr[11]) },
3109 { "sr12", offsetof(CPUPPCState, sr[12]) },
3110 { "sr13", offsetof(CPUPPCState, sr[13]) },
3111 { "sr14", offsetof(CPUPPCState, sr[14]) },
3112 { "sr15", offsetof(CPUPPCState, sr[15]) },
3113 /* Too lazy to put BATs... */
3114 { "pvr", offsetof(CPUPPCState, spr[SPR_PVR]) },
3115
3116 { "srr0", offsetof(CPUPPCState, spr[SPR_SRR0]) },
3117 { "srr1", offsetof(CPUPPCState, spr[SPR_SRR1]) },
3118 { "dar", offsetof(CPUPPCState, spr[SPR_DAR]) },
3119 { "dsisr", offsetof(CPUPPCState, spr[SPR_DSISR]) },
3120 { "cfar", offsetof(CPUPPCState, spr[SPR_CFAR]) },
3121 { "sprg0", offsetof(CPUPPCState, spr[SPR_SPRG0]) },
3122 { "sprg1", offsetof(CPUPPCState, spr[SPR_SPRG1]) },
3123 { "sprg2", offsetof(CPUPPCState, spr[SPR_SPRG2]) },
3124 { "sprg3", offsetof(CPUPPCState, spr[SPR_SPRG3]) },
3125 { "sprg4", offsetof(CPUPPCState, spr[SPR_SPRG4]) },
3126 { "sprg5", offsetof(CPUPPCState, spr[SPR_SPRG5]) },
3127 { "sprg6", offsetof(CPUPPCState, spr[SPR_SPRG6]) },
3128 { "sprg7", offsetof(CPUPPCState, spr[SPR_SPRG7]) },
3129 { "pid", offsetof(CPUPPCState, spr[SPR_BOOKE_PID]) },
3130 { "csrr0", offsetof(CPUPPCState, spr[SPR_BOOKE_CSRR0]) },
3131 { "csrr1", offsetof(CPUPPCState, spr[SPR_BOOKE_CSRR1]) },
3132 { "esr", offsetof(CPUPPCState, spr[SPR_BOOKE_ESR]) },
3133 { "dear", offsetof(CPUPPCState, spr[SPR_BOOKE_DEAR]) },
3134 { "mcsr", offsetof(CPUPPCState, spr[SPR_BOOKE_MCSR]) },
3135 { "tsr", offsetof(CPUPPCState, spr[SPR_BOOKE_TSR]) },
3136 { "tcr", offsetof(CPUPPCState, spr[SPR_BOOKE_TCR]) },
3137 { "vrsave", offsetof(CPUPPCState, spr[SPR_VRSAVE]) },
3138 { "pir", offsetof(CPUPPCState, spr[SPR_BOOKE_PIR]) },
3139 { "mcsrr0", offsetof(CPUPPCState, spr[SPR_BOOKE_MCSRR0]) },
3140 { "mcsrr1", offsetof(CPUPPCState, spr[SPR_BOOKE_MCSRR1]) },
3141 { "decar", offsetof(CPUPPCState, spr[SPR_BOOKE_DECAR]) },
3142 { "ivpr", offsetof(CPUPPCState, spr[SPR_BOOKE_IVPR]) },
3143 { "epcr", offsetof(CPUPPCState, spr[SPR_BOOKE_EPCR]) },
3144 { "sprg8", offsetof(CPUPPCState, spr[SPR_BOOKE_SPRG8]) },
3145 { "ivor0", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR0]) },
3146 { "ivor1", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR1]) },
3147 { "ivor2", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR2]) },
3148 { "ivor3", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR3]) },
3149 { "ivor4", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR4]) },
3150 { "ivor5", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR5]) },
3151 { "ivor6", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR6]) },
3152 { "ivor7", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR7]) },
3153 { "ivor8", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR8]) },
3154 { "ivor9", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR9]) },
3155 { "ivor10", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR10]) },
3156 { "ivor11", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR11]) },
3157 { "ivor12", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR12]) },
3158 { "ivor13", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR13]) },
3159 { "ivor14", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR14]) },
3160 { "ivor15", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR15]) },
3161 { "ivor32", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR32]) },
3162 { "ivor33", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR33]) },
3163 { "ivor34", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR34]) },
3164 { "ivor35", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR35]) },
3165 { "ivor36", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR36]) },
3166 { "ivor37", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR37]) },
3167 { "mas0", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS0]) },
3168 { "mas1", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS1]) },
3169 { "mas2", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS2]) },
3170 { "mas3", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS3]) },
3171 { "mas4", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS4]) },
3172 { "mas6", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS6]) },
3173 { "mas7", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS7]) },
3174 { "mmucfg", offsetof(CPUPPCState, spr[SPR_MMUCFG]) },
3175 { "tlb0cfg", offsetof(CPUPPCState, spr[SPR_BOOKE_TLB0CFG]) },
3176 { "tlb1cfg", offsetof(CPUPPCState, spr[SPR_BOOKE_TLB1CFG]) },
3177 { "epr", offsetof(CPUPPCState, spr[SPR_BOOKE_EPR]) },
3178 { "eplc", offsetof(CPUPPCState, spr[SPR_BOOKE_EPLC]) },
3179 { "epsc", offsetof(CPUPPCState, spr[SPR_BOOKE_EPSC]) },
3180 { "svr", offsetof(CPUPPCState, spr[SPR_E500_SVR]) },
3181 { "mcar", offsetof(CPUPPCState, spr[SPR_Exxx_MCAR]) },
3182 { "pid1", offsetof(CPUPPCState, spr[SPR_BOOKE_PID1]) },
3183 { "pid2", offsetof(CPUPPCState, spr[SPR_BOOKE_PID2]) },
3184 { "hid0", offsetof(CPUPPCState, spr[SPR_HID0]) },
3185
3186 #elif defined(TARGET_SPARC)
3187 { "g0", offsetof(CPUSPARCState, gregs[0]) },
3188 { "g1", offsetof(CPUSPARCState, gregs[1]) },
3189 { "g2", offsetof(CPUSPARCState, gregs[2]) },
3190 { "g3", offsetof(CPUSPARCState, gregs[3]) },
3191 { "g4", offsetof(CPUSPARCState, gregs[4]) },
3192 { "g5", offsetof(CPUSPARCState, gregs[5]) },
3193 { "g6", offsetof(CPUSPARCState, gregs[6]) },
3194 { "g7", offsetof(CPUSPARCState, gregs[7]) },
3195 { "o0", 0, monitor_get_reg },
3196 { "o1", 1, monitor_get_reg },
3197 { "o2", 2, monitor_get_reg },
3198 { "o3", 3, monitor_get_reg },
3199 { "o4", 4, monitor_get_reg },
3200 { "o5", 5, monitor_get_reg },
3201 { "o6", 6, monitor_get_reg },
3202 { "o7", 7, monitor_get_reg },
3203 { "l0", 8, monitor_get_reg },
3204 { "l1", 9, monitor_get_reg },
3205 { "l2", 10, monitor_get_reg },
3206 { "l3", 11, monitor_get_reg },
3207 { "l4", 12, monitor_get_reg },
3208 { "l5", 13, monitor_get_reg },
3209 { "l6", 14, monitor_get_reg },
3210 { "l7", 15, monitor_get_reg },
3211 { "i0", 16, monitor_get_reg },
3212 { "i1", 17, monitor_get_reg },
3213 { "i2", 18, monitor_get_reg },
3214 { "i3", 19, monitor_get_reg },
3215 { "i4", 20, monitor_get_reg },
3216 { "i5", 21, monitor_get_reg },
3217 { "i6", 22, monitor_get_reg },
3218 { "i7", 23, monitor_get_reg },
3219 { "pc", offsetof(CPUSPARCState, pc) },
3220 { "npc", offsetof(CPUSPARCState, npc) },
3221 { "y", offsetof(CPUSPARCState, y) },
3222 #ifndef TARGET_SPARC64
3223 { "psr", 0, &monitor_get_psr, },
3224 { "wim", offsetof(CPUSPARCState, wim) },
3225 #endif
3226 { "tbr", offsetof(CPUSPARCState, tbr) },
3227 { "fsr", offsetof(CPUSPARCState, fsr) },
3228 { "f0", offsetof(CPUSPARCState, fpr[0].l.upper) },
3229 { "f1", offsetof(CPUSPARCState, fpr[0].l.lower) },
3230 { "f2", offsetof(CPUSPARCState, fpr[1].l.upper) },
3231 { "f3", offsetof(CPUSPARCState, fpr[1].l.lower) },
3232 { "f4", offsetof(CPUSPARCState, fpr[2].l.upper) },
3233 { "f5", offsetof(CPUSPARCState, fpr[2].l.lower) },
3234 { "f6", offsetof(CPUSPARCState, fpr[3].l.upper) },
3235 { "f7", offsetof(CPUSPARCState, fpr[3].l.lower) },
3236 { "f8", offsetof(CPUSPARCState, fpr[4].l.upper) },
3237 { "f9", offsetof(CPUSPARCState, fpr[4].l.lower) },
3238 { "f10", offsetof(CPUSPARCState, fpr[5].l.upper) },
3239 { "f11", offsetof(CPUSPARCState, fpr[5].l.lower) },
3240 { "f12", offsetof(CPUSPARCState, fpr[6].l.upper) },
3241