cpu: Implement CPUClass::parse_features() for the rest of CPUs
[qemu.git] / qom / cpu.c
1 /*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20
21 #include "qemu-common.h"
22 #include "qom/cpu.h"
23 #include "sysemu/kvm.h"
24 #include "qemu/notify.h"
25 #include "qemu/log.h"
26 #include "sysemu/sysemu.h"
27
28 bool cpu_exists(int64_t id)
29 {
30 CPUState *cpu;
31
32 CPU_FOREACH(cpu) {
33 CPUClass *cc = CPU_GET_CLASS(cpu);
34
35 if (cc->get_arch_id(cpu) == id) {
36 return true;
37 }
38 }
39 return false;
40 }
41
42 bool cpu_paging_enabled(const CPUState *cpu)
43 {
44 CPUClass *cc = CPU_GET_CLASS(cpu);
45
46 return cc->get_paging_enabled(cpu);
47 }
48
49 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
50 {
51 return false;
52 }
53
54 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
55 Error **errp)
56 {
57 CPUClass *cc = CPU_GET_CLASS(cpu);
58
59 return cc->get_memory_mapping(cpu, list, errp);
60 }
61
62 static void cpu_common_get_memory_mapping(CPUState *cpu,
63 MemoryMappingList *list,
64 Error **errp)
65 {
66 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
67 }
68
69 /* CPU hot-plug notifiers */
70 static NotifierList cpu_added_notifiers =
71 NOTIFIER_LIST_INITIALIZER(cpu_add_notifiers);
72
73 void qemu_register_cpu_added_notifier(Notifier *notifier)
74 {
75 notifier_list_add(&cpu_added_notifiers, notifier);
76 }
77
78 void cpu_reset_interrupt(CPUState *cpu, int mask)
79 {
80 cpu->interrupt_request &= ~mask;
81 }
82
83 void cpu_exit(CPUState *cpu)
84 {
85 cpu->exit_request = 1;
86 cpu->tcg_exit_req = 1;
87 }
88
89 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
90 void *opaque)
91 {
92 CPUClass *cc = CPU_GET_CLASS(cpu);
93
94 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
95 }
96
97 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
98 CPUState *cpu, void *opaque)
99 {
100 return -1;
101 }
102
103 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
104 int cpuid, void *opaque)
105 {
106 CPUClass *cc = CPU_GET_CLASS(cpu);
107
108 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
109 }
110
111 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
112 CPUState *cpu, int cpuid,
113 void *opaque)
114 {
115 return -1;
116 }
117
118 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
119 void *opaque)
120 {
121 CPUClass *cc = CPU_GET_CLASS(cpu);
122
123 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
124 }
125
126 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
127 CPUState *cpu, void *opaque)
128 {
129 return -1;
130 }
131
132 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
133 int cpuid, void *opaque)
134 {
135 CPUClass *cc = CPU_GET_CLASS(cpu);
136
137 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
138 }
139
140 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
141 CPUState *cpu, int cpuid,
142 void *opaque)
143 {
144 return -1;
145 }
146
147
148 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
149 {
150 return 0;
151 }
152
153 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
154 {
155 return 0;
156 }
157
158
159 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
160 int flags)
161 {
162 CPUClass *cc = CPU_GET_CLASS(cpu);
163
164 if (cc->dump_state) {
165 cpu_synchronize_state(cpu);
166 cc->dump_state(cpu, f, cpu_fprintf, flags);
167 }
168 }
169
170 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
171 int flags)
172 {
173 CPUClass *cc = CPU_GET_CLASS(cpu);
174
175 if (cc->dump_statistics) {
176 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
177 }
178 }
179
180 void cpu_reset(CPUState *cpu)
181 {
182 CPUClass *klass = CPU_GET_CLASS(cpu);
183
184 if (klass->reset != NULL) {
185 (*klass->reset)(cpu);
186 }
187 }
188
189 static void cpu_common_reset(CPUState *cpu)
190 {
191 CPUClass *cc = CPU_GET_CLASS(cpu);
192
193 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
194 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
195 log_cpu_state(cpu, cc->reset_dump_flags);
196 }
197
198 cpu->interrupt_request = 0;
199 cpu->current_tb = NULL;
200 cpu->halted = 0;
201 }
202
203 static bool cpu_common_has_work(CPUState *cs)
204 {
205 return false;
206 }
207
208 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
209 {
210 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
211
212 return cc->class_by_name(cpu_model);
213 }
214
215 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
216 {
217 return NULL;
218 }
219
220 static void cpu_common_parse_features(CPUState *cpu, char *features,
221 Error **errp)
222 {
223 char *featurestr; /* Single "key=value" string being parsed */
224 char *val;
225 Error *err = NULL;
226
227 featurestr = features ? strtok(features, ",") : NULL;
228
229 while (featurestr) {
230 val = strchr(featurestr, '=');
231 if (val) {
232 *val = 0;
233 val++;
234 object_property_parse(OBJECT(cpu), val, featurestr, &err);
235 if (err) {
236 error_propagate(errp, err);
237 return;
238 }
239 } else {
240 error_setg(errp, "Expected key=value format, found %s.",
241 featurestr);
242 return;
243 }
244 featurestr = strtok(NULL, ",");
245 }
246 }
247
248 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
249 {
250 CPUState *cpu = CPU(dev);
251
252 if (dev->hotplugged) {
253 cpu_synchronize_post_init(cpu);
254 notifier_list_notify(&cpu_added_notifiers, dev);
255 cpu_resume(cpu);
256 }
257 }
258
259 static void cpu_common_initfn(Object *obj)
260 {
261 CPUState *cpu = CPU(obj);
262 CPUClass *cc = CPU_GET_CLASS(obj);
263
264 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
265 }
266
267 static int64_t cpu_common_get_arch_id(CPUState *cpu)
268 {
269 return cpu->cpu_index;
270 }
271
272 static void cpu_class_init(ObjectClass *klass, void *data)
273 {
274 DeviceClass *dc = DEVICE_CLASS(klass);
275 CPUClass *k = CPU_CLASS(klass);
276
277 k->class_by_name = cpu_common_class_by_name;
278 k->parse_features = cpu_common_parse_features;
279 k->reset = cpu_common_reset;
280 k->get_arch_id = cpu_common_get_arch_id;
281 k->has_work = cpu_common_has_work;
282 k->get_paging_enabled = cpu_common_get_paging_enabled;
283 k->get_memory_mapping = cpu_common_get_memory_mapping;
284 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
285 k->write_elf32_note = cpu_common_write_elf32_note;
286 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
287 k->write_elf64_note = cpu_common_write_elf64_note;
288 k->gdb_read_register = cpu_common_gdb_read_register;
289 k->gdb_write_register = cpu_common_gdb_write_register;
290 dc->realize = cpu_common_realizefn;
291 /*
292 * Reason: CPUs still need special care by board code: wiring up
293 * IRQs, adding reset handlers, halting non-first CPUs, ...
294 */
295 dc->cannot_instantiate_with_device_add_yet = true;
296 }
297
298 static const TypeInfo cpu_type_info = {
299 .name = TYPE_CPU,
300 .parent = TYPE_DEVICE,
301 .instance_size = sizeof(CPUState),
302 .instance_init = cpu_common_initfn,
303 .abstract = true,
304 .class_size = sizeof(CPUClass),
305 .class_init = cpu_class_init,
306 };
307
308 static void cpu_register_types(void)
309 {
310 type_register_static(&cpu_type_info);
311 }
312
313 type_init(cpu_register_types)