vmsvga: don't process more than 1024 fifo commands at once
[qemu.git] / qom / cpu.c
1 /*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu-common.h"
24 #include "qom/cpu.h"
25 #include "sysemu/kvm.h"
26 #include "qemu/notify.h"
27 #include "qemu/log.h"
28 #include "exec/log.h"
29 #include "qemu/error-report.h"
30 #include "sysemu/sysemu.h"
31
32 bool cpu_exists(int64_t id)
33 {
34 CPUState *cpu;
35
36 CPU_FOREACH(cpu) {
37 CPUClass *cc = CPU_GET_CLASS(cpu);
38
39 if (cc->get_arch_id(cpu) == id) {
40 return true;
41 }
42 }
43 return false;
44 }
45
46 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
47 {
48 char *str, *name, *featurestr;
49 CPUState *cpu;
50 ObjectClass *oc;
51 CPUClass *cc;
52 Error *err = NULL;
53
54 str = g_strdup(cpu_model);
55 name = strtok(str, ",");
56
57 oc = cpu_class_by_name(typename, name);
58 if (oc == NULL) {
59 g_free(str);
60 return NULL;
61 }
62
63 cpu = CPU(object_new(object_class_get_name(oc)));
64 cc = CPU_GET_CLASS(cpu);
65
66 featurestr = strtok(NULL, ",");
67 cc->parse_features(cpu, featurestr, &err);
68 g_free(str);
69 if (err != NULL) {
70 goto out;
71 }
72
73 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
74
75 out:
76 if (err != NULL) {
77 error_report_err(err);
78 object_unref(OBJECT(cpu));
79 return NULL;
80 }
81
82 return cpu;
83 }
84
85 bool cpu_paging_enabled(const CPUState *cpu)
86 {
87 CPUClass *cc = CPU_GET_CLASS(cpu);
88
89 return cc->get_paging_enabled(cpu);
90 }
91
92 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
93 {
94 return false;
95 }
96
97 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
98 Error **errp)
99 {
100 CPUClass *cc = CPU_GET_CLASS(cpu);
101
102 cc->get_memory_mapping(cpu, list, errp);
103 }
104
105 static void cpu_common_get_memory_mapping(CPUState *cpu,
106 MemoryMappingList *list,
107 Error **errp)
108 {
109 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
110 }
111
112 void cpu_reset_interrupt(CPUState *cpu, int mask)
113 {
114 cpu->interrupt_request &= ~mask;
115 }
116
117 void cpu_exit(CPUState *cpu)
118 {
119 cpu->exit_request = 1;
120 /* Ensure cpu_exec will see the exit request after TCG has exited. */
121 smp_wmb();
122 cpu->tcg_exit_req = 1;
123 }
124
125 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
126 void *opaque)
127 {
128 CPUClass *cc = CPU_GET_CLASS(cpu);
129
130 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
131 }
132
133 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
134 CPUState *cpu, void *opaque)
135 {
136 return 0;
137 }
138
139 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
140 int cpuid, void *opaque)
141 {
142 CPUClass *cc = CPU_GET_CLASS(cpu);
143
144 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
145 }
146
147 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
148 CPUState *cpu, int cpuid,
149 void *opaque)
150 {
151 return -1;
152 }
153
154 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
155 void *opaque)
156 {
157 CPUClass *cc = CPU_GET_CLASS(cpu);
158
159 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
160 }
161
162 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
163 CPUState *cpu, void *opaque)
164 {
165 return 0;
166 }
167
168 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
169 int cpuid, void *opaque)
170 {
171 CPUClass *cc = CPU_GET_CLASS(cpu);
172
173 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
174 }
175
176 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
177 CPUState *cpu, int cpuid,
178 void *opaque)
179 {
180 return -1;
181 }
182
183
184 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
185 {
186 return 0;
187 }
188
189 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
190 {
191 return 0;
192 }
193
194 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
195 {
196 /* If no extra check is required, QEMU watchpoint match can be considered
197 * as an architectural match.
198 */
199 return true;
200 }
201
202 bool target_words_bigendian(void);
203 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
204 {
205 return target_words_bigendian();
206 }
207
208 static void cpu_common_noop(CPUState *cpu)
209 {
210 }
211
212 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
213 {
214 return false;
215 }
216
217 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
218 int flags)
219 {
220 CPUClass *cc = CPU_GET_CLASS(cpu);
221
222 if (cc->dump_state) {
223 cpu_synchronize_state(cpu);
224 cc->dump_state(cpu, f, cpu_fprintf, flags);
225 }
226 }
227
228 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
229 int flags)
230 {
231 CPUClass *cc = CPU_GET_CLASS(cpu);
232
233 if (cc->dump_statistics) {
234 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
235 }
236 }
237
238 void cpu_reset(CPUState *cpu)
239 {
240 CPUClass *klass = CPU_GET_CLASS(cpu);
241
242 if (klass->reset != NULL) {
243 (*klass->reset)(cpu);
244 }
245 }
246
247 static void cpu_common_reset(CPUState *cpu)
248 {
249 CPUClass *cc = CPU_GET_CLASS(cpu);
250
251 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
252 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
253 log_cpu_state(cpu, cc->reset_dump_flags);
254 }
255
256 cpu->interrupt_request = 0;
257 cpu->halted = 0;
258 cpu->mem_io_pc = 0;
259 cpu->mem_io_vaddr = 0;
260 cpu->icount_extra = 0;
261 cpu->icount_decr.u32 = 0;
262 cpu->can_do_io = 1;
263 cpu->exception_index = -1;
264 cpu->crash_occurred = false;
265 memset(cpu->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *));
266 }
267
268 static bool cpu_common_has_work(CPUState *cs)
269 {
270 return false;
271 }
272
273 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
274 {
275 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
276
277 return cc->class_by_name(cpu_model);
278 }
279
280 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
281 {
282 return NULL;
283 }
284
285 static void cpu_common_parse_features(CPUState *cpu, char *features,
286 Error **errp)
287 {
288 char *featurestr; /* Single "key=value" string being parsed */
289 char *val;
290 Error *err = NULL;
291
292 featurestr = features ? strtok(features, ",") : NULL;
293
294 while (featurestr) {
295 val = strchr(featurestr, '=');
296 if (val) {
297 *val = 0;
298 val++;
299 object_property_parse(OBJECT(cpu), val, featurestr, &err);
300 if (err) {
301 error_propagate(errp, err);
302 return;
303 }
304 } else {
305 error_setg(errp, "Expected key=value format, found %s.",
306 featurestr);
307 return;
308 }
309 featurestr = strtok(NULL, ",");
310 }
311 }
312
313 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
314 {
315 CPUState *cpu = CPU(dev);
316
317 if (dev->hotplugged) {
318 cpu_synchronize_post_init(cpu);
319 cpu_resume(cpu);
320 }
321 }
322
323 static void cpu_common_initfn(Object *obj)
324 {
325 CPUState *cpu = CPU(obj);
326 CPUClass *cc = CPU_GET_CLASS(obj);
327
328 cpu->cpu_index = -1;
329 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
330 qemu_mutex_init(&cpu->work_mutex);
331 QTAILQ_INIT(&cpu->breakpoints);
332 QTAILQ_INIT(&cpu->watchpoints);
333 }
334
335 static void cpu_common_finalize(Object *obj)
336 {
337 cpu_exec_exit(CPU(obj));
338 }
339
340 static int64_t cpu_common_get_arch_id(CPUState *cpu)
341 {
342 return cpu->cpu_index;
343 }
344
345 static void cpu_class_init(ObjectClass *klass, void *data)
346 {
347 DeviceClass *dc = DEVICE_CLASS(klass);
348 CPUClass *k = CPU_CLASS(klass);
349
350 k->class_by_name = cpu_common_class_by_name;
351 k->parse_features = cpu_common_parse_features;
352 k->reset = cpu_common_reset;
353 k->get_arch_id = cpu_common_get_arch_id;
354 k->has_work = cpu_common_has_work;
355 k->get_paging_enabled = cpu_common_get_paging_enabled;
356 k->get_memory_mapping = cpu_common_get_memory_mapping;
357 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
358 k->write_elf32_note = cpu_common_write_elf32_note;
359 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
360 k->write_elf64_note = cpu_common_write_elf64_note;
361 k->gdb_read_register = cpu_common_gdb_read_register;
362 k->gdb_write_register = cpu_common_gdb_write_register;
363 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
364 k->debug_excp_handler = cpu_common_noop;
365 k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
366 k->cpu_exec_enter = cpu_common_noop;
367 k->cpu_exec_exit = cpu_common_noop;
368 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
369 dc->realize = cpu_common_realizefn;
370 /*
371 * Reason: CPUs still need special care by board code: wiring up
372 * IRQs, adding reset handlers, halting non-first CPUs, ...
373 */
374 dc->cannot_instantiate_with_device_add_yet = true;
375 }
376
377 static const TypeInfo cpu_type_info = {
378 .name = TYPE_CPU,
379 .parent = TYPE_DEVICE,
380 .instance_size = sizeof(CPUState),
381 .instance_init = cpu_common_initfn,
382 .instance_finalize = cpu_common_finalize,
383 .abstract = true,
384 .class_size = sizeof(CPUClass),
385 .class_init = cpu_class_init,
386 };
387
388 static void cpu_register_types(void)
389 {
390 type_register_static(&cpu_type_info);
391 }
392
393 type_init(cpu_register_types)