kvm: add support for hyper-v timers
[qemu.git] / target-i386 / machine.c
1 #include "hw/hw.h"
2 #include "hw/boards.h"
3 #include "hw/i386/pc.h"
4 #include "hw/isa/isa.h"
5
6 #include "cpu.h"
7 #include "sysemu/kvm.h"
8
9 static const VMStateDescription vmstate_segment = {
10 .name = "segment",
11 .version_id = 1,
12 .minimum_version_id = 1,
13 .minimum_version_id_old = 1,
14 .fields = (VMStateField []) {
15 VMSTATE_UINT32(selector, SegmentCache),
16 VMSTATE_UINTTL(base, SegmentCache),
17 VMSTATE_UINT32(limit, SegmentCache),
18 VMSTATE_UINT32(flags, SegmentCache),
19 VMSTATE_END_OF_LIST()
20 }
21 };
22
23 #define VMSTATE_SEGMENT(_field, _state) { \
24 .name = (stringify(_field)), \
25 .size = sizeof(SegmentCache), \
26 .vmsd = &vmstate_segment, \
27 .flags = VMS_STRUCT, \
28 .offset = offsetof(_state, _field) \
29 + type_check(SegmentCache,typeof_field(_state, _field)) \
30 }
31
32 #define VMSTATE_SEGMENT_ARRAY(_field, _state, _n) \
33 VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
34
35 static const VMStateDescription vmstate_xmm_reg = {
36 .name = "xmm_reg",
37 .version_id = 1,
38 .minimum_version_id = 1,
39 .minimum_version_id_old = 1,
40 .fields = (VMStateField []) {
41 VMSTATE_UINT64(XMM_Q(0), XMMReg),
42 VMSTATE_UINT64(XMM_Q(1), XMMReg),
43 VMSTATE_END_OF_LIST()
44 }
45 };
46
47 #define VMSTATE_XMM_REGS(_field, _state, _n) \
48 VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
49
50 /* YMMH format is the same as XMM */
51 static const VMStateDescription vmstate_ymmh_reg = {
52 .name = "ymmh_reg",
53 .version_id = 1,
54 .minimum_version_id = 1,
55 .minimum_version_id_old = 1,
56 .fields = (VMStateField []) {
57 VMSTATE_UINT64(XMM_Q(0), XMMReg),
58 VMSTATE_UINT64(XMM_Q(1), XMMReg),
59 VMSTATE_END_OF_LIST()
60 }
61 };
62
63 #define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v) \
64 VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)
65
66 static const VMStateDescription vmstate_bnd_regs = {
67 .name = "bnd_regs",
68 .version_id = 1,
69 .minimum_version_id = 1,
70 .minimum_version_id_old = 1,
71 .fields = (VMStateField[]) {
72 VMSTATE_UINT64(lb, BNDReg),
73 VMSTATE_UINT64(ub, BNDReg),
74 VMSTATE_END_OF_LIST()
75 }
76 };
77
78 #define VMSTATE_BND_REGS(_field, _state, _n) \
79 VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_bnd_regs, BNDReg)
80
81 static const VMStateDescription vmstate_mtrr_var = {
82 .name = "mtrr_var",
83 .version_id = 1,
84 .minimum_version_id = 1,
85 .minimum_version_id_old = 1,
86 .fields = (VMStateField []) {
87 VMSTATE_UINT64(base, MTRRVar),
88 VMSTATE_UINT64(mask, MTRRVar),
89 VMSTATE_END_OF_LIST()
90 }
91 };
92
93 #define VMSTATE_MTRR_VARS(_field, _state, _n, _v) \
94 VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)
95
96 static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size)
97 {
98 fprintf(stderr, "call put_fpreg() with invalid arguments\n");
99 exit(0);
100 }
101
102 /* XXX: add that in a FPU generic layer */
103 union x86_longdouble {
104 uint64_t mant;
105 uint16_t exp;
106 };
107
108 #define MANTD1(fp) (fp & ((1LL << 52) - 1))
109 #define EXPBIAS1 1023
110 #define EXPD1(fp) ((fp >> 52) & 0x7FF)
111 #define SIGND1(fp) ((fp >> 32) & 0x80000000)
112
113 static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
114 {
115 int e;
116 /* mantissa */
117 p->mant = (MANTD1(temp) << 11) | (1LL << 63);
118 /* exponent + sign */
119 e = EXPD1(temp) - EXPBIAS1 + 16383;
120 e |= SIGND1(temp) >> 16;
121 p->exp = e;
122 }
123
124 static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
125 {
126 FPReg *fp_reg = opaque;
127 uint64_t mant;
128 uint16_t exp;
129
130 qemu_get_be64s(f, &mant);
131 qemu_get_be16s(f, &exp);
132 fp_reg->d = cpu_set_fp80(mant, exp);
133 return 0;
134 }
135
136 static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
137 {
138 FPReg *fp_reg = opaque;
139 uint64_t mant;
140 uint16_t exp;
141 /* we save the real CPU data (in case of MMX usage only 'mant'
142 contains the MMX register */
143 cpu_get_fp80(&mant, &exp, fp_reg->d);
144 qemu_put_be64s(f, &mant);
145 qemu_put_be16s(f, &exp);
146 }
147
148 static const VMStateInfo vmstate_fpreg = {
149 .name = "fpreg",
150 .get = get_fpreg,
151 .put = put_fpreg,
152 };
153
154 static int get_fpreg_1_mmx(QEMUFile *f, void *opaque, size_t size)
155 {
156 union x86_longdouble *p = opaque;
157 uint64_t mant;
158
159 qemu_get_be64s(f, &mant);
160 p->mant = mant;
161 p->exp = 0xffff;
162 return 0;
163 }
164
165 static const VMStateInfo vmstate_fpreg_1_mmx = {
166 .name = "fpreg_1_mmx",
167 .get = get_fpreg_1_mmx,
168 .put = put_fpreg_error,
169 };
170
171 static int get_fpreg_1_no_mmx(QEMUFile *f, void *opaque, size_t size)
172 {
173 union x86_longdouble *p = opaque;
174 uint64_t mant;
175
176 qemu_get_be64s(f, &mant);
177 fp64_to_fp80(p, mant);
178 return 0;
179 }
180
181 static const VMStateInfo vmstate_fpreg_1_no_mmx = {
182 .name = "fpreg_1_no_mmx",
183 .get = get_fpreg_1_no_mmx,
184 .put = put_fpreg_error,
185 };
186
187 static bool fpregs_is_0(void *opaque, int version_id)
188 {
189 X86CPU *cpu = opaque;
190 CPUX86State *env = &cpu->env;
191
192 return (env->fpregs_format_vmstate == 0);
193 }
194
195 static bool fpregs_is_1_mmx(void *opaque, int version_id)
196 {
197 X86CPU *cpu = opaque;
198 CPUX86State *env = &cpu->env;
199 int guess_mmx;
200
201 guess_mmx = ((env->fptag_vmstate == 0xff) &&
202 (env->fpus_vmstate & 0x3800) == 0);
203 return (guess_mmx && (env->fpregs_format_vmstate == 1));
204 }
205
206 static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
207 {
208 X86CPU *cpu = opaque;
209 CPUX86State *env = &cpu->env;
210 int guess_mmx;
211
212 guess_mmx = ((env->fptag_vmstate == 0xff) &&
213 (env->fpus_vmstate & 0x3800) == 0);
214 return (!guess_mmx && (env->fpregs_format_vmstate == 1));
215 }
216
217 #define VMSTATE_FP_REGS(_field, _state, _n) \
218 VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
219 VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
220 VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)
221
222 static bool version_is_5(void *opaque, int version_id)
223 {
224 return version_id == 5;
225 }
226
227 #ifdef TARGET_X86_64
228 static bool less_than_7(void *opaque, int version_id)
229 {
230 return version_id < 7;
231 }
232
233 static int get_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
234 {
235 uint64_t *v = pv;
236 *v = qemu_get_be32(f);
237 return 0;
238 }
239
240 static void put_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
241 {
242 uint64_t *v = pv;
243 qemu_put_be32(f, *v);
244 }
245
246 static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
247 .name = "uint64_as_uint32",
248 .get = get_uint64_as_uint32,
249 .put = put_uint64_as_uint32,
250 };
251
252 #define VMSTATE_HACK_UINT32(_f, _s, _t) \
253 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
254 #endif
255
256 static void cpu_pre_save(void *opaque)
257 {
258 X86CPU *cpu = opaque;
259 CPUX86State *env = &cpu->env;
260 int i;
261
262 /* FPU */
263 env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
264 env->fptag_vmstate = 0;
265 for(i = 0; i < 8; i++) {
266 env->fptag_vmstate |= ((!env->fptags[i]) << i);
267 }
268
269 env->fpregs_format_vmstate = 0;
270
271 /*
272 * Real mode guest segments register DPL should be zero.
273 * Older KVM version were setting it wrongly.
274 * Fixing it will allow live migration to host with unrestricted guest
275 * support (otherwise the migration will fail with invalid guest state
276 * error).
277 */
278 if (!(env->cr[0] & CR0_PE_MASK) &&
279 (env->segs[R_CS].flags >> DESC_DPL_SHIFT & 3) != 0) {
280 env->segs[R_CS].flags &= ~(env->segs[R_CS].flags & DESC_DPL_MASK);
281 env->segs[R_DS].flags &= ~(env->segs[R_DS].flags & DESC_DPL_MASK);
282 env->segs[R_ES].flags &= ~(env->segs[R_ES].flags & DESC_DPL_MASK);
283 env->segs[R_FS].flags &= ~(env->segs[R_FS].flags & DESC_DPL_MASK);
284 env->segs[R_GS].flags &= ~(env->segs[R_GS].flags & DESC_DPL_MASK);
285 env->segs[R_SS].flags &= ~(env->segs[R_SS].flags & DESC_DPL_MASK);
286 }
287
288 }
289
290 static int cpu_post_load(void *opaque, int version_id)
291 {
292 X86CPU *cpu = opaque;
293 CPUX86State *env = &cpu->env;
294 int i;
295
296 /*
297 * Real mode guest segments register DPL should be zero.
298 * Older KVM version were setting it wrongly.
299 * Fixing it will allow live migration from such host that don't have
300 * restricted guest support to a host with unrestricted guest support
301 * (otherwise the migration will fail with invalid guest state
302 * error).
303 */
304 if (!(env->cr[0] & CR0_PE_MASK) &&
305 (env->segs[R_CS].flags >> DESC_DPL_SHIFT & 3) != 0) {
306 env->segs[R_CS].flags &= ~(env->segs[R_CS].flags & DESC_DPL_MASK);
307 env->segs[R_DS].flags &= ~(env->segs[R_DS].flags & DESC_DPL_MASK);
308 env->segs[R_ES].flags &= ~(env->segs[R_ES].flags & DESC_DPL_MASK);
309 env->segs[R_FS].flags &= ~(env->segs[R_FS].flags & DESC_DPL_MASK);
310 env->segs[R_GS].flags &= ~(env->segs[R_GS].flags & DESC_DPL_MASK);
311 env->segs[R_SS].flags &= ~(env->segs[R_SS].flags & DESC_DPL_MASK);
312 }
313
314 /* XXX: restore FPU round state */
315 env->fpstt = (env->fpus_vmstate >> 11) & 7;
316 env->fpus = env->fpus_vmstate & ~0x3800;
317 env->fptag_vmstate ^= 0xff;
318 for(i = 0; i < 8; i++) {
319 env->fptags[i] = (env->fptag_vmstate >> i) & 1;
320 }
321
322 cpu_breakpoint_remove_all(env, BP_CPU);
323 cpu_watchpoint_remove_all(env, BP_CPU);
324 for (i = 0; i < DR7_MAX_BP; i++) {
325 hw_breakpoint_insert(env, i);
326 }
327 tlb_flush(env, 1);
328
329 return 0;
330 }
331
332 static bool async_pf_msr_needed(void *opaque)
333 {
334 X86CPU *cpu = opaque;
335
336 return cpu->env.async_pf_en_msr != 0;
337 }
338
339 static bool pv_eoi_msr_needed(void *opaque)
340 {
341 X86CPU *cpu = opaque;
342
343 return cpu->env.pv_eoi_en_msr != 0;
344 }
345
346 static bool steal_time_msr_needed(void *opaque)
347 {
348 X86CPU *cpu = opaque;
349
350 return cpu->env.steal_time_msr != 0;
351 }
352
353 static const VMStateDescription vmstate_steal_time_msr = {
354 .name = "cpu/steal_time_msr",
355 .version_id = 1,
356 .minimum_version_id = 1,
357 .minimum_version_id_old = 1,
358 .fields = (VMStateField []) {
359 VMSTATE_UINT64(env.steal_time_msr, X86CPU),
360 VMSTATE_END_OF_LIST()
361 }
362 };
363
364 static const VMStateDescription vmstate_async_pf_msr = {
365 .name = "cpu/async_pf_msr",
366 .version_id = 1,
367 .minimum_version_id = 1,
368 .minimum_version_id_old = 1,
369 .fields = (VMStateField []) {
370 VMSTATE_UINT64(env.async_pf_en_msr, X86CPU),
371 VMSTATE_END_OF_LIST()
372 }
373 };
374
375 static const VMStateDescription vmstate_pv_eoi_msr = {
376 .name = "cpu/async_pv_eoi_msr",
377 .version_id = 1,
378 .minimum_version_id = 1,
379 .minimum_version_id_old = 1,
380 .fields = (VMStateField []) {
381 VMSTATE_UINT64(env.pv_eoi_en_msr, X86CPU),
382 VMSTATE_END_OF_LIST()
383 }
384 };
385
386 static bool fpop_ip_dp_needed(void *opaque)
387 {
388 X86CPU *cpu = opaque;
389 CPUX86State *env = &cpu->env;
390
391 return env->fpop != 0 || env->fpip != 0 || env->fpdp != 0;
392 }
393
394 static const VMStateDescription vmstate_fpop_ip_dp = {
395 .name = "cpu/fpop_ip_dp",
396 .version_id = 1,
397 .minimum_version_id = 1,
398 .minimum_version_id_old = 1,
399 .fields = (VMStateField []) {
400 VMSTATE_UINT16(env.fpop, X86CPU),
401 VMSTATE_UINT64(env.fpip, X86CPU),
402 VMSTATE_UINT64(env.fpdp, X86CPU),
403 VMSTATE_END_OF_LIST()
404 }
405 };
406
407 static bool tsc_adjust_needed(void *opaque)
408 {
409 X86CPU *cpu = opaque;
410 CPUX86State *env = &cpu->env;
411
412 return env->tsc_adjust != 0;
413 }
414
415 static const VMStateDescription vmstate_msr_tsc_adjust = {
416 .name = "cpu/msr_tsc_adjust",
417 .version_id = 1,
418 .minimum_version_id = 1,
419 .minimum_version_id_old = 1,
420 .fields = (VMStateField[]) {
421 VMSTATE_UINT64(env.tsc_adjust, X86CPU),
422 VMSTATE_END_OF_LIST()
423 }
424 };
425
426 static bool tscdeadline_needed(void *opaque)
427 {
428 X86CPU *cpu = opaque;
429 CPUX86State *env = &cpu->env;
430
431 return env->tsc_deadline != 0;
432 }
433
434 static const VMStateDescription vmstate_msr_tscdeadline = {
435 .name = "cpu/msr_tscdeadline",
436 .version_id = 1,
437 .minimum_version_id = 1,
438 .minimum_version_id_old = 1,
439 .fields = (VMStateField []) {
440 VMSTATE_UINT64(env.tsc_deadline, X86CPU),
441 VMSTATE_END_OF_LIST()
442 }
443 };
444
445 static bool misc_enable_needed(void *opaque)
446 {
447 X86CPU *cpu = opaque;
448 CPUX86State *env = &cpu->env;
449
450 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT;
451 }
452
453 static bool feature_control_needed(void *opaque)
454 {
455 X86CPU *cpu = opaque;
456 CPUX86State *env = &cpu->env;
457
458 return env->msr_ia32_feature_control != 0;
459 }
460
461 static const VMStateDescription vmstate_msr_ia32_misc_enable = {
462 .name = "cpu/msr_ia32_misc_enable",
463 .version_id = 1,
464 .minimum_version_id = 1,
465 .minimum_version_id_old = 1,
466 .fields = (VMStateField []) {
467 VMSTATE_UINT64(env.msr_ia32_misc_enable, X86CPU),
468 VMSTATE_END_OF_LIST()
469 }
470 };
471
472 static const VMStateDescription vmstate_msr_ia32_feature_control = {
473 .name = "cpu/msr_ia32_feature_control",
474 .version_id = 1,
475 .minimum_version_id = 1,
476 .minimum_version_id_old = 1,
477 .fields = (VMStateField []) {
478 VMSTATE_UINT64(env.msr_ia32_feature_control, X86CPU),
479 VMSTATE_END_OF_LIST()
480 }
481 };
482
483 static bool pmu_enable_needed(void *opaque)
484 {
485 X86CPU *cpu = opaque;
486 CPUX86State *env = &cpu->env;
487 int i;
488
489 if (env->msr_fixed_ctr_ctrl || env->msr_global_ctrl ||
490 env->msr_global_status || env->msr_global_ovf_ctrl) {
491 return true;
492 }
493 for (i = 0; i < MAX_FIXED_COUNTERS; i++) {
494 if (env->msr_fixed_counters[i]) {
495 return true;
496 }
497 }
498 for (i = 0; i < MAX_GP_COUNTERS; i++) {
499 if (env->msr_gp_counters[i] || env->msr_gp_evtsel[i]) {
500 return true;
501 }
502 }
503
504 return false;
505 }
506
507 static const VMStateDescription vmstate_msr_architectural_pmu = {
508 .name = "cpu/msr_architectural_pmu",
509 .version_id = 1,
510 .minimum_version_id = 1,
511 .minimum_version_id_old = 1,
512 .fields = (VMStateField []) {
513 VMSTATE_UINT64(env.msr_fixed_ctr_ctrl, X86CPU),
514 VMSTATE_UINT64(env.msr_global_ctrl, X86CPU),
515 VMSTATE_UINT64(env.msr_global_status, X86CPU),
516 VMSTATE_UINT64(env.msr_global_ovf_ctrl, X86CPU),
517 VMSTATE_UINT64_ARRAY(env.msr_fixed_counters, X86CPU, MAX_FIXED_COUNTERS),
518 VMSTATE_UINT64_ARRAY(env.msr_gp_counters, X86CPU, MAX_GP_COUNTERS),
519 VMSTATE_UINT64_ARRAY(env.msr_gp_evtsel, X86CPU, MAX_GP_COUNTERS),
520 VMSTATE_END_OF_LIST()
521 }
522 };
523
524 static bool mpx_needed(void *opaque)
525 {
526 X86CPU *cpu = opaque;
527 CPUX86State *env = &cpu->env;
528 unsigned int i;
529
530 for (i = 0; i < 4; i++) {
531 if (env->bnd_regs[i].lb || env->bnd_regs[i].ub) {
532 return true;
533 }
534 }
535
536 if (env->bndcs_regs.cfgu || env->bndcs_regs.sts) {
537 return true;
538 }
539
540 return !!env->msr_bndcfgs;
541 }
542
543 static const VMStateDescription vmstate_mpx = {
544 .name = "cpu/mpx",
545 .version_id = 1,
546 .minimum_version_id = 1,
547 .minimum_version_id_old = 1,
548 .fields = (VMStateField[]) {
549 VMSTATE_BND_REGS(env.bnd_regs, X86CPU, 4),
550 VMSTATE_UINT64(env.bndcs_regs.cfgu, X86CPU),
551 VMSTATE_UINT64(env.bndcs_regs.sts, X86CPU),
552 VMSTATE_UINT64(env.msr_bndcfgs, X86CPU),
553 VMSTATE_END_OF_LIST()
554 }
555 };
556
557 static bool hyperv_hypercall_enable_needed(void *opaque)
558 {
559 X86CPU *cpu = opaque;
560 CPUX86State *env = &cpu->env;
561
562 return env->msr_hv_hypercall != 0 || env->msr_hv_guest_os_id != 0;
563 }
564
565 static const VMStateDescription vmstate_msr_hypercall_hypercall = {
566 .name = "cpu/msr_hyperv_hypercall",
567 .version_id = 1,
568 .minimum_version_id = 1,
569 .minimum_version_id_old = 1,
570 .fields = (VMStateField []) {
571 VMSTATE_UINT64(env.msr_hv_hypercall, X86CPU),
572 VMSTATE_UINT64(env.msr_hv_guest_os_id, X86CPU),
573 VMSTATE_END_OF_LIST()
574 }
575 };
576
577 static bool hyperv_vapic_enable_needed(void *opaque)
578 {
579 X86CPU *cpu = opaque;
580 CPUX86State *env = &cpu->env;
581
582 return env->msr_hv_vapic != 0;
583 }
584
585 static const VMStateDescription vmstate_msr_hyperv_vapic = {
586 .name = "cpu/msr_hyperv_vapic",
587 .version_id = 1,
588 .minimum_version_id = 1,
589 .minimum_version_id_old = 1,
590 .fields = (VMStateField []) {
591 VMSTATE_UINT64(env.msr_hv_vapic, X86CPU),
592 VMSTATE_END_OF_LIST()
593 }
594 };
595
596 static bool hyperv_time_enable_needed(void *opaque)
597 {
598 X86CPU *cpu = opaque;
599 CPUX86State *env = &cpu->env;
600
601 return env->msr_hv_tsc != 0;
602 }
603
604 static const VMStateDescription vmstate_msr_hyperv_time = {
605 .name = "cpu/msr_hyperv_time",
606 .version_id = 1,
607 .minimum_version_id = 1,
608 .minimum_version_id_old = 1,
609 .fields = (VMStateField []) {
610 VMSTATE_UINT64(env.msr_hv_tsc, X86CPU),
611 VMSTATE_END_OF_LIST()
612 }
613 };
614
615 const VMStateDescription vmstate_x86_cpu = {
616 .name = "cpu",
617 .version_id = 12,
618 .minimum_version_id = 3,
619 .minimum_version_id_old = 3,
620 .pre_save = cpu_pre_save,
621 .post_load = cpu_post_load,
622 .fields = (VMStateField []) {
623 VMSTATE_UINTTL_ARRAY(env.regs, X86CPU, CPU_NB_REGS),
624 VMSTATE_UINTTL(env.eip, X86CPU),
625 VMSTATE_UINTTL(env.eflags, X86CPU),
626 VMSTATE_UINT32(env.hflags, X86CPU),
627 /* FPU */
628 VMSTATE_UINT16(env.fpuc, X86CPU),
629 VMSTATE_UINT16(env.fpus_vmstate, X86CPU),
630 VMSTATE_UINT16(env.fptag_vmstate, X86CPU),
631 VMSTATE_UINT16(env.fpregs_format_vmstate, X86CPU),
632 VMSTATE_FP_REGS(env.fpregs, X86CPU, 8),
633
634 VMSTATE_SEGMENT_ARRAY(env.segs, X86CPU, 6),
635 VMSTATE_SEGMENT(env.ldt, X86CPU),
636 VMSTATE_SEGMENT(env.tr, X86CPU),
637 VMSTATE_SEGMENT(env.gdt, X86CPU),
638 VMSTATE_SEGMENT(env.idt, X86CPU),
639
640 VMSTATE_UINT32(env.sysenter_cs, X86CPU),
641 #ifdef TARGET_X86_64
642 /* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
643 VMSTATE_HACK_UINT32(env.sysenter_esp, X86CPU, less_than_7),
644 VMSTATE_HACK_UINT32(env.sysenter_eip, X86CPU, less_than_7),
645 VMSTATE_UINTTL_V(env.sysenter_esp, X86CPU, 7),
646 VMSTATE_UINTTL_V(env.sysenter_eip, X86CPU, 7),
647 #else
648 VMSTATE_UINTTL(env.sysenter_esp, X86CPU),
649 VMSTATE_UINTTL(env.sysenter_eip, X86CPU),
650 #endif
651
652 VMSTATE_UINTTL(env.cr[0], X86CPU),
653 VMSTATE_UINTTL(env.cr[2], X86CPU),
654 VMSTATE_UINTTL(env.cr[3], X86CPU),
655 VMSTATE_UINTTL(env.cr[4], X86CPU),
656 VMSTATE_UINTTL_ARRAY(env.dr, X86CPU, 8),
657 /* MMU */
658 VMSTATE_INT32(env.a20_mask, X86CPU),
659 /* XMM */
660 VMSTATE_UINT32(env.mxcsr, X86CPU),
661 VMSTATE_XMM_REGS(env.xmm_regs, X86CPU, CPU_NB_REGS),
662
663 #ifdef TARGET_X86_64
664 VMSTATE_UINT64(env.efer, X86CPU),
665 VMSTATE_UINT64(env.star, X86CPU),
666 VMSTATE_UINT64(env.lstar, X86CPU),
667 VMSTATE_UINT64(env.cstar, X86CPU),
668 VMSTATE_UINT64(env.fmask, X86CPU),
669 VMSTATE_UINT64(env.kernelgsbase, X86CPU),
670 #endif
671 VMSTATE_UINT32_V(env.smbase, X86CPU, 4),
672
673 VMSTATE_UINT64_V(env.pat, X86CPU, 5),
674 VMSTATE_UINT32_V(env.hflags2, X86CPU, 5),
675
676 VMSTATE_UINT32_TEST(parent_obj.halted, X86CPU, version_is_5),
677 VMSTATE_UINT64_V(env.vm_hsave, X86CPU, 5),
678 VMSTATE_UINT64_V(env.vm_vmcb, X86CPU, 5),
679 VMSTATE_UINT64_V(env.tsc_offset, X86CPU, 5),
680 VMSTATE_UINT64_V(env.intercept, X86CPU, 5),
681 VMSTATE_UINT16_V(env.intercept_cr_read, X86CPU, 5),
682 VMSTATE_UINT16_V(env.intercept_cr_write, X86CPU, 5),
683 VMSTATE_UINT16_V(env.intercept_dr_read, X86CPU, 5),
684 VMSTATE_UINT16_V(env.intercept_dr_write, X86CPU, 5),
685 VMSTATE_UINT32_V(env.intercept_exceptions, X86CPU, 5),
686 VMSTATE_UINT8_V(env.v_tpr, X86CPU, 5),
687 /* MTRRs */
688 VMSTATE_UINT64_ARRAY_V(env.mtrr_fixed, X86CPU, 11, 8),
689 VMSTATE_UINT64_V(env.mtrr_deftype, X86CPU, 8),
690 VMSTATE_MTRR_VARS(env.mtrr_var, X86CPU, 8, 8),
691 /* KVM-related states */
692 VMSTATE_INT32_V(env.interrupt_injected, X86CPU, 9),
693 VMSTATE_UINT32_V(env.mp_state, X86CPU, 9),
694 VMSTATE_UINT64_V(env.tsc, X86CPU, 9),
695 VMSTATE_INT32_V(env.exception_injected, X86CPU, 11),
696 VMSTATE_UINT8_V(env.soft_interrupt, X86CPU, 11),
697 VMSTATE_UINT8_V(env.nmi_injected, X86CPU, 11),
698 VMSTATE_UINT8_V(env.nmi_pending, X86CPU, 11),
699 VMSTATE_UINT8_V(env.has_error_code, X86CPU, 11),
700 VMSTATE_UINT32_V(env.sipi_vector, X86CPU, 11),
701 /* MCE */
702 VMSTATE_UINT64_V(env.mcg_cap, X86CPU, 10),
703 VMSTATE_UINT64_V(env.mcg_status, X86CPU, 10),
704 VMSTATE_UINT64_V(env.mcg_ctl, X86CPU, 10),
705 VMSTATE_UINT64_ARRAY_V(env.mce_banks, X86CPU, MCE_BANKS_DEF * 4, 10),
706 /* rdtscp */
707 VMSTATE_UINT64_V(env.tsc_aux, X86CPU, 11),
708 /* KVM pvclock msr */
709 VMSTATE_UINT64_V(env.system_time_msr, X86CPU, 11),
710 VMSTATE_UINT64_V(env.wall_clock_msr, X86CPU, 11),
711 /* XSAVE related fields */
712 VMSTATE_UINT64_V(env.xcr0, X86CPU, 12),
713 VMSTATE_UINT64_V(env.xstate_bv, X86CPU, 12),
714 VMSTATE_YMMH_REGS_VARS(env.ymmh_regs, X86CPU, CPU_NB_REGS, 12),
715 VMSTATE_END_OF_LIST()
716 /* The above list is not sorted /wrt version numbers, watch out! */
717 },
718 .subsections = (VMStateSubsection []) {
719 {
720 .vmsd = &vmstate_async_pf_msr,
721 .needed = async_pf_msr_needed,
722 } , {
723 .vmsd = &vmstate_pv_eoi_msr,
724 .needed = pv_eoi_msr_needed,
725 } , {
726 .vmsd = &vmstate_steal_time_msr,
727 .needed = steal_time_msr_needed,
728 } , {
729 .vmsd = &vmstate_fpop_ip_dp,
730 .needed = fpop_ip_dp_needed,
731 }, {
732 .vmsd = &vmstate_msr_tsc_adjust,
733 .needed = tsc_adjust_needed,
734 }, {
735 .vmsd = &vmstate_msr_tscdeadline,
736 .needed = tscdeadline_needed,
737 }, {
738 .vmsd = &vmstate_msr_ia32_misc_enable,
739 .needed = misc_enable_needed,
740 }, {
741 .vmsd = &vmstate_msr_ia32_feature_control,
742 .needed = feature_control_needed,
743 }, {
744 .vmsd = &vmstate_msr_architectural_pmu,
745 .needed = pmu_enable_needed,
746 } , {
747 .vmsd = &vmstate_mpx,
748 .needed = mpx_needed,
749 }, {
750 .vmsd = &vmstate_msr_hypercall_hypercall,
751 .needed = hyperv_hypercall_enable_needed,
752 }, {
753 .vmsd = &vmstate_msr_hyperv_vapic,
754 .needed = hyperv_vapic_enable_needed,
755 }, {
756 .vmsd = &vmstate_msr_hyperv_time,
757 .needed = hyperv_time_enable_needed,
758 } , {
759 /* empty */
760 }
761 }
762 };