vmsvga: don't process more than 1024 fifo commands at once
[qemu.git] / target-i386 / mem_helper.c
1 /*
2 * x86 memory access helpers
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "exec/helper-proto.h"
23 #include "exec/exec-all.h"
24 #include "exec/cpu_ldst.h"
25
26 /* broken thread support */
27
28 #if defined(CONFIG_USER_ONLY)
29 QemuMutex global_cpu_lock;
30
31 void helper_lock(void)
32 {
33 qemu_mutex_lock(&global_cpu_lock);
34 }
35
36 void helper_unlock(void)
37 {
38 qemu_mutex_unlock(&global_cpu_lock);
39 }
40
41 void helper_lock_init(void)
42 {
43 qemu_mutex_init(&global_cpu_lock);
44 }
45 #else
46 void helper_lock(void)
47 {
48 }
49
50 void helper_unlock(void)
51 {
52 }
53
54 void helper_lock_init(void)
55 {
56 }
57 #endif
58
59 void helper_cmpxchg8b(CPUX86State *env, target_ulong a0)
60 {
61 uint64_t d;
62 int eflags;
63
64 eflags = cpu_cc_compute_all(env, CC_OP);
65 d = cpu_ldq_data_ra(env, a0, GETPC());
66 if (d == (((uint64_t)env->regs[R_EDX] << 32) | (uint32_t)env->regs[R_EAX])) {
67 cpu_stq_data_ra(env, a0, ((uint64_t)env->regs[R_ECX] << 32)
68 | (uint32_t)env->regs[R_EBX], GETPC());
69 eflags |= CC_Z;
70 } else {
71 /* always do the store */
72 cpu_stq_data_ra(env, a0, d, GETPC());
73 env->regs[R_EDX] = (uint32_t)(d >> 32);
74 env->regs[R_EAX] = (uint32_t)d;
75 eflags &= ~CC_Z;
76 }
77 CC_SRC = eflags;
78 }
79
80 #ifdef TARGET_X86_64
81 void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
82 {
83 uint64_t d0, d1;
84 int eflags;
85
86 if ((a0 & 0xf) != 0) {
87 raise_exception_ra(env, EXCP0D_GPF, GETPC());
88 }
89 eflags = cpu_cc_compute_all(env, CC_OP);
90 d0 = cpu_ldq_data_ra(env, a0, GETPC());
91 d1 = cpu_ldq_data_ra(env, a0 + 8, GETPC());
92 if (d0 == env->regs[R_EAX] && d1 == env->regs[R_EDX]) {
93 cpu_stq_data_ra(env, a0, env->regs[R_EBX], GETPC());
94 cpu_stq_data_ra(env, a0 + 8, env->regs[R_ECX], GETPC());
95 eflags |= CC_Z;
96 } else {
97 /* always do the store */
98 cpu_stq_data_ra(env, a0, d0, GETPC());
99 cpu_stq_data_ra(env, a0 + 8, d1, GETPC());
100 env->regs[R_EDX] = d1;
101 env->regs[R_EAX] = d0;
102 eflags &= ~CC_Z;
103 }
104 CC_SRC = eflags;
105 }
106 #endif
107
108 void helper_boundw(CPUX86State *env, target_ulong a0, int v)
109 {
110 int low, high;
111
112 low = cpu_ldsw_data_ra(env, a0, GETPC());
113 high = cpu_ldsw_data_ra(env, a0 + 2, GETPC());
114 v = (int16_t)v;
115 if (v < low || v > high) {
116 if (env->hflags & HF_MPX_EN_MASK) {
117 env->bndcs_regs.sts = 0;
118 }
119 raise_exception_ra(env, EXCP05_BOUND, GETPC());
120 }
121 }
122
123 void helper_boundl(CPUX86State *env, target_ulong a0, int v)
124 {
125 int low, high;
126
127 low = cpu_ldl_data_ra(env, a0, GETPC());
128 high = cpu_ldl_data_ra(env, a0 + 4, GETPC());
129 if (v < low || v > high) {
130 if (env->hflags & HF_MPX_EN_MASK) {
131 env->bndcs_regs.sts = 0;
132 }
133 raise_exception_ra(env, EXCP05_BOUND, GETPC());
134 }
135 }
136
137 #if !defined(CONFIG_USER_ONLY)
138 /* try to fill the TLB and return an exception if error. If retaddr is
139 * NULL, it means that the function was called in C code (i.e. not
140 * from generated code or from helper.c)
141 */
142 /* XXX: fix it to restore all registers */
143 void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
144 uintptr_t retaddr)
145 {
146 int ret;
147
148 ret = x86_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
149 if (ret) {
150 X86CPU *cpu = X86_CPU(cs);
151 CPUX86State *env = &cpu->env;
152
153 raise_exception_err_ra(env, cs->exception_index, env->error_code, retaddr);
154 }
155 }
156 #endif