vmsvga: don't process more than 1024 fifo commands at once
[qemu.git] / target-i386 / mpx_helper.c
1 /*
2 * x86 MPX helpers
3 *
4 * Copyright (c) 2015 Red Hat, Inc.
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "exec/helper-proto.h"
23 #include "exec/cpu_ldst.h"
24 #include "exec/exec-all.h"
25
26
27 void cpu_sync_bndcs_hflags(CPUX86State *env)
28 {
29 uint32_t hflags = env->hflags;
30 uint32_t hflags2 = env->hflags2;
31 uint32_t bndcsr;
32
33 if ((hflags & HF_CPL_MASK) == 3) {
34 bndcsr = env->bndcs_regs.cfgu;
35 } else {
36 bndcsr = env->msr_bndcfgs;
37 }
38
39 if ((env->cr[4] & CR4_OSXSAVE_MASK)
40 && (env->xcr0 & XSTATE_BNDCSR_MASK)
41 && (bndcsr & BNDCFG_ENABLE)) {
42 hflags |= HF_MPX_EN_MASK;
43 } else {
44 hflags &= ~HF_MPX_EN_MASK;
45 }
46
47 if (bndcsr & BNDCFG_BNDPRESERVE) {
48 hflags2 |= HF2_MPX_PR_MASK;
49 } else {
50 hflags2 &= ~HF2_MPX_PR_MASK;
51 }
52
53 env->hflags = hflags;
54 env->hflags2 = hflags2;
55 }
56
57 void helper_bndck(CPUX86State *env, uint32_t fail)
58 {
59 if (unlikely(fail)) {
60 env->bndcs_regs.sts = 1;
61 raise_exception_ra(env, EXCP05_BOUND, GETPC());
62 }
63 }
64
65 static uint64_t lookup_bte64(CPUX86State *env, uint64_t base, uintptr_t ra)
66 {
67 uint64_t bndcsr, bde, bt;
68
69 if ((env->hflags & HF_CPL_MASK) == 3) {
70 bndcsr = env->bndcs_regs.cfgu;
71 } else {
72 bndcsr = env->msr_bndcfgs;
73 }
74
75 bde = (extract64(base, 20, 28) << 3) + (extract64(bndcsr, 20, 44) << 12);
76 bt = cpu_ldq_data_ra(env, bde, ra);
77 if ((bt & 1) == 0) {
78 env->bndcs_regs.sts = bde | 2;
79 raise_exception_ra(env, EXCP05_BOUND, ra);
80 }
81
82 return (extract64(base, 3, 17) << 5) + (bt & ~7);
83 }
84
85 static uint32_t lookup_bte32(CPUX86State *env, uint32_t base, uintptr_t ra)
86 {
87 uint32_t bndcsr, bde, bt;
88
89 if ((env->hflags & HF_CPL_MASK) == 3) {
90 bndcsr = env->bndcs_regs.cfgu;
91 } else {
92 bndcsr = env->msr_bndcfgs;
93 }
94
95 bde = (extract32(base, 12, 20) << 2) + (bndcsr & TARGET_PAGE_MASK);
96 bt = cpu_ldl_data_ra(env, bde, ra);
97 if ((bt & 1) == 0) {
98 env->bndcs_regs.sts = bde | 2;
99 raise_exception_ra(env, EXCP05_BOUND, ra);
100 }
101
102 return (extract32(base, 2, 10) << 4) + (bt & ~3);
103 }
104
105 uint64_t helper_bndldx64(CPUX86State *env, target_ulong base, target_ulong ptr)
106 {
107 uintptr_t ra = GETPC();
108 uint64_t bte, lb, ub, pt;
109
110 bte = lookup_bte64(env, base, ra);
111 lb = cpu_ldq_data_ra(env, bte, ra);
112 ub = cpu_ldq_data_ra(env, bte + 8, ra);
113 pt = cpu_ldq_data_ra(env, bte + 16, ra);
114
115 if (pt != ptr) {
116 lb = ub = 0;
117 }
118 env->mmx_t0.MMX_Q(0) = ub;
119 return lb;
120 }
121
122 uint64_t helper_bndldx32(CPUX86State *env, target_ulong base, target_ulong ptr)
123 {
124 uintptr_t ra = GETPC();
125 uint32_t bte, lb, ub, pt;
126
127 bte = lookup_bte32(env, base, ra);
128 lb = cpu_ldl_data_ra(env, bte, ra);
129 ub = cpu_ldl_data_ra(env, bte + 4, ra);
130 pt = cpu_ldl_data_ra(env, bte + 8, ra);
131
132 if (pt != ptr) {
133 lb = ub = 0;
134 }
135 return ((uint64_t)ub << 32) | lb;
136 }
137
138 void helper_bndstx64(CPUX86State *env, target_ulong base, target_ulong ptr,
139 uint64_t lb, uint64_t ub)
140 {
141 uintptr_t ra = GETPC();
142 uint64_t bte;
143
144 bte = lookup_bte64(env, base, ra);
145 cpu_stq_data_ra(env, bte, lb, ra);
146 cpu_stq_data_ra(env, bte + 8, ub, ra);
147 cpu_stq_data_ra(env, bte + 16, ptr, ra);
148 }
149
150 void helper_bndstx32(CPUX86State *env, target_ulong base, target_ulong ptr,
151 uint64_t lb, uint64_t ub)
152 {
153 uintptr_t ra = GETPC();
154 uint32_t bte;
155
156 bte = lookup_bte32(env, base, ra);
157 cpu_stl_data_ra(env, bte, lb, ra);
158 cpu_stl_data_ra(env, bte + 4, ub, ra);
159 cpu_stl_data_ra(env, bte + 8, ptr, ra);
160 }
161
162 void helper_bnd_jmp(CPUX86State *env)
163 {
164 if (!(env->hflags2 & HF2_MPX_PR_MASK)) {
165 memset(env->bnd_regs, 0, sizeof(env->bnd_regs));
166 env->hflags &= ~HF_MPX_IU_MASK;
167 }
168 }