kvm: ppc: fixes for KVM_SET_SREGS on init
[qemu.git] / target-ppc / kvm.c
1 /*
2 * PowerPC implementation of KVM hooks
3 *
4 * Copyright IBM Corp. 2007
5 *
6 * Authors:
7 * Jerone Young <jyoung5@us.ibm.com>
8 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
9 * Hollis Blanchard <hollisb@us.ibm.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2 or later.
12 * See the COPYING file in the top-level directory.
13 *
14 */
15
16 #include <sys/types.h>
17 #include <sys/ioctl.h>
18 #include <sys/mman.h>
19
20 #include <linux/kvm.h>
21
22 #include "qemu-common.h"
23 #include "qemu-timer.h"
24 #include "sysemu.h"
25 #include "kvm.h"
26 #include "kvm_ppc.h"
27 #include "cpu.h"
28 #include "device_tree.h"
29
30 //#define DEBUG_KVM
31
32 #ifdef DEBUG_KVM
33 #define dprintf(fmt, ...) \
34 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
35 #else
36 #define dprintf(fmt, ...) \
37 do { } while (0)
38 #endif
39
40 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
41 KVM_CAP_LAST_INFO
42 };
43
44 static int cap_interrupt_unset = false;
45 static int cap_interrupt_level = false;
46
47 /* XXX We have a race condition where we actually have a level triggered
48 * interrupt, but the infrastructure can't expose that yet, so the guest
49 * takes but ignores it, goes to sleep and never gets notified that there's
50 * still an interrupt pending.
51 *
52 * As a quick workaround, let's just wake up again 20 ms after we injected
53 * an interrupt. That way we can assure that we're always reinjecting
54 * interrupts in case the guest swallowed them.
55 */
56 static QEMUTimer *idle_timer;
57
58 static void kvm_kick_env(void *env)
59 {
60 qemu_cpu_kick(env);
61 }
62
63 int kvm_arch_init(KVMState *s)
64 {
65 #ifdef KVM_CAP_PPC_UNSET_IRQ
66 cap_interrupt_unset = kvm_check_extension(s, KVM_CAP_PPC_UNSET_IRQ);
67 #endif
68 #ifdef KVM_CAP_PPC_IRQ_LEVEL
69 cap_interrupt_level = kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL);
70 #endif
71
72 if (!cap_interrupt_level) {
73 fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the "
74 "VM to stall at times!\n");
75 }
76
77 return 0;
78 }
79
80 static int kvm_arch_sync_sregs(CPUState *cenv)
81 {
82 struct kvm_sregs sregs;
83 int ret;
84
85 if (cenv->excp_model == POWERPC_EXCP_BOOKE) {
86 return 0;
87 } else {
88 #ifdef KVM_CAP_PPC_SEGSTATE
89 if (!kvm_check_extension(cenv->kvm_state, KVM_CAP_PPC_SEGSTATE)) {
90 return 0;
91 }
92 #else
93 return 0;
94 #endif
95 }
96
97 ret = kvm_vcpu_ioctl(cenv, KVM_GET_SREGS, &sregs);
98 if (ret) {
99 return ret;
100 }
101
102 sregs.pvr = cenv->spr[SPR_PVR];
103 return kvm_vcpu_ioctl(cenv, KVM_SET_SREGS, &sregs);
104 }
105
106 int kvm_arch_init_vcpu(CPUState *cenv)
107 {
108 int ret;
109
110 ret = kvm_arch_sync_sregs(cenv);
111 if (ret) {
112 return ret;
113 }
114
115 idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_env, cenv);
116
117 return ret;
118 }
119
120 void kvm_arch_reset_vcpu(CPUState *env)
121 {
122 }
123
124 int kvm_arch_put_registers(CPUState *env, int level)
125 {
126 struct kvm_regs regs;
127 int ret;
128 int i;
129
130 ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
131 if (ret < 0)
132 return ret;
133
134 regs.ctr = env->ctr;
135 regs.lr = env->lr;
136 regs.xer = env->xer;
137 regs.msr = env->msr;
138 regs.pc = env->nip;
139
140 regs.srr0 = env->spr[SPR_SRR0];
141 regs.srr1 = env->spr[SPR_SRR1];
142
143 regs.sprg0 = env->spr[SPR_SPRG0];
144 regs.sprg1 = env->spr[SPR_SPRG1];
145 regs.sprg2 = env->spr[SPR_SPRG2];
146 regs.sprg3 = env->spr[SPR_SPRG3];
147 regs.sprg4 = env->spr[SPR_SPRG4];
148 regs.sprg5 = env->spr[SPR_SPRG5];
149 regs.sprg6 = env->spr[SPR_SPRG6];
150 regs.sprg7 = env->spr[SPR_SPRG7];
151
152 for (i = 0;i < 32; i++)
153 regs.gpr[i] = env->gpr[i];
154
155 ret = kvm_vcpu_ioctl(env, KVM_SET_REGS, &regs);
156 if (ret < 0)
157 return ret;
158
159 return ret;
160 }
161
162 int kvm_arch_get_registers(CPUState *env)
163 {
164 struct kvm_regs regs;
165 struct kvm_sregs sregs;
166 int i, ret;
167
168 ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
169 if (ret < 0)
170 return ret;
171
172 ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
173 if (ret < 0)
174 return ret;
175
176 env->ctr = regs.ctr;
177 env->lr = regs.lr;
178 env->xer = regs.xer;
179 env->msr = regs.msr;
180 env->nip = regs.pc;
181
182 env->spr[SPR_SRR0] = regs.srr0;
183 env->spr[SPR_SRR1] = regs.srr1;
184
185 env->spr[SPR_SPRG0] = regs.sprg0;
186 env->spr[SPR_SPRG1] = regs.sprg1;
187 env->spr[SPR_SPRG2] = regs.sprg2;
188 env->spr[SPR_SPRG3] = regs.sprg3;
189 env->spr[SPR_SPRG4] = regs.sprg4;
190 env->spr[SPR_SPRG5] = regs.sprg5;
191 env->spr[SPR_SPRG6] = regs.sprg6;
192 env->spr[SPR_SPRG7] = regs.sprg7;
193
194 for (i = 0;i < 32; i++)
195 env->gpr[i] = regs.gpr[i];
196
197 #ifdef KVM_CAP_PPC_SEGSTATE
198 if (kvm_check_extension(env->kvm_state, KVM_CAP_PPC_SEGSTATE)) {
199 ppc_store_sdr1(env, sregs.u.s.sdr1);
200
201 /* Sync SLB */
202 #ifdef TARGET_PPC64
203 for (i = 0; i < 64; i++) {
204 ppc_store_slb(env, sregs.u.s.ppc64.slb[i].slbe,
205 sregs.u.s.ppc64.slb[i].slbv);
206 }
207 #endif
208
209 /* Sync SRs */
210 for (i = 0; i < 16; i++) {
211 env->sr[i] = sregs.u.s.ppc32.sr[i];
212 }
213
214 /* Sync BATs */
215 for (i = 0; i < 8; i++) {
216 env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
217 env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
218 env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
219 env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
220 }
221 }
222 #endif
223
224 return 0;
225 }
226
227 int kvmppc_set_interrupt(CPUState *env, int irq, int level)
228 {
229 unsigned virq = level ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
230
231 if (irq != PPC_INTERRUPT_EXT) {
232 return 0;
233 }
234
235 if (!kvm_enabled() || !cap_interrupt_unset || !cap_interrupt_level) {
236 return 0;
237 }
238
239 kvm_vcpu_ioctl(env, KVM_INTERRUPT, &virq);
240
241 return 0;
242 }
243
244 #if defined(TARGET_PPCEMB)
245 #define PPC_INPUT_INT PPC40x_INPUT_INT
246 #elif defined(TARGET_PPC64)
247 #define PPC_INPUT_INT PPC970_INPUT_INT
248 #else
249 #define PPC_INPUT_INT PPC6xx_INPUT_INT
250 #endif
251
252 void kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
253 {
254 int r;
255 unsigned irq;
256
257 /* PowerPC Qemu tracks the various core input pins (interrupt, critical
258 * interrupt, reset, etc) in PPC-specific env->irq_input_state. */
259 if (!cap_interrupt_level &&
260 run->ready_for_interrupt_injection &&
261 (env->interrupt_request & CPU_INTERRUPT_HARD) &&
262 (env->irq_input_state & (1<<PPC_INPUT_INT)))
263 {
264 /* For now KVM disregards the 'irq' argument. However, in the
265 * future KVM could cache it in-kernel to avoid a heavyweight exit
266 * when reading the UIC.
267 */
268 irq = KVM_INTERRUPT_SET;
269
270 dprintf("injected interrupt %d\n", irq);
271 r = kvm_vcpu_ioctl(env, KVM_INTERRUPT, &irq);
272 if (r < 0)
273 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
274
275 /* Always wake up soon in case the interrupt was level based */
276 qemu_mod_timer(idle_timer, qemu_get_clock_ns(vm_clock) +
277 (get_ticks_per_sec() / 50));
278 }
279
280 /* We don't know if there are more interrupts pending after this. However,
281 * the guest will return to userspace in the course of handling this one
282 * anyways, so we will get a chance to deliver the rest. */
283 }
284
285 void kvm_arch_post_run(CPUState *env, struct kvm_run *run)
286 {
287 }
288
289 int kvm_arch_process_async_events(CPUState *env)
290 {
291 return 0;
292 }
293
294 static int kvmppc_handle_halt(CPUState *env)
295 {
296 if (!(env->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
297 env->halted = 1;
298 env->exception_index = EXCP_HLT;
299 }
300
301 return 0;
302 }
303
304 /* map dcr access to existing qemu dcr emulation */
305 static int kvmppc_handle_dcr_read(CPUState *env, uint32_t dcrn, uint32_t *data)
306 {
307 if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0)
308 fprintf(stderr, "Read to unhandled DCR (0x%x)\n", dcrn);
309
310 return 0;
311 }
312
313 static int kvmppc_handle_dcr_write(CPUState *env, uint32_t dcrn, uint32_t data)
314 {
315 if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0)
316 fprintf(stderr, "Write to unhandled DCR (0x%x)\n", dcrn);
317
318 return 0;
319 }
320
321 int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run)
322 {
323 int ret;
324
325 switch (run->exit_reason) {
326 case KVM_EXIT_DCR:
327 if (run->dcr.is_write) {
328 dprintf("handle dcr write\n");
329 ret = kvmppc_handle_dcr_write(env, run->dcr.dcrn, run->dcr.data);
330 } else {
331 dprintf("handle dcr read\n");
332 ret = kvmppc_handle_dcr_read(env, run->dcr.dcrn, &run->dcr.data);
333 }
334 break;
335 case KVM_EXIT_HLT:
336 dprintf("handle halt\n");
337 ret = kvmppc_handle_halt(env);
338 break;
339 default:
340 fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason);
341 ret = -1;
342 break;
343 }
344
345 return ret;
346 }
347
348 static int read_cpuinfo(const char *field, char *value, int len)
349 {
350 FILE *f;
351 int ret = -1;
352 int field_len = strlen(field);
353 char line[512];
354
355 f = fopen("/proc/cpuinfo", "r");
356 if (!f) {
357 return -1;
358 }
359
360 do {
361 if(!fgets(line, sizeof(line), f)) {
362 break;
363 }
364 if (!strncmp(line, field, field_len)) {
365 strncpy(value, line, len);
366 ret = 0;
367 break;
368 }
369 } while(*line);
370
371 fclose(f);
372
373 return ret;
374 }
375
376 uint32_t kvmppc_get_tbfreq(void)
377 {
378 char line[512];
379 char *ns;
380 uint32_t retval = get_ticks_per_sec();
381
382 if (read_cpuinfo("timebase", line, sizeof(line))) {
383 return retval;
384 }
385
386 if (!(ns = strchr(line, ':'))) {
387 return retval;
388 }
389
390 ns++;
391
392 retval = atoi(ns);
393 return retval;
394 }
395
396 int kvmppc_get_hypercall(CPUState *env, uint8_t *buf, int buf_len)
397 {
398 uint32_t *hc = (uint32_t*)buf;
399
400 #ifdef KVM_CAP_PPC_GET_PVINFO
401 struct kvm_ppc_pvinfo pvinfo;
402
403 if (kvm_check_extension(env->kvm_state, KVM_CAP_PPC_GET_PVINFO) &&
404 !kvm_vm_ioctl(env->kvm_state, KVM_PPC_GET_PVINFO, &pvinfo)) {
405 memcpy(buf, pvinfo.hcall, buf_len);
406
407 return 0;
408 }
409 #endif
410
411 /*
412 * Fallback to always fail hypercalls:
413 *
414 * li r3, -1
415 * nop
416 * nop
417 * nop
418 */
419
420 hc[0] = 0x3860ffff;
421 hc[1] = 0x60000000;
422 hc[2] = 0x60000000;
423 hc[3] = 0x60000000;
424
425 return 0;
426 }
427
428 bool kvm_arch_stop_on_emulation_error(CPUState *env)
429 {
430 return true;
431 }
432
433 int kvm_arch_on_sigbus_vcpu(CPUState *env, int code, void *addr)
434 {
435 return 1;
436 }
437
438 int kvm_arch_on_sigbus(int code, void *addr)
439 {
440 return 1;
441 }