vmsvga: don't process more than 1024 fifo commands at once
[qemu.git] / target-ppc / kvm_ppc.h
1 /*
2 * Copyright 2008 IBM Corporation.
3 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
4 *
5 * This work is licensed under the GNU GPL license version 2 or later.
6 *
7 */
8
9 #ifndef __KVM_PPC_H__
10 #define __KVM_PPC_H__
11
12 #define TYPE_HOST_POWERPC_CPU "host-" TYPE_POWERPC_CPU
13
14 #ifdef CONFIG_KVM
15
16 uint32_t kvmppc_get_tbfreq(void);
17 uint64_t kvmppc_get_clockfreq(void);
18 uint32_t kvmppc_get_vmx(void);
19 uint32_t kvmppc_get_dfp(void);
20 bool kvmppc_get_host_model(char **buf);
21 bool kvmppc_get_host_serial(char **buf);
22 int kvmppc_get_hasidle(CPUPPCState *env);
23 int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len);
24 int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level);
25 void kvmppc_enable_logical_ci_hcalls(void);
26 void kvmppc_enable_set_mode_hcall(void);
27 void kvmppc_set_papr(PowerPCCPU *cpu);
28 int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version);
29 void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy);
30 int kvmppc_smt_threads(void);
31 int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
32 int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
33 int kvmppc_set_tcr(PowerPCCPU *cpu);
34 int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
35 #ifndef CONFIG_USER_ONLY
36 off_t kvmppc_alloc_rma(void **rma);
37 bool kvmppc_spapr_use_multitce(void);
38 void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t window_size, int *pfd,
39 bool need_vfio);
40 int kvmppc_remove_spapr_tce(void *table, int pfd, uint32_t window_size);
41 int kvmppc_reset_htab(int shift_hint);
42 uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift);
43 #endif /* !CONFIG_USER_ONLY */
44 bool kvmppc_has_cap_epr(void);
45 int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function);
46 bool kvmppc_has_cap_htab_fd(void);
47 int kvmppc_get_htab_fd(bool write);
48 int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns);
49 int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
50 uint16_t n_valid, uint16_t n_invalid);
51 uint64_t kvmppc_hash64_read_pteg(PowerPCCPU *cpu, target_ulong pte_index);
52 void kvmppc_hash64_free_pteg(uint64_t token);
53
54 void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
55 target_ulong pte0, target_ulong pte1);
56 bool kvmppc_has_cap_fixup_hcalls(void);
57 int kvmppc_enable_hwrng(void);
58 int kvmppc_put_books_sregs(PowerPCCPU *cpu);
59
60 #else
61
62 static inline uint32_t kvmppc_get_tbfreq(void)
63 {
64 return 0;
65 }
66
67 static inline bool kvmppc_get_host_model(char **buf)
68 {
69 return false;
70 }
71
72 static inline bool kvmppc_get_host_serial(char **buf)
73 {
74 return false;
75 }
76
77 static inline uint64_t kvmppc_get_clockfreq(void)
78 {
79 return 0;
80 }
81
82 static inline uint32_t kvmppc_get_vmx(void)
83 {
84 return 0;
85 }
86
87 static inline uint32_t kvmppc_get_dfp(void)
88 {
89 return 0;
90 }
91
92 static inline int kvmppc_get_hasidle(CPUPPCState *env)
93 {
94 return 0;
95 }
96
97 static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len)
98 {
99 return -1;
100 }
101
102 static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level)
103 {
104 return -1;
105 }
106
107 static inline void kvmppc_enable_logical_ci_hcalls(void)
108 {
109 }
110
111 static inline void kvmppc_enable_set_mode_hcall(void)
112 {
113 }
114
115 static inline void kvmppc_set_papr(PowerPCCPU *cpu)
116 {
117 }
118
119 static inline int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version)
120 {
121 return 0;
122 }
123
124 static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)
125 {
126 }
127
128 static inline int kvmppc_smt_threads(void)
129 {
130 return 1;
131 }
132
133 static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
134 {
135 return 0;
136 }
137
138 static inline int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
139 {
140 return 0;
141 }
142
143 static inline int kvmppc_set_tcr(PowerPCCPU *cpu)
144 {
145 return 0;
146 }
147
148 static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
149 {
150 return -1;
151 }
152
153 #ifndef CONFIG_USER_ONLY
154 static inline off_t kvmppc_alloc_rma(void **rma)
155 {
156 return 0;
157 }
158
159 static inline bool kvmppc_spapr_use_multitce(void)
160 {
161 return false;
162 }
163
164 static inline void *kvmppc_create_spapr_tce(uint32_t liobn,
165 uint32_t window_size, int *fd,
166 bool need_vfio)
167 {
168 return NULL;
169 }
170
171 static inline int kvmppc_remove_spapr_tce(void *table, int pfd,
172 uint32_t nb_table)
173 {
174 return -1;
175 }
176
177 static inline int kvmppc_reset_htab(int shift_hint)
178 {
179 return 0;
180 }
181
182 static inline uint64_t kvmppc_rma_size(uint64_t current_size,
183 unsigned int hash_shift)
184 {
185 return ram_size;
186 }
187
188 #endif /* !CONFIG_USER_ONLY */
189
190 static inline bool kvmppc_has_cap_epr(void)
191 {
192 return false;
193 }
194
195 static inline int kvmppc_define_rtas_kernel_token(uint32_t token,
196 const char *function)
197 {
198 return -1;
199 }
200
201 static inline bool kvmppc_has_cap_htab_fd(void)
202 {
203 return false;
204 }
205
206 static inline int kvmppc_get_htab_fd(bool write)
207 {
208 return -1;
209 }
210
211 static inline int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize,
212 int64_t max_ns)
213 {
214 abort();
215 }
216
217 static inline int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
218 uint16_t n_valid, uint16_t n_invalid)
219 {
220 abort();
221 }
222
223 static inline uint64_t kvmppc_hash64_read_pteg(PowerPCCPU *cpu,
224 target_ulong pte_index)
225 {
226 abort();
227 }
228
229 static inline void kvmppc_hash64_free_pteg(uint64_t token)
230 {
231 abort();
232 }
233
234 static inline void kvmppc_hash64_write_pte(CPUPPCState *env,
235 target_ulong pte_index,
236 target_ulong pte0, target_ulong pte1)
237 {
238 abort();
239 }
240
241 static inline bool kvmppc_has_cap_fixup_hcalls(void)
242 {
243 abort();
244 }
245
246 static inline int kvmppc_enable_hwrng(void)
247 {
248 return -1;
249 }
250
251 static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
252 {
253 abort();
254 }
255 #endif
256
257 #ifndef CONFIG_KVM
258
259 #define kvmppc_eieio() do { } while (0)
260
261 static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
262 {
263 }
264
265 static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
266 {
267 }
268
269 #else /* CONFIG_KVM */
270
271 #define kvmppc_eieio() \
272 do { \
273 if (kvm_enabled()) { \
274 asm volatile("eieio" : : : "memory"); \
275 } \
276 } while (0)
277
278 /* Store data cache blocks back to memory */
279 static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
280 {
281 uint8_t *p;
282
283 for (p = addr; p < addr + len; p += cpu->env.dcache_line_size) {
284 asm volatile("dcbst 0,%0" : : "r"(p) : "memory");
285 }
286 }
287
288 /* Invalidate instruction cache blocks */
289 static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
290 {
291 uint8_t *p;
292
293 for (p = addr; p < addr + len; p += cpu->env.icache_line_size) {
294 asm volatile("icbi 0,%0" : : "r"(p));
295 }
296 }
297
298 #endif /* CONFIG_KVM */
299
300 #ifndef KVM_INTERRUPT_SET
301 #define KVM_INTERRUPT_SET -1
302 #endif
303
304 #ifndef KVM_INTERRUPT_UNSET
305 #define KVM_INTERRUPT_UNSET -2
306 #endif
307
308 #ifndef KVM_INTERRUPT_SET_LEVEL
309 #define KVM_INTERRUPT_SET_LEVEL -3
310 #endif
311
312 #endif /* __KVM_PPC_H__ */