Merge remote-tracking branch 'remotes/sstabellini/xen-2014-11-14' into staging
[qemu.git] / target-s390x / misc_helper.c
1 /*
2 * S/390 misc helper routines
3 *
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2009 Alexander Graf
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include "cpu.h"
22 #include "exec/memory.h"
23 #include "qemu/host-utils.h"
24 #include "exec/helper-proto.h"
25 #include <string.h>
26 #include "sysemu/kvm.h"
27 #include "qemu/timer.h"
28 #ifdef CONFIG_KVM
29 #include <linux/kvm.h>
30 #endif
31 #include "exec/cpu_ldst.h"
32
33 #if !defined(CONFIG_USER_ONLY)
34 #include "sysemu/cpus.h"
35 #include "sysemu/sysemu.h"
36 #include "hw/s390x/ebcdic.h"
37 #endif
38
39 /* #define DEBUG_HELPER */
40 #ifdef DEBUG_HELPER
41 #define HELPER_LOG(x...) qemu_log(x)
42 #else
43 #define HELPER_LOG(x...)
44 #endif
45
46 /* Raise an exception dynamically from a helper function. */
47 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
48 uintptr_t retaddr)
49 {
50 CPUState *cs = CPU(s390_env_get_cpu(env));
51 int t;
52
53 cs->exception_index = EXCP_PGM;
54 env->int_pgm_code = excp;
55
56 /* Use the (ultimate) callers address to find the insn that trapped. */
57 cpu_restore_state(cs, retaddr);
58
59 /* Advance past the insn. */
60 t = cpu_ldub_code(env, env->psw.addr);
61 env->int_pgm_ilen = t = get_ilen(t);
62 env->psw.addr += 2 * t;
63
64 cpu_loop_exit(cs);
65 }
66
67 /* Raise an exception statically from a TB. */
68 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
69 {
70 CPUState *cs = CPU(s390_env_get_cpu(env));
71
72 HELPER_LOG("%s: exception %d\n", __func__, excp);
73 cs->exception_index = excp;
74 cpu_loop_exit(cs);
75 }
76
77 #ifndef CONFIG_USER_ONLY
78
79 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
80 {
81 S390CPU *cpu = s390_env_get_cpu(env);
82
83 qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
84 env->psw.addr);
85
86 if (kvm_enabled()) {
87 #ifdef CONFIG_KVM
88 struct kvm_s390_irq irq = {
89 .type = KVM_S390_PROGRAM_INT,
90 .u.pgm.code = code,
91 };
92
93 kvm_s390_vcpu_interrupt(cpu, &irq);
94 #endif
95 } else {
96 CPUState *cs = CPU(cpu);
97
98 env->int_pgm_code = code;
99 env->int_pgm_ilen = ilen;
100 cs->exception_index = EXCP_PGM;
101 cpu_loop_exit(cs);
102 }
103 }
104
105 /* SCLP service call */
106 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
107 {
108 int r = sclp_service_call(env, r1, r2);
109 if (r < 0) {
110 program_interrupt(env, -r, 4);
111 return 0;
112 }
113 return r;
114 }
115
116 #ifndef CONFIG_USER_ONLY
117 static int modified_clear_reset(S390CPU *cpu)
118 {
119 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
120 CPUState *t;
121
122 pause_all_vcpus();
123 cpu_synchronize_all_states();
124 CPU_FOREACH(t) {
125 run_on_cpu(t, s390_do_cpu_full_reset, t);
126 }
127 cmma_reset(cpu);
128 io_subsystem_reset();
129 scc->load_normal(CPU(cpu));
130 cpu_synchronize_all_post_reset();
131 resume_all_vcpus();
132 return 0;
133 }
134
135 static int load_normal_reset(S390CPU *cpu)
136 {
137 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
138 CPUState *t;
139
140 pause_all_vcpus();
141 cpu_synchronize_all_states();
142 CPU_FOREACH(t) {
143 run_on_cpu(t, s390_do_cpu_reset, t);
144 }
145 cmma_reset(cpu);
146 io_subsystem_reset();
147 scc->initial_cpu_reset(CPU(cpu));
148 scc->load_normal(CPU(cpu));
149 cpu_synchronize_all_post_reset();
150 resume_all_vcpus();
151 return 0;
152 }
153
154 #define DIAG_308_RC_NO_CONF 0x0102
155 #define DIAG_308_RC_INVALID 0x0402
156 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
157 {
158 uint64_t addr = env->regs[r1];
159 uint64_t subcode = env->regs[r3];
160
161 if (env->psw.mask & PSW_MASK_PSTATE) {
162 program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
163 return;
164 }
165
166 if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
167 program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
168 return;
169 }
170
171 switch (subcode) {
172 case 0:
173 modified_clear_reset(s390_env_get_cpu(env));
174 break;
175 case 1:
176 load_normal_reset(s390_env_get_cpu(env));
177 break;
178 case 5:
179 if ((r1 & 1) || (addr & 0x0fffULL)) {
180 program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
181 return;
182 }
183 env->regs[r1+1] = DIAG_308_RC_INVALID;
184 return;
185 case 6:
186 if ((r1 & 1) || (addr & 0x0fffULL)) {
187 program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
188 return;
189 }
190 env->regs[r1+1] = DIAG_308_RC_NO_CONF;
191 return;
192 default:
193 hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
194 break;
195 }
196 }
197 #endif
198
199 /* DIAG */
200 uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
201 uint64_t code)
202 {
203 uint64_t r;
204
205 switch (num) {
206 case 0x500:
207 /* KVM hypercall */
208 r = s390_virtio_hypercall(env);
209 break;
210 case 0x44:
211 /* yield */
212 r = 0;
213 break;
214 case 0x308:
215 /* ipl */
216 r = 0;
217 break;
218 default:
219 r = -1;
220 break;
221 }
222
223 if (r) {
224 program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
225 }
226
227 return r;
228 }
229
230 /* Set Prefix */
231 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
232 {
233 CPUState *cs = CPU(s390_env_get_cpu(env));
234 uint32_t prefix = a1 & 0x7fffe000;
235
236 env->psa = prefix;
237 qemu_log("prefix: %#x\n", prefix);
238 tlb_flush_page(cs, 0);
239 tlb_flush_page(cs, TARGET_PAGE_SIZE);
240 }
241
242 static inline uint64_t clock_value(CPUS390XState *env)
243 {
244 uint64_t time;
245
246 time = env->tod_offset +
247 time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
248
249 return time;
250 }
251
252 /* Store Clock */
253 uint64_t HELPER(stck)(CPUS390XState *env)
254 {
255 return clock_value(env);
256 }
257
258 /* Set Clock Comparator */
259 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
260 {
261 if (time == -1ULL) {
262 return;
263 }
264
265 /* difference between now and then */
266 time -= clock_value(env);
267 /* nanoseconds */
268 time = (time * 125) >> 9;
269
270 timer_mod(env->tod_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time);
271 }
272
273 /* Store Clock Comparator */
274 uint64_t HELPER(stckc)(CPUS390XState *env)
275 {
276 /* XXX implement */
277 return 0;
278 }
279
280 /* Set CPU Timer */
281 void HELPER(spt)(CPUS390XState *env, uint64_t time)
282 {
283 if (time == -1ULL) {
284 return;
285 }
286
287 /* nanoseconds */
288 time = (time * 125) >> 9;
289
290 timer_mod(env->cpu_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time);
291 }
292
293 /* Store CPU Timer */
294 uint64_t HELPER(stpt)(CPUS390XState *env)
295 {
296 /* XXX implement */
297 return 0;
298 }
299
300 /* Store System Information */
301 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
302 uint64_t r0, uint64_t r1)
303 {
304 int cc = 0;
305 int sel1, sel2;
306
307 if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
308 ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
309 /* valid function code, invalid reserved bits */
310 program_interrupt(env, PGM_SPECIFICATION, 2);
311 }
312
313 sel1 = r0 & STSI_R0_SEL1_MASK;
314 sel2 = r1 & STSI_R1_SEL2_MASK;
315
316 /* XXX: spec exception if sysib is not 4k-aligned */
317
318 switch (r0 & STSI_LEVEL_MASK) {
319 case STSI_LEVEL_1:
320 if ((sel1 == 1) && (sel2 == 1)) {
321 /* Basic Machine Configuration */
322 struct sysib_111 sysib;
323
324 memset(&sysib, 0, sizeof(sysib));
325 ebcdic_put(sysib.manuf, "QEMU ", 16);
326 /* same as machine type number in STORE CPU ID */
327 ebcdic_put(sysib.type, "QEMU", 4);
328 /* same as model number in STORE CPU ID */
329 ebcdic_put(sysib.model, "QEMU ", 16);
330 ebcdic_put(sysib.sequence, "QEMU ", 16);
331 ebcdic_put(sysib.plant, "QEMU", 4);
332 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
333 } else if ((sel1 == 2) && (sel2 == 1)) {
334 /* Basic Machine CPU */
335 struct sysib_121 sysib;
336
337 memset(&sysib, 0, sizeof(sysib));
338 /* XXX make different for different CPUs? */
339 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
340 ebcdic_put(sysib.plant, "QEMU", 4);
341 stw_p(&sysib.cpu_addr, env->cpu_num);
342 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
343 } else if ((sel1 == 2) && (sel2 == 2)) {
344 /* Basic Machine CPUs */
345 struct sysib_122 sysib;
346
347 memset(&sysib, 0, sizeof(sysib));
348 stl_p(&sysib.capability, 0x443afc29);
349 /* XXX change when SMP comes */
350 stw_p(&sysib.total_cpus, 1);
351 stw_p(&sysib.active_cpus, 1);
352 stw_p(&sysib.standby_cpus, 0);
353 stw_p(&sysib.reserved_cpus, 0);
354 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
355 } else {
356 cc = 3;
357 }
358 break;
359 case STSI_LEVEL_2:
360 {
361 if ((sel1 == 2) && (sel2 == 1)) {
362 /* LPAR CPU */
363 struct sysib_221 sysib;
364
365 memset(&sysib, 0, sizeof(sysib));
366 /* XXX make different for different CPUs? */
367 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
368 ebcdic_put(sysib.plant, "QEMU", 4);
369 stw_p(&sysib.cpu_addr, env->cpu_num);
370 stw_p(&sysib.cpu_id, 0);
371 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
372 } else if ((sel1 == 2) && (sel2 == 2)) {
373 /* LPAR CPUs */
374 struct sysib_222 sysib;
375
376 memset(&sysib, 0, sizeof(sysib));
377 stw_p(&sysib.lpar_num, 0);
378 sysib.lcpuc = 0;
379 /* XXX change when SMP comes */
380 stw_p(&sysib.total_cpus, 1);
381 stw_p(&sysib.conf_cpus, 1);
382 stw_p(&sysib.standby_cpus, 0);
383 stw_p(&sysib.reserved_cpus, 0);
384 ebcdic_put(sysib.name, "QEMU ", 8);
385 stl_p(&sysib.caf, 1000);
386 stw_p(&sysib.dedicated_cpus, 0);
387 stw_p(&sysib.shared_cpus, 0);
388 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
389 } else {
390 cc = 3;
391 }
392 break;
393 }
394 case STSI_LEVEL_3:
395 {
396 if ((sel1 == 2) && (sel2 == 2)) {
397 /* VM CPUs */
398 struct sysib_322 sysib;
399
400 memset(&sysib, 0, sizeof(sysib));
401 sysib.count = 1;
402 /* XXX change when SMP comes */
403 stw_p(&sysib.vm[0].total_cpus, 1);
404 stw_p(&sysib.vm[0].conf_cpus, 1);
405 stw_p(&sysib.vm[0].standby_cpus, 0);
406 stw_p(&sysib.vm[0].reserved_cpus, 0);
407 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
408 stl_p(&sysib.vm[0].caf, 1000);
409 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux ", 16);
410 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
411 } else {
412 cc = 3;
413 }
414 break;
415 }
416 case STSI_LEVEL_CURRENT:
417 env->regs[0] = STSI_LEVEL_3;
418 break;
419 default:
420 cc = 3;
421 break;
422 }
423
424 return cc;
425 }
426
427 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
428 uint64_t cpu_addr)
429 {
430 int cc = 0;
431
432 HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
433 __func__, order_code, r1, cpu_addr);
434
435 /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
436 as parameter (input). Status (output) is always R1. */
437
438 switch (order_code) {
439 case SIGP_SET_ARCH:
440 /* switch arch */
441 break;
442 case SIGP_SENSE:
443 /* enumerate CPU status */
444 if (cpu_addr) {
445 /* XXX implement when SMP comes */
446 return 3;
447 }
448 env->regs[r1] &= 0xffffffff00000000ULL;
449 cc = 1;
450 break;
451 #if !defined(CONFIG_USER_ONLY)
452 case SIGP_RESTART:
453 qemu_system_reset_request();
454 cpu_loop_exit(CPU(s390_env_get_cpu(env)));
455 break;
456 case SIGP_STOP:
457 qemu_system_shutdown_request();
458 cpu_loop_exit(CPU(s390_env_get_cpu(env)));
459 break;
460 #endif
461 default:
462 /* unknown sigp */
463 fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
464 cc = 3;
465 }
466
467 return cc;
468 }
469 #endif